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Time Integration Utilities on an FPGA
Cris A. Kaniawith
Olaf O. Storaasli, Ph. D.
NASA Langley
Traditional Computing
• Hardware development has struggled to keep pace with analysis needs
• Computing speed reaching asymptotic limit
• Clusters offer means of faster computing
Moore’s Law
Computing Alternative
• FPGAs offer means to achieve faster execution
• Design is inherently parallel whereas CPUs are sequential
• “Field Programmable” where the circuitry is optimized to best suit the demands of the application
• CPU circuitry 1% active while FPGA circuitry 80% active
Purpose
• Legacy software is incompatible
• Basic engineering utilities must be developed to begin transition
• Critical to many analysis methodologies is the solution to time-dependent PDEs
• Key disciplines which would benefit from an FPGA are CSM and CFD
• Two-fold purpose: Demonstrate the advantages of the FPGA and provide time integration routines
Methods
• Learn Viva programming environment for FPGAs
• Implement time integration schemes for scalar ODEs
• Apply methodology to representative ODE for verification
• Extend utilities for vector PDEs
• Test vector utilities on problems in CFD & CSM
• Compare execution speeds of traditional CPU vs FPGA on identical problems
C/C++ programming environment
VIVA programming environment
Expected 50 to 300 times faster
Accomplishments• Spring-mass system with damping
– four-stage Runge-Kutta integration scheme
– Newmark method
– compare analytical solution with numerical solutions
Accomplishments• Computational Structural Mechanics
– time dependent solution of cantilever beam
• Computational Fluid Dynamics
– time dependent solution quasi-2D flow with area change
Spring-Mass Results• Spring-Mass System with damping
– verified integration schemes on both CPU and FPGA
– numerical solutions agree with analytical solution
– 700 C++ lines, 36 Viva sheets Displacement vs. Time
-10
-5
0
5
10
0 2 4 6 8 10
Time (sec)
Dis
pla
ce
me
nt
Analytical Solution
Numerical Solutions
Cantilever Beam Results
• Cantilever Beam
– solved structural problem using a finite element approach
– used Newmark integration scheme
– 1200 C++ lines, 56+ Viva sheets Elements CPU Solution Time (sec) FPGA Solution Time (sec)
20 109 *40 723 *60 1705 *
Quasi-2D Flow Results
• Quasi-2D Flow– solved fluid dynamics problem involving three simultaneous equations– used Runge-Kutta integration scheme– 700 C++ lines, 49+ Viva sheets
Nodes CPU Solution Time (sec) FPGA Solution Time (sec)60 40 *80 55 *100 66 *140 830 *200 1188 *
Conclusions/Relevancy
• FPGA demonstrates x-fold increase in efficiency over Pentium class CPU
• FPGAs represent next generation hardware
• Numerical integration utilities will aid in transition to FPGA hardware
Acknowledgements
• Dr. Olaf Storaasli, NASA Langley Research Center
• Dr. Arthur Johnson, NASA Langley Research Center
• Mrs. Sue Greiner, New Horizons Governor’s School
Citations
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