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The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

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Page 1: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

The Updated Status of RISC-V SW

Kito Cheng and Greentime Hu

2019 RISC-V Workshop Taiwan

Page 2: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 2

The main contributor to the RISC-V software eco-system

Page 3: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 3

Page 4: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 4

GNU Toolchain

bintuils 2.32 (Released at 2019/2/2)

GCC 9 (Expected release at 2019/4E) RV32E

Interrupt attribute

ELF Attribute support

void __attribute__ ((interrupt)) foo (void) { }

.attribute arch, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0"

.attribute unaligned_access, 0

.attribute stack_align, 16

Page 5: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 5

ELF Attribute

Record more info into object file. Arch info, stack alignment or version of privilege spec.

Disassembler: "How can I interpret the ELF correctly?"

Linker: "Can I link those ELF objects?"

Loader: "Can I load the ELF objects and make them run?"

More detail: https://groups.google.com/a/groups.riscv.org/d/msg/sw-

dev/KbywJrTczdQ/5CNB_63BAgAJ

https://github.com/riscv/riscv-elf-psabi-doc/pull/71

.attribute arch, "rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0" .attribute unaligned_access, 0 .attribute stack_align, 16

https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/KbywJrTczdQ/5CNB_63BAgAJ
https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/KbywJrTczdQ/5CNB_63BAgAJ
https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/KbywJrTczdQ/5CNB_63BAgAJ
https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/KbywJrTczdQ/5CNB_63BAgAJ
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
https://github.com/riscv/riscv-elf-psabi-doc/pull/71
Page 6: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 6

Debugger

GDB Software single step

Linux/FreeBSD support

OpenOCD Upstreamed!

Page 7: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 7

Glibc

glibc 2.27 (2018/2) included RV64 support.

RV32 supporting. Contributed by Andes.

Ready to upstream!

Waiting Y2038 patches for Linux kernel

Expect to be upstreamed this year.

Latest stable branch:

https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29

https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
https://github.com/riscv/riscv-glibc/tree/riscv-glibc-2.29
Page 8: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 8

LLVM

LLVM RV32IMAFDC & RV64IMAFDC Code gen.

Missing hard-float calling convention.

Expected to be completed this year.

LLD Contributed by Andes.

Faster and smaller implementation than GNU's linker.

RISC-V support is included in LLD 8!

Page 9: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 9

RISC-V System Software Status

Linux

u-Boot

FreeRTOS

Arduino

Page 10: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 10

Linux Kernel Verifications

Investigating the results of LTP

Stress tests to find more problems to be fixed

Current status

LTP-20180316

Total Tests: 1983

Total Skipped Tests: 586

Total Failures: 95

Kernel Version: 4.17.0-00232-geeac8377bba0

Machine Architecture: riscv64

Hostname: Andes

Fix the kernel hang issue in lock torture tests when CONFIG_PREEMPT=y

Merged to mainline

https://lkml.org/lkml/2019/1/3/7

https://lkml.org/lkml/2019/1/3/7
https://lkml.org/lkml/2019/1/3/7
Page 11: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 11

Linux Kernel Tools

Ftrace support For developers to debug

Support dynamic ftrace

Merged to mainline

https://lkml.org/lkml/2018/1/18/477

Perf support For developers to evaluate the bottleneck of the whole system

Merged to mainline

Will be talked at 10:00 this morning

https://lkml.org/lkml/2018/4/2/171

https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/1/18/477
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
https://lkml.org/lkml/2018/4/2/171
Page 12: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 12

Linux kernel Power Management Suspend2ram support

Able to be suspended by sysfs commands and wakeup by RTC and uart interrupt

PowerBrake support

Able to reduce power consumption through sysfs commands to reduce performance

Andes RV64 cores

Suspend2ram

Wakeup by uart

PowerBrake

Page 13: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 13

Linux Kernel Development

Module support Support all relocation types in kernel module for RV32 and RV64

Merged to mainline and well verified

https://lkml.org/lkml/2018/3/15/121

https://lkml.org/lkml/2018/11/12/1820

Patchset for non-coherent agent RISC-V cores A general framework for RISC-V cores without coherent agent

Useful for customers who care die size

Well verified in AE350 platform

https://lkml.org/lkml/2018/10/31/431

https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/11/12/1820
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
https://lkml.org/lkml/2018/10/31/431
Page 14: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 14

Linux Kernel Development

Fedora on Andes AE350 AX25(Andes RISC-V core)

A platform with mmc and mac

Able to run Fedora distribution

(f30, Fedora-Minimal-Rawhide-20190226.n.0, fedora-riscv64-minimal-rawhide.ks, riscv64)

Able to install packages

Will be talked at 10:15

Andes v5 AX25

Fedora

Use dnf to install htop rpm

MMC

MAC

http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
http://185.97.32.145/koji/taskinfo?taskID=161582
Page 15: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 15

u-Boot Development

u-Boot SMP support (Reviewing)

S-mode support

More drivers supported in AE350

mmc, mac, smc, spi

SiFive FU540 board support

Merged and verified patchset from contributors(SiFive, WD)

Page 16: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 16

FreeRTOS Development

Pass FreeRTOS testsuite

Support AE250/AE350

Low power support

Based on FreeRTOS tickless-idle mode

Based on RISC-V standard mtime/mtimecmp

Reduce power consumption by stopping periodic tick interrupt in the idle mode

Tick ISR

Idle Task

Tick ISR

Idle Task

Idle Tickless

Idle

Page 17: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 17

FreeRTOS Development

Awareness debugging

Kernel Awareness

Task information

Event information

Page 18: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 18

Arduino Development

Arduino programming language and standard libraries support

Support Arduino language reference APIs

Support standard library

Arduino Software (IDE) compatible package

Andes RISC-V platforms

Install from board manager

Corvette F1

Page 19: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Taking RISC-V® Mainstream 19

Future Work of Linux

Verifications LTP and Linux kernel selftest

New features The Kernel Address Sanitizer (KASAN) support

ASID support

Non-MMU support

AMP support

Real-time Linux support

Enhanced perf support

Thanks to all the contributors

Page 20: The Updated Status of RISC-V SW · The Updated Status of RISC-V SW Kito Cheng and Greentime Hu 2019 RISC-V Workshop Taiwan

Thank you


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