The trigger system in the NEXT-DEMO detector

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2012 JINST 7 C12001

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2012 JINST 7 C12001

PUBLISHED BY IOP PUBLISHING FOR SISSA MEDIALAB

RECEIVED: October 22, 2012ACCEPTED: October 31, 2012

PUBLISHED: December 3, 2012

TOPICAL WORKSHOP ON ELECTRONICS FOR PARTICLE PHYSICS 2012,17–21 SEPTEMBER 2012,OXFORD, U.K.

The trigger system in the NEXT-DEMO detector

R. Esteve,a,1 J. Toledo,a F. Monrabal,b D. Lorca,b L. Serra,b A. Marı,a

J.J. Gomez-Cadenas,b I. Liubarskyb and F. Moraa

aInstituto de Instrumentacion para Imagen Molecular (I3M), Universitat Politecnica de Valencia,Camino de Vera s/n, Edificio 8B, 46022 Valencia, Spain

bInstituto de Fısica Corpuscular (IFIC), CSIC & Universitat de Valencia,Catedratico Jose Beltran 2, 46980 Valencia, Spain

E-mail: rauesbos@eln.upv.es

ABSTRACT: NEXT-DEMO is a prototype of NEXT (Neutrino Experiment with Xenon TPC), anexperiment to search for neutrino-less double beta decay using a 100 kg radio-pure, 90 % enriched(136Xe isotope) high-pressure gaseous xenon TPC with electroluminescence readout. The detectoris based on a PMT plane for energy measurements and a SiPM tracking plane for topological eventfiltering. The experiment will be located in the Canfranc Underground Laboratory in Spain.

Front-end electronics, trigger and data-acquisition systems (DAQ) have been built. The DAQis an implementation of the Scalable Readout System (RD51 collaboration) based on FPGA. Ourapproach for trigger is to have a distributed and reconfigurable system in the DAQ itself. Moreover,the trigger allows on-line triggering based on the detection of primary or secondary scintillationlight, or a combination of both, that arrives to the PMT plane.

KEYWORDS: Data acquisition circuits; Trigger algorithms; Trigger concepts and systems (hard-ware and software); Modular electronics

1Corresponding author.

c� 2012 IOP Publishing Ltd and Sissa Medialab srl doi:10.1088/1748-0221/7/12/C12001

2012 JINST 7 C12001

Contents

1 Introduction: Neutrino Experiment with Xenon TPC (NEXT) 1

2 System hardware architecture 1

2.1 The scalable readout concept 1

3 NEXT-DEMO system architecture 2

4 Trigger system 4

4.1 Trigger description 44.2 Trigger event processing 44.3 Trigger processor 5

5 Test results 6

6 Future work 7

1 Introduction: Neutrino Experiment with Xenon TPC (NEXT)

NEXT (Neutrino Experiment with Xenon TPC) [1] is an experiment to search for neutrino-lessdouble beta decay using a 100 kg radio-pure, 90 % enriched (136Xe isotope) high-pressure gaseousxenon TPC with electroluminescence readout. The detector is based on a PMT plane for energymeasurements and a SiPM tracking plane for topological event filtering. The experiment will belocated in the Canfranc Underground Laboratory in Spain.

NEXT-DEMO is a prototype of NEXT. As the final detector, it is equipped with two sensorplanes in opposite sides of the detector vessel (see figure 1). One plane will measure event energywith PMTs, detecting also the primary scintillation light [2]–[3]. The other plane will use a SiPMarray to follow the primary electron paths and to help in the discrimination of interesting eventsfrom the background [4].

Primary electrons that result from background events and double-beta decays in the TPC activevolume follow random paths due to multiple scattering, ionizing the gas in their movement. Thesecondary electrons produced by this ionization drift towards the anode following the electric fieldlines in the TPC. Electroluminescence is then used at the anode to amplify these weak signals andproduce photons that impact on the SiPM plane array. About 1,000 photons are produced per driftelectron (about 104 detected photon-electrons for a 511 keV event).

2 System hardware architecture

2.1 The scalable readout concept

NEXT-DEMO DAQ and Trigger Systems are based on the Scalable Readout System (SRS) jointlydeveloped with CERN-PH in the framework of the RD51 collaboration [5]–[6]. SRS provides a

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Figure 1. NEXT-DEMO detector.

choice of ASICs, hybrids or discrete frontends, either with analogue, binary or digital readout,which are connected over a customizable interface to the DAQ system. This interface is imple-mented via generic adapter cards to a common module for all applications, the Front-End Concen-trator (FEC) [7] and application-specific adapter cards.

The FEC architecture is built around a configurable FPGA (Xilinx Virtex-5 LX50T) with eventbuffer (external 256-Mbyte DDR2), Gigabit Ethernet, I/O for Trigger and clocks and I/O for theadapter cards (see figure 2). For small systems, like the one here described, FECs are directlyconnected via Gigabit Ethernet cables to a PC farm. The SRS default online system for RD51users is DATE [8].

3 NEXT-DEMO system architecture

For NEXT-DEMO, specific adapter modules have been developed to interface the PMT and SiPMfront-end electronics to the FEC card (DAQ modules). SiPM plane does it through the SiPMFront-End Board (FEB) [9] and a 16-LVDS add-in card buffering data, clock and configurationcommands (DTC card). PMT front-end is interfaced directly through a 16-channel digitizer card(ADC card) [5]. This card is based on a dual 8-channel 12-bit 40-to-50 MHz ADCs.

As shown in figure 2, each DAQ module also has 4-LVDS-pair point-to-point connection (DTClink) to the Trigger module. This connection provides clock, synchronisation, system configurationand trigger commands to the DAQ modules, while trigger candidates and command responses aresent to the Trigger module. Each DTC data line can be operated up to 200 Mb/s. For the DTC link,DAQ modules use the FEC LVDS input (RJ45 socket), while the Trigger Module uses the DTCcard as a signal buffering interface.

As it is shown in figure 3, the DAQ architecture comprises six FEC cards and their correspond-ing adapter cards: five devoted to the readout of the detector planes and another one for triggermanagement and system control. A fast and re-configurable algorithm implemented in the module

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Figure 2. Trigger Module-DTC card connection.

Figure 3. NEXT-DEMO hardware architecture.

FPGA processes the trigger candidates received. Additional trigger sources include external NIMand LVDS inputs.

The front-end electronics work in push mode. DAQ modules readout, time-stamp and storedata coming from the front-end in a reconfigurable-length circular buffer, whose maximum sizecorresponds to approximately twice the maximum detector drift time (up to 800 µs).

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The system is designed for a maximum trigger rate of 10 Hz since events of interest willproduce a trigger rate from 6 to 10 Hz. The DAQ works in raw mode since zero suppression ordata compression are not implemented yet at this stage of the project. With these assumptions,and considering the maximum buffer length, the DAQ produces a maximum data throughput of 22MByte/s for the maximum trigger rate.

The circular buffer is implemented on the FEC’s DDR2 memory. The number of channelsand the sampling rate do not allow writing and reading from the memory at the same time. Thislimitation forces the system to use a single buffer scheme. This fact produces a total dead timeof about 5 ms (5 % for the maximum trigger rate). This limitation will be solved with the nextgeneration of FEC card, which will have a faster FPGA and a four times larger and faster memorythat will allow implementing a double buffer scheme.

A JAVA GUI implemented in the System Configuration PC is used to configure and control thesystem through the Trigger module. A PC farm assembles incoming data from the DAQ modules,and builds complete events and stores them to disk for offline analysis.

4 Trigger system

4.1 Trigger description

In NEXT type detectors, secondary scintillation lights provides also topological information. Inorder to reconstruct the position, the initial time of the event given by the primary scintillationsignal must be in the data sent by the DAQ in order to properly reconstruct the event off-line. Toavoid this, the trigger system should detect events with the highest efficiency through the primaryscintillation light. This would help to avoid an excess of off-line data analysis as well.

As it is mentioned above, the Trigger System is distributed among different modules andimplemented on FPGA (see figure 4). DAQ modules also generate trigger candidates, based on theearly energy estimation of the events received from the PMT plane.

The Trigger module processes all the trigger candidates received and generates a trigger acceptsignal. Upon arrival of a trigger accept signal, buffered data in the DAQ modules are formatted andsent to the PC farm for off-line analysis.

The total trigger latency is about 4 µs. Half of this time is due to the transmission of the triggercandidates and the trigger accept, and the rest due to the processing itself. This latency does notaffect the system due to the large buffer provided and the possibility to send a configurable numberof pre-trigger data.

4.2 Trigger event processing

PMT channels in each DAQ module can be configured to generate trigger candidates. Channelsare marked either as type A or B. This facility allows configuring the trigger to detect two differenttypes of events.

Trigger candidates are generated for each PMT channel (Event Processing unit) by means ofconfigurable thresholds on maximum amplitude, maximum and minimum energy, baseline devi-ation and maximum time of the event, combined with the energy estimation of the events (fig-ure 5). Energy estimation is based on a self-calculated (moving average filter applied to the inputsignal) or a configurable fixed baseline. This allows an efficient rejection of background and non-interesting events.

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Figure 4. NEXT-DEMO trigger scheme.

Figure 5. Trigger candidate generation.

4.3 Trigger processor

The Trigger module implements a reconfigurable hardware algorithm (Trigger Processor). It is alsoable to accept an external trigger source, besides internal trigger candidates defined as Type A andB in the DAQ modules. This allows different trigger modes of operation:

• Single trigger (external trigger or internal trigger type A).

• Double trigger (a combination of type A and B).

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Figure 6. Trigger Algorithm (Double Trigger Mode example).

In this mode, when trigger type A is detected, the trigger system waits a maximum pre-configuredtime for a trigger type B. In case this second trigger happens, the trigger module sends a triggeraccept to the system. In this case, data stored in the DAQ modules are sent to the PC farm. In othercase, the system looks for another trigger of type A, starting the trigger accept searching process.

Two more levels of discrimination are available since it is possible to select the minimumnumber of channels per trigger candidate type in a configurable time window to produce a trig-ger accept.

Figure 6 shows an example of Double Trigger Mode configuration. Trigger accepts are gener-ated if at least 5 trigger candidates of type A in a time window of 100 ns are received, and then, ina maximum time of 200 µs, at least 8 trigger candidates of type B in 150 ns are also received.

5 Test results

Test runs using the Trigger System in NEXT-DEMO show that it is possible to trigger on theprimary scintillation light (S1). This will improve the efficiency of event selection in the differentruns. It also implies an important reduction in the data to be processed off-line (almost a factor 2)since the search for the primary scintillation light off-line from the detected secondary scintillationlight (S2) can be avoided.

These tests have been run with a Na22 source, which produces two anti-collinear 511 keVgammas from e+e- annihilation. One of these gammas was tagged with a NaI scintillator (alsoconnected to the front-end), the other interacted inside the detector fiducial volume.

The system has been configured to trigger on the coincidence of the NaI signal and the S1detected with a single PMT in the chamber. The trigger mode selected has been single trigger (typeA), 2 channels in coincidence in a time window of 25 ns (minimum time window possible sincethe sampling frequency is 40 MHz).

This configuration has shown that it is possible to trigger on events as small as 5–6 photoelec-trons per PMT (figure 7).

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Figure 7. Single Trigger Mode on the primary scintillation light.

Figure 8. Double Trigger Mode to select events of interest.

The results obtained have helped to characterize the detector technology and itstracking capabilities.

The Double Trigger Mode is useful when a defined type of event has to be studied, rejectingother type of events that would produce an increase in the system throughput and an overhead inthe off-line analysis.

This mode allows detecting the primary scintillation light and waits for the secondary scintil-lation light, filtering non-desired events. The maximum time between events is configurable.

In NEXT-DEMO, the double trigger mode has been set to study events of interest as Na22 511keV gamma and Rn222 alpha as it is shown in figure 8.

The different topology of these events has shown the efficiency of the double trigger, sincemore than 85 % of the events collected per run have been suitable for off-line study.

6 Future work

NEXT final detector is more demanding in terms of readout channels and chamber drift time whichimplies more DAQ buffering and processing capacity. The Trigger System will need to be able tosend trigger related data to the PC farm. This implies collecting, formatting and sending informa-tion about the trigger accepted (type of trigger, triggering channels, time window, energy of theevents. . . ).

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The NEXT-DEMO DAQ and Trigger Systems do not satisfy the final needs. Moreover, XilinxVirtex-5 LX50T FPGA in the DAQ and Trigger modules are using around 80% of the logic andmemory available resources. For this reason, a new FEC version is being designed in order to in-crease processing power and data throughput. Virtex-5 FPGA will be replaced by a more powerfulVirtex-6 device, and the DDR2 buffer will be replaced by a four times larger and faster DDR3memory. This new card will allow implementing a double buffer scheme to satisfy a dead timerequirement below 2 % at the maximum trigger rate of 10 Hz. Firmware must be also migrated tothe new device, and a new and more powerful trigger algorithm must be designed.

Acknowledgments

We acknowledge the support of the NEXT and RD51collaborations, the DATE team at CERNPH-AID, and the CONSOLIDER-INGENIO2010 grant CSD2008-0037 (Canfranc UndergroundPhysics) from the Spanish Ministry of Science and Innovation.

References

[1] V. Alvarez et al., NEXT-100 Technical Design Report (TDR), 2012 JINST 7 T06001.

[2] J.J. Gomez-Cadenas and J. Martin-Albo, NEXT, a HPXe TPC for neutrinoless double beta decaysearches, J. Phys. Conf. Ser. 136 (2008) 042048.

[3] L.M.P. Fernandes et al., Primary and secondary scintillation measurements in a Xenon gasproportional scintillation counter, 2010 JINST 5 P09006.

[4] E.D.C. Freitas et al., Secondary scintillation yield in high-pressure Xenon gas for neutrinoless doubleβ decay (0νββ ) search, Phys. Lett. B 684 (2010) 205.

[5] S. Martoiu et al., The SRS scalable readout system for micropattern gas detectors and otherapplications, presented at the Topical Workshop on Electronics for Particle Physics 2012(TWEPP2012), September 17–21, Oxford, U.K. (2012).

[6] RD51 collaboration, Development of micro-pattern gas detectors technologies,http://rd51-public.web.cern.ch/rd51-public/S.

[7] J. Toledo et al., The front-end concentrator card for the RD51 scalable readout system, 2011 JINST 6

C11028.

[8] F. Costa et al., The new frontier of the DATA acquisition using 1 and 10 Gb/s ethernet links, talk givenat the Technology and Instrumentation in Particle Physics conference (TIPP2011), June 9–14,Chicago, U.S.A. (2011).

[9] V. Herrero et al., Readout electronics for the SiPM tracking plane in the NEXT-1 prototype, to appearin Nucl. Instrum. Meth. A.

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