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TheSynchronousModelofComputa6on
StavrosTripakisUCBerkeley
EE249Lecture–Sep15,2009
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Fundamentalcharacteris6csofthesynchronousMoC
• No6onofsynchronous round (orcycle)• Concurrency• Determinism(mostofthe6me)
– Same(sequenceof)inputs=>same(sequenceof)outputs
• Contrastthisto:– Concurrencywiththreads:
• Non‐determinis6c:resultsdependoninterleaving– ConcurrencyinKahnProcessNetworks:
• Asynchronous(interleaving),buts6lldeterminis6c• Needsunboundedbuffersingeneral,forcommunica6on
2
Thesynchronousround
3
inputs
outputs
inputs
outputs
…
rounds
round1 round2
4
Example:synchronousblockdiagram
A
C
rounds
A, B, C A, C, B …
B
5
Example:synchronousblockdiagram
A
C
rounds
A, …
B
B C
A, B C
determinis6cconcurrency
Example:FIRfilter
6
Whereisthesynchronousroundhere?
Example:sequen6allogicdiagram
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Whereisthesynchronousroundhere?
Example:controlloop
8
initialize state; while (true) do read inputs; compute outputs; update state; write outputs; end while;
Whereisthesynchronousroundhere?
Example:controlloop(v2)
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initialize state; while (true) do await clock tick; read inputs; compute outputs; update state; write outputs; end while;
Isthisanimportantmodelofcomputa6on?
• Yes!– Extremelywidespread,bothintermsofmodels/languages,andintermsofapplica6ons
• Examplesofapplica6ons:– Synchronousdigitalcircuits– 99%(?)ofcontrolsoeware
• Read‐compute‐writecontrolloops
• Nuclear,avionics,automo6ve,…
– Mul6media,…
10
Isthisanimportantmodelofcomputa6on?
11
CopyrightTheMathworks
EnginecontrolmodelinSimulink
HW SW++c.f.SimulinktoFPGA,
ortoHDL
Isthisanimportantmodelofcomputa6on?
• Yes!– Extremelywidespread,bothintermsofmodels/languages,andintermsofapplica6ons
• Examplesofmodelsandlanguages:– Mealy/Mooremachines– Verilog,VHDL,…– (discrete‐6me)Simulink– Synchronouslanguages– (Synchronous)Statecharts– Thesynchronous‐reac6ve(SR)domaininPtolemyII– …
12
Mythsaboutsynchronousmodels
• Synchronousmodelshavezero‐1meseman6cs– Synchronousseman6csareessen6allyun0med:theydonothaveaquan6ta6veno6onof6me.
– FamousEsterelstatements[Berry‐Gonthier‘92]:• every 1000 MILLISEC do emit SEC end • every 1000 MILLIMETER do emit METER end
– Synchronousmodelscancaptureboth0me‐triggeredandevent‐triggeredsystems.E.g.:
• Dosomethingevery20ms• Dosomethingwheneveryoureceiveaninterruptfromtheengine
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Example:controlloop(v3)
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initialize state; while (true) do await clock tick
or any other interrupt; read inputs; compute outputs; update state; write outputs; end while;
Mythsaboutsynchronousmodels
• But:– Thesynchronouscyclescouldbeinterpretedasdiscrete6me:0,1,2,3,…,inwhichcasewehaveadiscrete‐6meseman6cs…
– …andthiscanalsobeseenasanabstrac6onofreal‐6me:
– C.f.6minganalysisofdigitalcircuits
– C.f.WCETanalysisofsynchronouscontrolloops
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Mythsaboutsynchronousmodels
• Synchronousmodelsarenon‐implementable(becausezero‐6meisimpossibletoachieve)– Hein?
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Real‐TimeWorkshop
Benefitsofsynchronousmodels
• Oeenmorelight‐weightthanasynchronous– Nointerleaving=>lessstateexplosion
• Oeendeterminis6c– Easiertounderstand,easiertoverify
• SWimplementa6ons:– Noopera6ngsystemrequired– Sta6cscheduling,nomemoryalloca6ons,nodynamiccrea6onofprocesses,…
• Simple6ming/schedulabilityanalysis– OeensimpleWCETanalysisalso:noloops
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Asynchronousvs.SynchronousProduct
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Lectureplan
• Part1:Single‐ratesynchronousmodels
• Part2:Mul6‐ratesynchronousmodels
• Part3:FeedbackandCausality
19
Part1:Single‐ratesynchronousmodels
• Moore/Mealymachines• Synchronousblockdiagrams
– Inspiredbydiscrete‐6meSimulink,andSCADE
• Lustre• Esterel
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MooreMachines
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• States:{q0,q1,q2,q3}• Ini6alstate:q0• Inputsymbols:{x,y,z}• Outputsymbols:{a,b,c}• Outputfunc6on:
– Out:States‐>Outputs• Transi6onfunc6on:
– Next:StatesxInputs‐>States
Whereisthesynchronousroundhere?
determinis0c
Mooremachine:acircuitview
22
Next Out
clock
x(n)
y(n)
s(n)
MealyMachines
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• States:{S0,S1,S2}• Ini6alstate:S0• Inputsymbols:{0,1}• Outputsymbols:{0,1}• Outputfunc6on:
– Out:StatesxInputs‐>Outputs• Transi6onfunc6on:
– Next:StatesxInputs‐>States
Whereisthesynchronousroundhere?
Mealymachine:acircuitview
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Next Out
clock
x(n)
y(n)
s(n)
Isthisa“purelysynchronous”model?
Moorevs.Mealymachines
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MooreorMealy?
MooreorMealy?
Moorevs.Mealymachines
• EveryMooremachineisalsoaMealymachine– Why?
• IsitpossibletotransformaMealymachinetoaMooremachine?
26
27
Synchronousblockdiagrams
• Physicalmodelsoeendescribedincon6nuous‐6me
• Controllerpart(e.g.,TransmissionControlUnit)isdiscrete‐6me
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Synchronousblockdiagrams
Example:FIRfilter
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WhatistheMealymachineforthisdiagram?
30
Hierarchyinsynchronousblockdiagrams
A B
P
31
Hierarchyinsynchronousblockdiagrams
Fundamentalmodularityconcept
P
Seman6csofhierarchicalSBDs
• Canwedefinetheseman6csofacompositeSBDasaMealymachine?– Inpar6cular,withapairof(Out,Next)func6ons?
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33
Problemwith“monolithic”seman6cs
A
B
P
P.out(x1, x2) returns (y1, y2) { y1 := A.out( x1 ); y2 := B.out( x2 );
return (y1, y2); }
x1
x2y2
y1
FalseI/Odependencies=>
Modelnotusableinsomecontexts
34
Solu6on
• Generalizefromasingle,toMANYoutputfunc6ons
P.out1( in1 ) returns out1 { return A.out( in1 ); }
P.out2( in2 ) returns out2 { return B.out( in2 ); }
A
B
P
[DATE’08,RTAS’08,POPL’09]
Lustre
• TheFIRfilterinLustre:
35
node fir (x : real) returns (y : real); var s1, s2 : real; let s1 = 0 -> pre x; s2 = 0 -> pre s1; y = x/3 + s1/3 + s2/3; tel
Lustre
• TheFIRfilterinLustre:
36
node fir (x : real) returns (y : real); var s1, s2 : real; let s1 = 0 -> pre x; s2 = 0 -> pre s1; y = x/3 + s1/3 + s2/3; tel
Lustre
• TheFIRfilterinLustre:
37
node fir (x : real) returns (y : real); var s1, s2 : real; let y = x/3 + s1/3 + s2/3; s2 = 0 -> pre s1; s1 = 0 -> pre x; tel
Whathaschanged?Isthiscorrect?
Lustre
• TheFIRfilterinLustre(noexplicitstatevars):
38
node fir (x : real) returns (y : real); let y = x/3 + (0 -> pre x)/3 + (0 -> (0 -> pre pre x))/3; tel
Esterel• TheFIRfilterinEsterel:
39
module FIR: input x : double; output y : double;
var s1 := 0 : double, s2 := 0 : double in loop await x ; emit y(x/3 + s1/3 + s2/3) ; s2 := s1 ; s1 := x ; end loop end var.
Esterel• TheFIRfilterinEsterel:
40
module FIR: input x : double; output y : double;
var s1 := 0 : double, s2 := 0 : double in loop await x ; emit y(x/3 + s1/3 + s2/3) ; s1 := x ; s2 := s1 ; end loop end var.
Whathaschanged?Isthiscorrect?
Esterel• AspeedometerinEsterel:
41
module SPEEDOMETER: input sec, cm; % pure signals output speed : double; % valued signal loop var cpt := 0 : double in abort loop await cm ; cpt := cpt + 1.0 end loop when sec do emit speed(cpt) end abort end var end loop.
Lustre
• ThespeedometerinLustre:
42
node speedometer(sec, cm: bool) returns (speed: real); var cpt1, cpt2 : int; sp1, sp2 : real; let cpt1 = counter(cm, sec); sp1 = if sec then real(cpt1) else 0.0; cpt2 = counter(sec, cm); sp2 = if (cm and (cpt2 > 0)) then 1.0/(real(cpt2)) else 0.0; speed = max(sp1, sp2); tel
Part2:Mul6‐ratesynchronousmodels
• Synchronousblockdiagramswithtriggers– Inspiredbydiscrete‐6meSimulink,andSCADE
• Lustrewithwhen/current• WhataboutEsterel?
43
44
Triggeredand6medsynchronousblockdiagrams
• Mo6vatedbySimulink,SCADE
Triggeredblock
Simulink/Stateflowdiagram Sample6me
45
Triggeredsynchronousblockdiagrams
A
B C
P
TRIGGEREDBLOCK
TRIGGER
mul0‐ratemodels:
• B executed only when trigger = true
• All signals “present” always • But not all updated at the
same time • E.g., output of B updated only
when trigger is true need initial value in case trigger = false at n = 0 (initial round)
v
Ques6on:dotriggersincreaseexpressiveness?
46
Triggerelimina6on
47
Triggerelimina6on:atomicblocks
48
Timeddiagrams
A
(3,1)
BC
P
“TIMED”BLOCKS
“sta0c”mul0‐ratemodels (2,0)
(period,phase)specifica6ons
49
Timeddiagrams=sta0callytriggereddiagrams
A
(3,1)
BC
P
(2,0)A B C
P
(3,1) (2,0)
=
(2,0)where
produces: true, false, true, false, …
Mul6‐clocksynchronousprogramsinLustre
• Thenwhenandcurrentoperators:
50
node A(x: int, b: bool) returns (y: int); let y = current (x when b); tel
0 1 2 3 4 5 ... T F T F F T ... 0 2 5 ... 0 0 2 2 2 5 ...
x: b:
x when b: y:
Mul6‐clocksynchronousprogramsinLustre
51
node A(x1,x2: int, b: bool) returns (y: int); let y = x1 + (x2 when b); tel
Whatisthemeaningofthisprogram?
ForbiddeninLustre
Mul6‐clocksynchronousprogramsinLustre
• InLustre,everysignalhasaclock=“temporal”type
• Theclock‐calculus:asortoftypechecking– Onlysignalswithsameclockcanbeadded,mul6plied,…
– Howtocheckwhethertwoclocks(i.e.,booleansignals)arethesame?• Problemundecidableingeneral• InLustre,checkissyntac6c
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Mul6‐rateinEsterel
53
every 1000 MILLISEC do emit SEC end || every 1000 MILLIMETER do emit METER end
MILLISEC
MILLIMETER
SEC
METER
Part3:FeedbackandCausality
• Vanillafeedback:– Cyclicdependencies“broken”byregisters,delays,…
• Unbrokencyclicdependencies:– Lustre/SBDsolu6on:forbidden– Esterel/HWsolu6on:forbiddenunlessifitmakessense
• Malik’sexample
• Construc6veseman6cs
54
FeedbackinLustre
55
node counter() returns (c : int); let c = 0 -> (pre c) + 1; tel
node counter() returns (c : int); let c = 0 -> c + 1; tel
OK
Rejected
FeedbackinSynchronousBlockDiagrams
• SameasLustre:
56
A B
Rejected,unlessAorBisMooremachine
Whataboutthis?
57
Cycliccombina0onalcircuit.Useful:equivalentacycliccircuitisalmost2xlarger
[Malik’94]
z = if c then F(G(x)) else G(F(x))
Canwegivemeaningtocyclicsynchronousmodels?
• Thinkofthemasfix‐pointequa6ons:– x = F(x)
• Whatisthemeaningofthese:– x = not x – x = x
• Isuniquesolu6onenough?– x = x or not x
58
Construc6veseman6cs
• Reasoninconstruc6velogicinsteadofclassicallogic
• “xornotx”notanaxiom
• Thenwecannotprovex=1from:– x = x or not x
59
Construc6veseman6cs
• Fix‐pointanalysisinaflatCPO:– Startwith“boxom”(undefined),iterateun6lfix‐pointisreached:
• Guaranteedinfinitenumberofitera6ons,becauseno.signalsandno.valuesarebothfinite
– Ifsolu6oncontainsnoundefinedvalues,thencircuitisconstruc6ve
• Inourexample:– x = x or not x – Boxomisthefix‐point– Circuitnotconstruc6ve
60
True
Т
False
Т
Т
Construc6veseman6cs:theore6calbasis
• Kleenefixedpointtheorem:– Let L be a CPO and f : L → L be a con5nuous (and therefore monotone) func5on. Then f has a least fixed point equal to sup{bot,f(bot),f(f(bot)),…}
• InourflatCPO,con6nuous=monotone:– Non‐monotone:f(bot) > f(a), whereaisnotbot – Notarealis6cfunc6on
• InoutflatCPO,termina6onisguaranteed.
61
Construc6veseman6cs
• Anotherexample:– x = a and not y – y = b and not x
• Herewehaveexternalinputs,musttryforallpossibleinputcombina6ons
• Exercise!
62
Summary
• Synchronousmodelofcomputa6on:– Widespread,manylanguages,manyapplica6ons– Easiertounderstand,easiertoverify(thanasynchronousinterleaving)
– Interes6ngseman6cally
• Togofurther:– Interes6ngimplementa6onproblems:howtopreservetheproper6esthatthesynchronousabstrac6onprovides(determinism,values,…)duringimplementa6on?
63
Ques6ons?
64
References• Statemachines(Moore,Mealy,…):
– SwitchingandFiniteAutomataTheory.ZviKohavi,McGraw‐Hill,1978.• Synchronousblockdiagrams:
– LublinermanandTripakispapersonmodularcodegenera6on:availablefromhxp://www‐verimag.imag.fr/~tripakis/publis.html
• Synchronouslanguages:– “Thesynchronouslanguages12yearslater”,Proc.IEEE,Jan2003,and
referencestherein.• Construc6veseman6cs:
– SharadMalik.Analysisofcycliccombina0onalcircuits.ICCAD1993.– GerardBerry.TheConstruc0veSeman0csofPureEsterel.Draebook,1996,
downloadable,googleit.• General,overview:
– P.Caspi,P.RaymondandS.Tripakis.SynchronousProgramming.InI.Lee,J.Leung,andS.Son,editors,Handbook of Real‐Time and Embedded Systems.Chapman&Hall,2007.Availablefromsiteabove.
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