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The simplified DLX The datapath & control story: What happens in each control state .

The simplified DLX

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The simplified DLX. The datapath & control story: What happens in each control state. The Datapath. The Datapath consists of several environments, buses, registers and multiplexers. At the right there is a general scheme of the entire Datapath (no drivers, only muxes). datapath.pdf. - PowerPoint PPT Presentation

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Page 1: The simplified DLX

The simplified DLX

The datapath & control story:

What happens in each control state.

Page 2: The simplified DLX

The Datapath

The Datapath consists of several environments,

buses, registers and multiplexers .

At the right there is a general scheme of the

entire Datapath (no drivers, only muxes).

datapath.pdf

Page 3: The simplified DLX

What is RTL?

RTL = Register Transfer Language

The RTL describes the operations done in each Control’s state in terms of “what is written to the registers.”

Note: This description is just of the functionality and not of the way of implementation.

Examples:

• IR=M[PC]• A=RS1• B=RS2• PC=PC+1

Page 4: The simplified DLX

The ControlThe Control is a state machine that consists of 20 states.

The Control’s signals control the data flow .

fsd_idlx.pdf

Page 5: The simplified DLX

What happens during Fetch state?

DinAdr

Dout

W

Busy

MemoryEnv.

Control

IR Env.

IR

PC

MR Was the mission

completed?

Sample!1) The PC register contains the address.

2) The desired functionality: IR M[PC]

FetchThe Control usually stays in fetch state

for more than one clock cycle

3) The memory is very slow. It announces: “I’m busy” after getting a read / write request. When busy, no new requests are allowed. As Dout stablizes, the memory announces: “I’m done”. Only then the control asks the IR Env. to sample Dout’s value and update the IR register.

Reminder…

Page 6: The simplified DLX

In our explanation about the different states we also describe the RTL instructions that correspond to each state of the Control. Let’s start:

1 (Fetch .

RTL Instruction: IR=M[PC]

Action:The instruction pointed to

by the PC is read from the memory and

is stored to the IR register.

The Fetch state might last more than one clock cycle. The DLX stays in this state as long the “busy” signal is active.

The Control (Cont.)

Active Control Signals: IRce, PCAOdoe, MR

IR’s Clock Enable

The PC Env. address out’s

driver is enabled

Memory Read

Page 7: The simplified DLX

The Control (Cont.)2 (Decode .

RTL Instructions: A=RS1

B=RS2PC=PC+1

Actions:The contents of the

RS1 and RS2 (if needed) registers are stored in the A and B registers

) that are located in the GPR Env (.and the PC’s register value

is incremented by 1 )to point to the next instruction.(

Active Control Signals: Ace, Bce, PCS1doe, 1S2doe, ALUDINTdoe, Add, PCce

PC’s value’s driver is enabled and the PC is outputted to S1

1’s const value’s driver is enabled and this value is outputted to S2

The ALU’s output value’s (PC+1) driver is enabled

PC’s clock enable (for storing the new PC)

Page 8: The simplified DLX

GPR Env.

A B

C

Cce IR Env.

1 0 ITYPE

ALU Env. ALU Control signals

Result

A. Arithmetic/Logic instructions:

What happens during Execute state (Cont.)?

Sext (Imm.)

Reminder…

Page 9: The simplified DLX

3 (ALU .

RTL Instruction:C=A op B

Action:An arithmetic operation is done

on the arguments (which are the contents of the A and B registers.(

The result is stored in the C register in the GPR Env.

Active Control Signals: AS1doe, BS2doe, OPALU, ALUDINTdoe, Cce

The Control (Cont.)

The name of a group of signalsThe A register’s value’s

driver is enabled and its value is outputted to S1

The B register’s value’s driver is enabled and its value is outputted to S2

Page 10: The simplified DLX

The Control (Cont.)

4 (ALUI (Add) .

RTL Instruction:C=A + imm.

Action:The sum of the addition of

the value of the A register in the GPREnv. and the immediate’s value is

stored in the C register in the GPR Env.

Active Control Signals: AS1doe, IRS2doe, OPALU, ALUDINTdoe, Cce

The IR register’s value’s driver is

enabled and its value (=immediate) is outputted to S2

Page 11: The simplified DLX

The Control (Cont.)

5 (ShiftI .

RTL Instruction:C=ShiftLeft A / ShiftRight A

Action:The value of the A register is being

shifted one step right or left .The direction is determined by

IR[1].

Active Control Signals: AS1doe, Cce, shift (left or right).

In a general shifter: the shift amount is coded in IR…

Page 12: The simplified DLX

B. Test&Set instructions:

Sgri: RD (RS1 > Sext(Imm) ? 1 : 0)

GPR Env.

A B

C

Cce IR Env.

1 0 ITYPE

ALU Env. TEST

Result

Sext (Imm.)

Two stages:1) executeC (RS1 > RS2 ? 1:0)

2 (writebackRD CIn this way the period

time is shorter .

What happens during Execute state (Cont.)?

Always 0 / 1

Reminder…

Page 13: The simplified DLX

6 (TestI

RTL Instruction: C=A rel imm.

Action:A logic operation is done

on the arguments )which are the contents of

the A register and the immediate valuethat is supplied by co in the IR Env.(.

The result is stored in the C register in the GPR Env.

Active Control Signals: AS1doe, IRS2doe, Cce, ALUDINTdoe, test

Comparison to be conducted: can be extracted from last 3 bits in the opcode.

The Control (Cont.)

Page 14: The simplified DLX

3) Jump instructions:

A. Unconditional jump: Jump Reg (jr): PC A

What happens during Execute state (Cont.)?

No direct path from A to PC. Instead:

GPR Env.

AIR Env.

0

ALU Env. ADD

PC Env.

PC Cce

Reminder…

Page 15: The simplified DLX

8 (JR .

RTL Instruction:PC=A

Action:In this state that deals with

jumping, the PCregister gets the address of the

instruction to jump to. This addressis stored in the A register in the GPR

Env.

Active Control Signals: AS1doe, 0S2doe, add, ALUDINTdoe, PCce

The Control (Cont.)

Page 16: The simplified DLX

C. Calling a routine: ”Jump, remember your address so it will be possible to get back to this address”

jalr: R31 PC+1

PC RS1

We use two Control states in order to execute this instruction because we want to avoid a collision in the buses (to be elaborated).

What happens during Execute state (Cont.)?

Reminder…

Page 17: The simplified DLX

State I: Copying the PC (2 clock cycles)

GPR Env.

C

PC Env.

PC Cce

Clock cycle 1 (savePC):

GPR Env.

C

R31

Clock cycle 2 (like in the Write-Back state):

Write!

The address=31

What happens during Execute state (Cont.)?

Reminder…

Page 18: The simplified DLX

State II (JALR): Calculating the jump address

PC Env.

PC

ALU Env.

IR Env.0

GPR Env.

A

ADD

Cce

What happens during Execute state (Cont.)?

Reminder…

Page 19: The simplified DLX

The Control (Cont.)

9 (SavePC .

RTL Instruction:C=PC

Action:The PC is stored

in the C register in the GPR Env.

Active Control Signals: PCS1doe, 0S2doe, add, ALUDINTdoe, Cce

Page 20: The simplified DLX

The Control (Cont.)

17 (JALR.

RTL Instructions:PC=A

R31=C (=old PC)

Actions:In this state that deals with jumping,

the PC’s current value is stored in the 31’st register in the GPR

and the address of the instruction we jump to is stored in the PC and

comes from the A register in the GPR.

Active Control Signals:AS1doe, 0S2doe, ALUDINTdoe, add, PCce, GPR_WE, Jlink

Page 21: The simplified DLX

B. Branch: “Jump only if a condition is satisfied”

beqz: PC PC+1+(RS1=0 ? Sext (Imm.) : 0)

bnez: PC PC+1+(RS1=0 ? 0 : Sext (Imm.))

We’ll demonstrate the beqz instruction. Two states are needed:

State I - Branch: Check the condition – RS1=0 ? Sext (Imm.) : 0

GPR Env.

AIR Env.

0

ALU Env. TEST

Comparison result

To the Control

What happens during Execute state (Cont.)?

Reminder…

Page 22: The simplified DLX

10 (Branch .

RTL Instruction:Branch taken?

Action:In the Beqz and Bnez instructions ,

when reaching this state, a check ofthe A register’s value is done.

According to this check, a path to continue with is determined.

The Control (Cont.)

Active Control Signals: AS1doe, 0S2doe, test

Page 23: The simplified DLX

The next state

BTakenFetch

State II - BTaken: Calculating the jump – PC PC+1+(Result of state I)

IR Env.

ALU Env.

PC Env.

PC Cce

PCSext (Imm.)

ADD

What happens during Execute state (Cont.)?

JumpNo

Jum

p

Reminder…

Page 24: The simplified DLX

18 (BTaken .

RTL Instruction:PC=PC+imm.

Action:The PC gets the address of

the next instruction to be executed.The address is based on the Branchstate’s result. The value to be added

to the PC comes from the cooutput of the IR Env.

Active Control Signals: PCS1doe, IRS2doe, add, ALUDINTdoe, PCce

The Control (Cont.)

Page 25: The simplified DLX

The Control (Cont.)

11 (WBR .

RTL Instruction:RD=C (R-type)

Action:The data which is stored in the Cregister in the GPR env. (after thearithmetic\shift operations are done(

is being assigned to the instruction’starget register .

Active Control Signal: GPR_WE

Page 26: The simplified DLX

12 (WBI .

RTL Instruction:RD=C (I-type)

Action:Copy the result stored in the C

register in the GPR env. (after thearithmetic\logic operations are done(

to the instruction’starget register .

Active Control Signals: GPR_WE, ITYPE

The Control (Cont.)

Page 27: The simplified DLX

Reading From Memory - Load

Load Word (lw): RD M(Sext(imm.) + RS1)

Four states are needed for finishing the load instruction:

State I: Effective Address Computation – MAR A+C0

GPR Env.

A

IR Env.

ALU Env.

MAR

C0

ADD

Sext(imm.) + RS1

Sext(imm.)

Reminder…

Page 28: The simplified DLX

The Control (Cont.)

7 (AddressCmp .

RTL Instruction:MAR=A+imm.

Action:The memory address where a

data should be written to is stored in the MAR register. The address itselfis the sum of the immediate valuesupplied by the IR Env. and the A

register in the GPR Env.

Active Control Signals: AS1doe, IRS2doe, add, ALUDINTdoe, MARce.

Page 29: The simplified DLX

State II: Memory Access (Load). This state lasts till the value is returned – MDR M(MAR)

Reading From Memory – Load (Cont.)

Adr

Dout W

MemoryEnv.

MAR

Read!

MDR

Notes:

1) Busy signal informs the Control when the operation is over (Dout is stable).

2) MDR samples Dout every clock cycle, no need to compute CE (Simplifies Control).

3) Dout must be logical even if its value is incorrect!

Busy

Tells the Control when readung is over

Reminder…

Page 30: The simplified DLX

The Control (Cont.)

13 (Load .

RTL Instruction:MDR=M[MAR]

Action:Store M[MAR] in MDR

Active Control Signals: MR, MDRce, Asel, MDRsel

Page 31: The simplified DLX

State III (copy MDR to C): Writing MDR’s value to C in the GPR : C MDR

Reading From Memory – Load (Cont.)

MDR

GPR Env.

C

Cce

State IV: Write-Back: RD C

Reminder…

Page 32: The simplified DLX

16 (CopyMDR2C.

RTL Instruction:C=MDR

Action:Copy MDR contents to C register in the GPR.

The Control (Cont.)

Active Control Signals: MDRS1doe, 0S2doe, add, ALUDINTdoe, Cce.

Page 33: The simplified DLX

GPR Env.

B

Writing To Memory – Store (Cont.)

MDR

State II: Copying the B register’s (this is RD) value to the MDR : MDR B

State III: Memory Access (Store) – M(MAR) MDR

Adr

W

MemoryEnv. MAR

Write!

MDRDin

Busy

Tells the Control when writing is over

Reminder…

Page 34: The simplified DLX

The Control (Cont.)

15 (CopyGPR2MDR .

RTL Instruction:MDR=B

Action:The value to be next written to

the memory is stored in this statein the MDR. The value itself comes

from the B register in the GPR.

Active Control Signals: MDRS1doe, BS2doe

Page 35: The simplified DLX

14 (Store .

RTL Instruction:M(MAR)=MDR

Action:The instruction that is stored in theMDR is copied to the memory Env.The address in the memory Env.

is taken from the MAR.

Active Control Signals: MARS1doe, MW

The Control (Cont.)