The Power to Amaze.

CADFEM SUISSE USERS’ CONFERENCE 2016

THERMAL, MECHANICAL AND ELECTRICAL

DESIGN OF A POWER INVERTER USING ANSYS

WORKBENCH

Klaus Neumaier, Yafan Zhang

June 16, 2016

2

• Introduction

– Fairchild Semiconductor (FCS)

– Package & System Simulation

• Device Under Test

• Design Data Import

• Parasitics Extraction (Ansys Q3D)

• Structural Model (Ansys Mechanical)

• Electronics Cooling (Ansys Icepak)

Agenda

3

Fairchild Semiconductor

Technology Development Centre Munich Products:

Analog, Logic & Optoelectronic Devices

Discrete Semiconductors

Power Semiconductor Modules

Packages:

Big variety of packages, standard and Fairchild specific module packages

Applications:

Motion Control, Mobile, Automotive,

Energy Conversion (esp renewable), Power Supplies, Consumer, Lightning

Technology Development Centre

Munich

4

Introduction

• ANSYS WB : integrated modeling and solver tools (different types of

analyses)

Modeling: DesignModeler, SpaceClaim + Solid Edge, E/CAD

Structural: ANSYS Mechanical + ANSYS Moldflow, LS-Dyna

Thermal: ICEPAK, Simplorer

Electrical: Simplorer, Q3D + PSPICE, TCAD

• Power Electronics Packaging Simulation Goal:

Multi-Level & Multi-Domain Modeling

• Device Under Test: Optimization of a large current density and highly

parallelized 3-phase reference board for motor drive applications

(ref. PCIM Europe 2016, 10-12 May, Nuremberg, Germany)

5

Device Under Test

Motor drive power

• Need for compact high power (> 5kW) motor drive applications that enable fast

switching and good thermal management

• 3-phase 100V/100A design presented, 10 parallel FDMD85100 devices in parallel for

each phase (can be operated up to 480 A) => 30 packages on the PCB

FDMD85100: Accommodates two

FCS N-channel PowerTrench MOSFETS

6

Design Data Import in WB

E/CAD

OUT1

Thermal

Pad

Driver

PGND

PGND

Top Layer

10x H

B M

OS

FE

T

Signal Bus

Drain

OUT1

Connector

SpaceClaim Bottom

Layer

CA

D

FDMD85100

PowerTrench® MOSFET

Leadframe

2x MOSFET (soldered)

Overmolded S

Iwa

ve

Improved

Data

Exchange by

ANSYS R17

by

integrating

SpaceClaim

7

• Problem: Influence of board parasitics on losses and undesired oscillations

• ANSYS Q3D was used for PCB parasitics extraction

• In doing so, one can avoid

– oscillations originating from parasitics in the main power loop

– Large parasitics on the source side of the switching device which can

heavily impact losses

Parasitic Extraction

8

Parasitic Extraction

Total Loop

inductance

Source-Ground

Parasitic

Undesired turn on

osciallations

And losses

Using 3-D simulation Lp optimization can be conducted

9

Parasitic Extraction Self inductance, nH Point 1 Point 2 30MHz

1 D D1 3.2249

2 D D5 3.2072

3 D D10 3.45

4 D1 D5 2.4024

5 D5 D10 2.3837

Self inductance, nH Point 1 Point 2 30MHz

1 G1 S1 1.97167

2 G1 S5 2.5771

3 G1 S10 0.41862

4 G2 S1 0.341715

Dendrite structure for

improved parasitics

Shortening of

dentride arms

10

Material Input Data

Structural Model – Metal Fraction

Extraction

Cadence

*.brd file

1. E/CAD data mapped on regular grid => homogenized metalization

Layer Top Layer Dielectric Layer Bottom

2. Homogenized data mapped on FE Mesh

Assign

FR4

11

Structural Analysis – Equivalent Material

Properties

Layer Top Layer Dielectric

Layer Bottom

Assign

FR4

Structural Simulation

ds.dat includes 664 Material

Definitions !

Thermal Simulation

ds.dat includes 664 Material

Definitions !

Obtained Equivalent Material

Properties are assigned to elements

• Equivalent Material Properties can not be visualized in WB

• ds.dat files shows the definitions and assignment to

elements

• Limitation: Vias are generally filled (no Cu plating)

• No problem for structural investigations

• For thermal analyses provide ‚equivalent‘ material

properties

12

Structural Model – Thermal Analysis

Layer Bottom

° C

Top Bottom

Cut Plane Through Package

Vias and Traces are not visible in

thermal contours

Static Thermal Analysis

Tambient = 23 °C

Convection: α=10 W/m² (estimate)

Radiation: ε=0.8

P/MOSFET = 0.8 W DC (worst case estimate)

48 W total

Thermal Improvements needed !

13

Structural Model – Thermomechanical

Results

Layer Bottom

Uz [mm]

Static Structural Analysis

• Temperature results are mapped from thermal investigation

• All material properties are linear-elastic

• PCB mechanically fixed at center

• Warpage of maximum 0.8 mm offers capabilities to accomodate all

packages in a common heat sink

10X Scale

SEquiv[MPa]

Warpage

Stress (w/o Packages)

Highest Stresses in Chip-Solder

Interface and Package Attach

Mesh does not meet the

requirements for Package-Level

Reliability investigation SEquiv[MPa]

14

System Thermal Analysis using ICEPAK

Thermal Measurement Setup

Tamb=23°C

Natural Convection Cooling

Loadcase 1: Single Package @

P/MOSFET = 0.22 W, 0.42 W, 0.66 W,

0.93 W, 1.19 W

Loadcase 2: Three Packages @

P/MOSFET = 0.475 W

• Meshing strategy: local mesh assemblies

• Assemblies reflect objects orthogonal bounding

• ICEPAK modeling limitated in terms of object rotation

• 25 Mio Cells needed

Orthogonal bounding box

assemblies only

PCB

packages

Assembly Problem

15

System Thermal Analysis

PCB Modeling by E/CAD Data Import

Traces Bottom Layer

Vias

Layers

Vias

Rth

Plates

Traces Top Layer

16

System Thermal Analysis

PCB Material Modeling

z-plane

xy-plane

% metal

z-plane

Top

Dielectric

Bottom

ANSYS computes virtual

material (taken from FR-4 and

Cu) for vias

board_config.dat

K_eff

[W/mK]

17

System Thermal Analysis

z-plane

Single Package

Test

3-package

Test

System Thermal Analysis of 30 packages

THANK YOU