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©20
07 T
he M
athW
orks
, Inc
.
® ®
The MathWorks TodayTechnical Computing and Model-Based Design
Paul BarnardDesign Automation
The MathWorks
2
® ®
Common Themes in Aerospace
Time-to-market pressures, regulatory guidelines,
risk management
Time-to-market pressures, regulatory guidelines,
risk management
Increased functionality,more complexity,
difficult implementation choices
Increased functionality,more complexity,
difficult implementation choices
Distributed, multidisciplinarydevelopment teams
Distributed, multidisciplinarydevelopment teams
Differentiation by innovationDifferentiation by innovation
3
® ®
Source: Return on Investment for Independent Verification & Validation, NASA, 2004.
Requirements Design Code TestTest
Code
Design
Requirements
0
5
10
15
20
25
30
35
40
45
50
Relative Cost to Fix
Phase Found
Def
ect
Type
Relative Cost to Fix Defects per Phase Found
Test Code Design Requirements
4
® ®
Inputs ResultsTasks
Technical Computing Workflow
5
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded Software Digital Electronics
Implementation
Continuous Verification and Validation
Test environments(T&M, HIL, SIL,
PIL)Integration
PhysicalComponents
PhysicalComponents
EnvironmentEnvironment Execution H
arness E
xecution Harness AlgorithmsAlgorithms
Test
Research System Design
6
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded Software Digital Electronics
Continuous Verification and Validation
Test environments(T&M, HIL, SIL,
PIL)Integration
PhysicalComponents
PhysicalComponents
EnvironmentEnvironment Execution H
arness E
xecution Harness AlgorithmsAlgorithms
Test
Research
Implementation
System Design
7
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded Software Digital Electronics
Continuous Verification and Validation
Test environments(T&M, HIL, SIL,
PIL)Integration
PhysicalComponents
Environment
Algorithms
Test
Research
Implementation
System Design
8
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded SoftwareDigital Electronics
Test
Continuous Verification and Validation
Test environments(T&M, HIL, SIL,
PIL)
GenerateGene
rate
Integration
?
PhysicalComponents
Environment
Algorithms
Research
Implementation
System Design
9
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded SoftwareDigital Electronics
Research
Continuous V&V
GenerateGene
rate
Integration
PhysicalComponents
Environment
Algorithms
Test
?
Implementation
System Design Requirements
Test environments
(T&M, HIL)
10
® ®
Successful adoption of Model-Based Design in Aerospace and Defense
Lockheed MartinFlight control system for F-35 Joint Strike FighterOverall reduction in manhours/SLOC of ~40%
HoneywellFlight-control systemsDesign times at Honeywell cut by 60%
BAE SYSTEMSSoftware-Defined Radio for satellite communicationsDevelopment time cut by 80%, Clocking and interfacing simplified
Flying-CamAutonomous mini-helicopter controller Development time reduced, error-free implementation
NASA Hyper-X Flight control software for X-43A scramjet vehicleDevelopment time reduced by months
Swedish Space CorporationAttitude and orbit control system for lunar satelliteSystem development reduced - 50%
11
® ®
BroadcomUMTS processor developmentDevelopment time cut by half compared to C coding
BridgeWave CommunicationsBuilding-to-building wireless EthernetCut development time from eight months to five
RealtekAudio processing codec chipReported higher return on investment
Yokogawa ElectricOptical network components50% improvement in development timeCoding errors fixed before hardware testing
Successful Adoption of Model-Based Designin Communications and Electronics
12
® ®
Embedded MATLABMultidomain Modeling and SimulationVideo and Image ProcessingVerificaton and ValidationFlight Code GenerationHDLDistributed Computing
Key Technology Investment Areas
13
® ®
PhysicalComponents
PhysicalComponents
EnvironmentEnvironment Execution H
arness E
xecution Harness AlgorithmsAlgorithms
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopmentAlgorithm
Development
Data
Code
Hardware
C, C++C, C++
MCUMCU DSPDSP
Embedded Software Digital Electronics
Research Design
Implement V&V
Test environments
(T&M, HIL, SIL, PIL)
Test environments
(T&M, HIL, SIL, PIL)
RequirementsRequirements
Integration
Gen
erat
e
Gen
erat
eEmbedded Algorithm
Development
Algorithms
Embedded MATLAB functions
Embedded MATLAB functions
Simulink block
diagrams
Continuous Verification and Validation
FPGAFPGA ASICASIC
HDL(VHDL, Verilog)
HDL(VHDL, Verilog)
Generate
Generate
14
® ®
Embedded MATLAB,
Embedded Subset of MATLAB Language
Floating and fixed-point
Brings MATLAB algorithms into Simulink and Stateflow models
C code generation with Real-Time Workshop
15
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++
MCU DSP FPGA ASIC
HDL(VHDL, Verilog)
Embedded Software Digital Electronics
Implement V&V
Research Design
Test environments(T&M, HIL, SIL,
PIL)
RequirementsRequirements
Integration
GenerateG
ener
ate
Physical Modeling
PhysicalComponents
PhysicalComponents
EnvironmentEnvironment Execution H
arness E
xecution Harness AlgorithmsAlgorithms
Continuous Verification and Validation
16
® ®
Introduction to SimscapeExtension of Simulink® designed to model multidomain physical systems
Eases process of modeling physical systems
Does not require deriving and programming the equations of motion for the system
Used by system engineers and control engineers to build a model representing the physical structure of the system
P TT
A B
V+
V-
MATLAB®, Simulink®
Sim
Pow
erS
yste
ms
Simscape
Sim
Mec
hani
cs
Sim
Driv
elin
e
Sim
Hyd
raul
ics®
17
® ®
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
C, C++C, C++
MCUMCU DSPDSP FPGAFPGA ASICASIC
HDL(VHDL, Verilog)
HDL(VHDL, Verilog)
Embedded Software Digital Electronics
Implement V&V
Research DesignC
ontinuous Verification and V
alidationC
ontinuous Verification and V
alidation
Test environments
(T&M, HIL, SIL, PIL)
Test environments
(T&M, HIL, SIL, PIL)
RequirementsRequirements
Integration
Generate:• Assertions• Test results• Documentation• Artifacts
Perform:• Simulation• Design Analysis• Traceability
Analysis• Co-simulation
Generate
Generate
Gen
erat
e
Gen
erat
eVerification &
Validation
PhysicalComponents
PhysicalComponents
EnvironmentEnvironment Execution H
arness E
xecution Harness AlgorithmsAlgorithms
Continuous V
erification and Validation
Continuous V
erification and Validation
18
® ®
Simulink Design Verifier
Test Generation
Property Proving
Simulink and Stateflow modelsModel Harness with test cases
Test generation
Simulink Design Verifier
Simulink and Stateflow modelsaugmented with design properties
AnalysisReport
Property proving
Simulink Design Verifier
Detailed report and violations
19
® ®
Test environments
(T&M, HIL)
Implementation Continuous V&V
Algorithms
System Design
PhysicalComponents
Environment
GenerateGener
ate
FPGA ASIC
HDL(VHDL, Verilog)
Digital ElectronicsEmbedded Software
C, C++
MCU DSP
Requirements
Testvectors
Expectedoutputs
Test harness
------ Dynamic system models ------
Testvectors
Expectedoutputs
Test harness
-- Dynamic system models ---
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
Research
20
® ®
Test environments
(T&M, HIL)
Implementation Continuous V&V
Algorithms
System Design
PhysicalComponents
Environment
GenerateGener
ate
FPGA ASIC
HDL(VHDL, Verilog)
Digital ElectronicsEmbedded Software
C, C++
MCU DSP
Requirements
Testvectors
Expectedoutputs
Test harness
------ Dynamic system models ------
Testvectors
Expectedoutputs
Test harness
-- Dynamic system models ---
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
Research
21
® ®
Test environments
(T&M, HIL)
Implementation Continuous V&V
Algorithms
System Design
PhysicalComponents
Environment
GenerateGener
ate
FPGA ASIC
HDL(VHDL, Verilog)
Digital ElectronicsEmbedded Software
C, C++
MCU DSP
Requirements
Testvectors
Expectedoutputs
Test harness
------ Dynamic system models ------
Testvectors
Expectedoutputs
Test harness
-- Dynamic system models ---
Device Under Test
Data Analysis& Modeling
ApplicationDevelopment
Excel
.NET
AlgorithmDevelopment
Data
Code
Hardware
Research
22
® ®
Verify Hardware and Embedded Software Implementation using Links
Reuse test sequences Reuse model as testbenchCosimulate implemented component
EmbeddedSoftware
TI Code Composer StudioAnalog Devices VisualDSP++Altium TASKING
xPC Target
Digital Hardware
Cadence® Incisive ®
Mentor Graphics ModelSim
23
® ®
Improved Product Development andDelivery Processes
Quality focusContinuous product improvementFine-tuned development processes
Twice-yearly releases 2006
March R2006aSeptember R2006b
2007March R2007a
Timely delivery More vehicles to addresscustomer inputPredictable release schedule
24
® ®
How can I participate in the MATLAB and Simulink community?
Use this conference to networkTalk to MathWorks staff (badges or blue shirts)
Ask about the products and their usesTell us your requirements – we’re here to talk to you!
Meet people from other organizationsWhat are they doing with MathWorks products?
Visit the exhibit hall Get a demo Learn from our partners