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The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

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A microprocessor is the chip containing some control and logic circuits that is capable of making arithmetic and logical decisions based on input data and produces the corresponding arithmetic or logical output. The word ‘processor’ is the derivative of the word ‘process’ that means to carry out systematic operations on data. The computer we are using to write this page of the manuscript uses a microprocessor to do its work. The microprocessor is the heart of any computer, whether it is a desktop machine, a server or a laptop. The microprocessor we are using might be a Pentium, a K6, a PowerPC, a Sparc or any of the many other brands and types of microprocessors, but they all do approximately the same thing in approximately the same way. No logically enabled device can do any thing without it. The microprocessor not only forms the very basis of computers, but also many other devices such as cell phones, satellites, and many other hand held devices. They are also present in modern day cars in the form of microcontrollers. A microprocessor is also known as a CPU or central processing unit, which is a complete computational engine that is fabricated on a single chip. Here we will discuss the history of the 80x86 CPU family and the major improvements occurring along the line. The historical background will help us to better understand the design compromises they made as well as to understand the legacy issues surrounding the CPU’s design. We are discussing the major advances in computer architecture that Intel employed while improving the x86.

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Page 2: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

List of Intel microprocessorsFrom Wikipedia, the free encyclopedia

This generational and chronological list of Intel microprocessors attempts to present all of Intel'sprocessors from the pioneering 4-bit 4004 (1971) to the present high-end offerings, which include the64-bit Itanium 2 (2002), Intel Core 2, and Xeon 5100 and 7100 series processors (2006). Concisetechnical data is given for each product.

Contents [hide]

1 The 4-bit processors1.1 Intel 40041.2 Intel 4040

2 The 8-bit processors2.1 80082.2 80802.3 8085

3 Microcontrollers3.1 Intel 80483.2 Intel 80513.3 MCS-96 Family

4 The bit-slice processor4.1 3000 Family

5 The 16-bit processors: MCS-86 family6 32-bit processors: the non-x86 microprocessors

6.1 iAPX 4326.2 i960 aka 809606.3 i860 aka 808606.4 XScale

7 32-bit processors: the 80386 range7.1 80386DX7.2 80386SX7.3 803767.4 80386SL7.5 80386EX

8 32-bit processors: the 80486 range8.1 80486DX8.2 80486SX8.3 80486DX28.4 80486SL8.5 80486DX4

9 32-bit processors: P5 microarchitecture9.1 Original Pentium9.2 Pentium with MMX Technology

10 32-bit processors: P6/Pentium M microarchitecture10.1 Pentium Pro

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Page 3: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

10.2 Pentium II10.3 Celeron (Pentium II-based)10.4 Pentium III10.5 Pentium II and III Xeon10.6 Celeron (Pentium III Coppermine-based)10.7 Celeron (Pentium III Tualatin-based)10.8 Pentium M10.9 Celeron M10.10 Intel Core10.11 Dual-Core Xeon LV

11 32-bit processors: NetBurst microarchitecture11.1 Pentium 411.2 Xeon11.3 Mobile Pentium 4-M11.4 Pentium 4 EE11.5 Pentium 4E11.6 Pentium 4F

12 64-bit processors: IA-6412.1 Itanium12.2 Itanium 2

13 64-bit processors: Intel 64 – NetBurst microarchitecture13.1 Pentium 4F13.2 Pentium D13.3 Pentium Extreme Edition13.4 Xeon

14 64-bit processors: Intel 64 – Core microarchitecture14.1 Xeon14.2 Intel Core 214.3 Pentium Dual Core14.4 Celeron14.5 Celeron M

15 64-bit processors: Intel 64 – Nehalem microarchitecture15.1 Intel Pentium15.2 Core i315.3 Core i515.4 Core i715.5 Xeon

16 64-bit processors: Intel 64 – Sandy Bridge / Ivy Bridge microarchitecture16.1 Celeron16.2 Pentium16.3 Core i316.4 Core i516.5 Core i7

17 Intel 805xx product codes18 Intel 806xx product codes19 See also20 References21 External links

[edit]The 4-bit processors

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first single-chip microprocessor

Introduced November 15, 1971Clock rate 740 kHz[1]

0.07 MIPSBus Width 8 bits (multiplexed address/data due to limited pins)PMOSNumber of Transistors 2,300 at 10 µmAddressable Memory 640 bytesProgram Memory 4 KB (4 KB)One of the earliest Commercial Microprocessors (cf. Four Phase Systems AL1, F14 CADC)Originally designed to be used in Busicom calculator

MCS-4 Family:

4004-CPU4001-ROM & 4 Bit Port4002-RAM & 4 Bit Port4003-10 Bit Shift Register4008-Memory+I/O Interface4009-Memory+I/O Interface

MCS-40 Family:

4040-CPU4101-1024-bit (256 × 4) Static RAM with separate I/O4201-4 MHz Clock Generator4207-General Purpose Byte I/O Port4209-General Purpose Byte I/O Port4211-General Purpose Byte I/O Port4265-Programmable General Purpose I/O Device4269-Programmable Keyboard Display Device4289-Standard Memory Interface for MCS-4/404308-8192-bit (1024 × 8) ROM w/ 4-bit I/O Ports4316-16384-bit (2048 × 8) Static ROM4702-2048-bit (256 × 8) EPROM4801–5.185 MHz Clock Generator Crystal for 4004/4201A or 4040/4201A

Introduced April 1, 1972Clock rate 500 kHz (8008–1: 800 kHz)0.05 MIPSBus Width 8 bits (multiplexed address/data due to limited pins)Enhancement load PMOS logicNumber of Transistors 3,500 at 10 µmAddressable memory 16 KBTypical in early 8 bit microcomputers, dumb terminals, general calculators, bottling machines

[edit]Intel 4004

[edit]Intel 4040

[edit]The 8-bit processors

[edit]8008

Page 5: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

Developed in tandem with 4004Originally intended for use in the Datapoint 2200 microcomputerKey volume deployment in Texas Instruments 742 microcomputer in >3,000 Ford dealerships

Introduced April 1, 1974Clock rate 2 MHz (very rare 8080B: 3 MHz)0.64 MIPSBus Width 8 bits data, 16 bits addressEnhancement load NMOS logicNumber of Transistors 6,000Assembly language downwards compatible with 8008.Addressable memory 64 KBUp to 10X the performance of the 8008Used in the Altair 8800, Traffic light controller, cruise missileRequired six support chips versus 20 for the 8008

Introduced March 1976Clock rate 3 MHz [2]

0.37 MIPSBus Width 8 bits data, 16 bits addressDepletion load NMOS logicNumber of Transistors 6,500 at 3 µmBinary compatible downwards with the 8080.Used in Toledo scales. Also was used as a computer peripheral controller – modems,harddisks,printers, etc...CMOS 80C85 in Mars Sojourner, Radio Shack Model 100 portable.High level of integration, operating for the first time on a single 5 volt power supply, from 12 voltspreviously. Also featured serial I/O,3 maskable interrupts,1 Non-maskable interrupt,1 externallyexpandable interrupt w/[8259],status,DMA.MCS-85 family contains processors and peripherals

They are ICs with CPU,RAM,ROM (or PROM or EPROM),I/O Ports,Timers & Interrupts

Single accumulator Harvard architecture

MCS-48 family:

8020-Single-Component 8-Bit Microcontroller8021-Single-Component 8-Bit Microcontroller8022-Single-Component 8-Bit Microcontroller With On Chip A/D Converter8035-Single-Component 8-Bit Microcontroller8039-Single-Component 8-Bit Microcontroller8040-Single-Component 8-Bit Microcontroller8041-Universal Peripheral Interface 8-Bit Slave Microcontroller8641-Universal Peripheral Interface 8-Bit Slave Microcontroller8741-Universal Peripheral Interface 8-Bit Slave Microcontroller8042-Universal Peripheral Interface 8-Bit Slave Microcontroller

[edit]8080

[edit]8085

[edit]Microcontrollers

[edit]Intel 8048

Page 6: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

8742-Universal Peripheral Interface 8-Bit Slave Microcontroller8243-Input/Output Expander8048-Single-Component 8-Bit Microcontroller8048-Single-Component 8-Bit Microcontroller8748-Single-Component 8-Bit Microcontroller8048-Single-Component 8-Bit Microcontroller8049-Single-Component 8-Bit Microcontroller8749-Single-Component 8-Bit Microcontroller8050-Single-Component 8-Bit Microcontroller

Single accumulator Harvard architecture

MCS-51 Family:

8031-8-Bit Control-Oriented Microcontroller8032-8-Bit Control-Oriented Microcontroller8044-High Performance 8-Bit Microcontroller8344-High Performance 8-Bit Microcontroller8744-High Performance 8-Bit Microcontroller8051-8-Bit Control-Oriented Microcontroller8052-8-Bit Control-Oriented Microcontroller8054-8-Bit Control-Oriented Microcontroller8058-8-Bit Control-Oriented Microcontroller8351-8-Bit Control-Oriented Microcontroller8352-8-Bit Control-Oriented Microcontroller8354-8-Bit Control-Oriented Microcontroller8358-8-Bit Control-Oriented Microcontroller8751-8-Bit Control-Oriented Microcontroller8752-8-Bit Control-Oriented Microcontroller8754-8-Bit Control-Oriented Microcontroller8758-8-Bit Control-Oriented Microcontroller80151-8-Bit Control-Oriented Microcontroller83151-8-Bit Control-Oriented Microcontroller87151-8-Bit Control-Oriented Microcontroller80152-8-Bit Control-Oriented Microcontroller83152-8-Bit Control-Oriented Microcontroller80251-8-Bit Control-Oriented Microcontroller87251-8-Bit Control-Oriented Microcontroller

8094-16-Bit Microcontroller (48-Pin ROMLess Without A/D)8095-16-Bit Microcontroller (48-Pin ROMLess With A/D)8096-16-Bit Microcontroller (68-Pin ROMLess Without A/D)8097-16-Bit Microcontroller (68-Pin ROMLess With A/D)8394-16-Bit Microcontroller (48-Pin With ROM Without A/D)8395-16-Bit Microcontroller (48-Pin With ROM With A/D)8396-16-Bit Microcontroller (68-Pin With ROM Without A/D)]8397-16-Bit Microcontroller (68-Pin With ROM With A/D)8794-16-Bit Microcontroller (48-Pin With EROM Without A/D)

[edit]Intel 8051

[edit]MCS-96 Family

Page 7: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

8795-16-Bit Microcontroller (48-Pin With EROM With A/D)8796-16-Bit Microcontroller (68-Pin With EROM Without A/D)8797-16-Bit Microcontroller (68-Pin With EROM With A/D)8098-16-Bit Microcontroller8398-16-Bit Microcontroller8798-16-Bit Microcontroller80196-16-Bit Microcontroller83196-16-Bit Microcontroller87196-16-Bit Microcontroller80296-16-Bit Microcontroller

Introduced 3rd Qtr, 1974 Members of thefamily

3001-Microcontrol Unit3002-2-bit Arithmetic Logic Unit slice3003-Look-ahead Carry Generator3205-High-performance 1 Of 8 BinaryDecoder3207-Quad Bipolar-to-MOS Level Shifterand Driver3208-Hex Sense Amp and Latch for MOSMemories3210-TTL-to-MOS Level Shifter and HighVoltage Clock Driver3211-ECL-to-MOS Level Shifter and HighVoltage Clock Driver3212-Multimode Latch Buffer3214-Interrupt Control Unit3216-Parallel,Inverting Bi-Directional Bus Driver3222-Refresh Controller for 4K NMOS DRAMs3226-Parallel,Inverting Bi-Directional Bus Driver3232-Address Multiplexer and Refresh Counter for 4K DRAMs3242-Address Multiplexer and Refresh Counter for 16K DRAMs3245-Quad Bipolar TTL-to-MOS Level Shifter and Driver for 4K3246-Quad Bipolar ECL-to-MOS Level Shifter and Driver for 4K3404-High-performance 6-bit Latch3408-Hex Sense Amp and Latch for MOS Memories

Bus Width 2-n bits data/address (depending on number of slices used)

Main article: X86

8086

Introduced June 8, 1978Clock rates:

5 MHz with 0.33 MIPS[2]

[edit]The bit-slice processor

[edit]3000 Family

Intel D3002.

[edit]The 16-bit processors: MCS-86 family

Page 8: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

8 MHz with 0.66 MIPS10 MHz with 0.75 MIPS

The memory is divided into odd and even banks; it accesses both banks concurrently to read16 bits of data in one clock cycleBus Width 16 bits data, 20 bits addressNumber of Transistors 29,000 at 3 µmAddressable memory 1 megabyteUp to 10X the performance of 8080Used in portable computing, and in the IBM PS/2 Model 25 and Model 30. Also used in theAT&T PC6300 / Olivetti M24, a popular IBM PC-compatible (predating the IBM PS/2 line.)Used segment registers to access more than 64 KB of data at once, which many programmerscomplained made their work excessively difficult.[citation needed]

8088

Introduced June 1, 1979Clock rates:

5 MHz with 0.33 MIPS8 MHz with 0.75 MIPS [2]

Internal architecture 16 bitsExternal bus Width 8 bits data, 20 bits addressNumber of Transistors 29,000 at 3 µmAddressable memory 1 megabyteIdentical to 8086 except for its 8 bit external bus (hence an 8 instead of a 6 at the end)Used in IBM PCs and PC clones

80186

Introduced 1982Clock rates

6 MHz with > 1 MIPSNumber of Transistors 29,000 at 2 µmIncluded two timers, a DMA controller, and an interrupt controller on the chip in addition to theprocessor (These were at fixed addresses which differed from the IBM PC, making itimpossible to build a 100% PC-compatible computer around the 80186.)Added a few opcodes and exceptions to the 8086 design; otherwise identical instruction set to8086 and 8088.Used mostly in embedded applications – controllers, point-of-sale systems, terminals, and thelikeUsed in several non-PC-Compatible MS-DOS computers including RM Nimbus, Tandy 2000,and CP/M 86 Televideo PM16 serverLater renamed the iAPX 186

80188

A version of the 80186 with an 8-bit external data busLater renamed the iAPX 188

80286

Introduced February 1, 1982Clock rates:

6 MHz with 0.9 MIPS8 MHz, 10 MHz with 1.5 MIPS12.5 MHz with 2.66 MIPS

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16 MHz, 20 MHz and 25 MHz available.Bus Width: 16 bit data, 24 bit address.Included memory protection hardware to support multitasking operating systems with per-processaddress spaceNumber of Transistors 134,000 at 1.5 µmAddressable memory 16 MB (16 MB)Added protected-mode features to 8086 with essentially the same instruction set3-6X the performance of the 8086Widely used in IBM-PC AT and AT clones contemporary to it

Introduced January 1, 1981 as Intel's first 32-bit microprocessorMulti-chip CPU; Intel's first 32-bit microprocessorObject/capability architectureMicrocoded operating system primitivesOne terabyte virtual address spaceHardware support for fault toleranceTwo-chip General Data Processor (GDP), consists of 43201 and 4320243203 Interface Processor (IP) interfaces to I/O subsystem43204 Bus Interface Unit (BIU) simplifies building multiprocessor systems43205 Memory Control Unit (MCU)Architecture and execution unit internal data base paths 32 bitClock rates:

5 MHz7 MHz8 MHz

Introduced April 5, 1988RISC-like 32-bit architecturePredominantly used in embedded systemsEvolved from the capability processor developed for the BiiN joint venture with SiemensMany variants identified by two-letter suffixes.

Introduced February 27, 1989RISC 32/64-bit architecture, with floating point pipeline characteristics very visible to programmerUsed in the Intel iPSC/860 Hypercube parallel supercomputermid-life kicker in the i870 processor (primarily a speed bump, some refinement/extension ofinstruction set)Used in the Intel Delta massively parallel supercomputer prototype, emplaced at CaliforniaInstitute of TechnologyUsed in the Intel Paragon massively parallel supercomputer, emplaced at Sandia NationalLaboratory

Introduced August 23, 200032-bit RISC microprocessor based on the ARM architecture

[edit]32-bit processors: the non-x86 microprocessors

[edit]iAPX 432

[edit]i960 aka 80960

[edit]i860 aka 80860

[edit]XScale

Page 10: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

Many variants, such as the PXA2xx applications processors, IOP3xx I/O processors and IXP2xxxand IXP4xx network processors.

Introduced October 17, 1985Clock rates:

16 MHz with 5 to 6 MIPS20 MHz with 6 to 7 MIPS, introduced February 16, 198725 MHz with 8.5 MIPS, introduced April 4, 198833 MHz with 11.4 MIPS (9.4 SPECint92 on Compaq/i 16K L2), introduced April 10, 1989

Bus Width 32 bit data, 32 bit addressNumber of Transistors 275,000 at 1 µmAddressable memory 4 GB (4 GB)Virtual memory 64 TB (64 TB)First x86 chip to handle 32-bit data setsReworked and expanded memory protection support including paged virtual memory and virtual-86 mode, features required at the time by Xenix and Unix. This memory capability spurred thedevelopment and availability of OS/2 and is a fundamental requirement for modern operatingsystems like Linux, Vista, and Mac OS.Used in desktop computing

Introduced June 16, 1988Clock rates:

16 MHz with 2.5 MIPS20 MHz with 2.5 MIPS, introduced January 25, 198925 MHz with 2.7 MIPS, introduced January 25, 198933 MHz with 2.9 MIPS, introduced October 26, 1992

Internal architecture 32 bitsExternal data bus width 16 bitsExternal address bus width 24 bitsNumber of Transistors 275,000 at 1 µmAddressable memory 16 MBVirtual memory 32 GBNarrower buses enable low-cost 32-bit processingUsed in entry-level desktop and portable computingNo Math Co-ProcessorNo commercial Software used for protected mode or virtual storage for many years

Introduced January 16, 1989;Discontinued June 15, 2001Variant of 386SX intended for embeddedsystemsNo "real mode", starts up directly in"protected mode"Replaced by much more successful

[edit]32-bit processors: the 80386 range

[edit]80386DX

[edit]80386SX

[edit]80376

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80386EX from 1994

Introduced October 15, 1990Clock rates:

20 MHz with 4.21 MIPS25 MHz with 5.3 MIPS, introducedSeptember 30, 1991

Internal architecture 32 bitsExternal bus width 16 bitsNumber of Transistors 855,000 at 1 µmAddressable memory 4 GBVirtual memory 1 TBFirst chip specifically made for portable computers because of low power consumption of chipHighly integrated, includes cache, bus, and memory controllers

80486SX/DX2/SL, Pentium, 80486DX4 (chronological entries)

Introduced 1991–1994See main entries

Introduced August 1994Variant of 80386SX intended for embedded systemsStatic core, i.e. may run as slowly (and thus, power efficiently) as desired, down to full haltOn-chip peripherals:

Clock and power mgmtTimers/countersWatchdog timerSerial I/O units (sync and async) and parallel I/ODMARAM refreshJTAG test logic

Significantly more successful than the 80376Used aboard several orbiting satellites and microsatellitesUsed in NASA's FlightLinux project

Introduced April 10, 1989Clock rates:

25 MHz with 20 MIPS (16.8 SPECint92, 7.40 SPECfp92)

The Intel i376 is an embedded version of the i386SX.

[edit]80386SL

[edit]80386EX

[edit]32-bit processors: the 80486 range

[edit]80486DX

Page 12: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

33 MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128 KB L2), introduced May 7, 199050 MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256 KB L2),introduced June 24, 1991

Bus Width 32 bitsNumber of Transistors 1.2 million at 1 µm; the 50 MHz was at 0.8 µmAddressable memory 4 GBVirtual memory 1 TBLevel 1 cache of 8 KB on chipMath coprocessor on chip50X performance of the 8088Used in Desktop computing and serversFamily 4 model 3

80386SL (chronological entry)

Introduced October 15, 1990See main entry

Introduced April 22, 1991Clock rates:

16 MHz with 13 MIPS20 MHz with 16.5 MIPS, introduced September 16, 199125 MHz with 20 MIPS (12 SPECint92), introduced September 16, 199133 MHz with 27 MIPS (15.86 SPECint92), introduced September 21, 1992

Bus Width 32 bitsNumber of Transistors 1.185 million at 1 µm and 900,000 at 0.8 µmAddressable memory 4 GBVirtual memory 1 TBIdentical in design to 486DX but without math coprocessor. The first version was an 80486DXwith disabled mathco in the chip and different pin configuration. If the user needed math cocapabilities, he must add 487SX which was actually an 486DX with different pin configuration toprevent the user from installing a 486DX instead of 487SX, so with this configuration486SX+487SX you had 2 identical CPU's with only 1 turned onUsed in low-cost entry to 486 CPU desktop computing, as well as extensively used in low costmobile computing.Upgradable with the Intel OverDrive processorFamily 4 model 2

Introduced March 3, 1992

Runs at twice the speed of the external bus (FSB).

Clock rates:

40 MHz50 MHz66 MHz100 MHz (This was only made a short time due to high failure rates.)

[edit]80486SX

[edit]80486DX2

[edit]80486SL

Page 13: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

Introduced November 9, 1992Clock rates:

20 MHz with 15.4MIPS25 MHz with 19 MIPS33 MHz with 25 MIPS

Bus Width 32 bitsNumber of Transistors 1.4 million at 0.8 µmAddressable memory 4 GBVirtual memory 1 TBUsed in notebook computersFamily 4 model 3

Pentium (chronological entry)

Introduced March 22, 1993See main entry

Introduced March 7, 1994Clock rates:

75 MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256 KB L2)100 MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256 KB L2)

Number of Transistors 1.6 million at 0.6 µmBus width 32 bitsAddressable memory 4 GBVirtual memory 64 TBPin count 168 PGA Package, 208 sq ftP PackageUsed in high performance entry-level desktops and value notebooksFamily 4 model 8

Bus width 64 bitsSystem bus clock rate 60 or 66 MHzAddress bus 32 bitsAddressable Memory 4 GBVirtual Memory 64 TBSuperscalar architectureRuns on 5 voltsUsed in desktops8 KB of instruction cache8 KB of data cacheP5 – 0.8 µm process technology

Introduced March 22, 1993Number of transistors 3.1 millionSocket 4 273 pin PGA processor packagePackage dimensions 2.16" × 2.16"Family 5 model 1

[edit]80486DX4

[edit]32-bit processors: P5 microarchitecture

[edit]Original Pentium

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Variants

60 MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256 KB L2)66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256 KB L2)

P54 – 0.6 µm process technology

Socket 5 296/320 pin PGA packageNumber of transistors 3.2 millionVariants

75 MHz Introduced October 10, 199490, 100 MHz Introduced March 7, 1994

P54CQS – 0.35 µm process technology

Socket 5 296/320 pin PGA packageNumber of transistors 3.2 millionVariants

120 MHz Introduced March 27, 1995P54CS – 0.35 µm process technology

Number of transistors 3.3 million90 mm² die sizeFamily 5 model 2VariantsSocket 5 296/320 pin PGA package

133 MHz Introduced June 12, 1995150, 166 MHz Introduced January 4, 1996

Socket 7 296/321 pin PGA package

200 MHz Introduced June 10, 1996

P55C – 0.35 µm process technology

Introduced January 8, 1997Intel MMX (instruction set) supportSocket 7 296/321 pin PGA (pin grid array) package16 KB L1 instruction cache16 KB L1 data cacheNumber of transistors 4.5 millionSystem bus clock rate 66 MHzBasic P55C is family 5 model 4, mobile are family 5 model 7 and 8Variants

166, 200 MHz Introduced January 8, 1997233 MHz Introduced June 2, 1997133 MHz (Mobile)166, 266 MHz (Mobile) Introduced January 12, 1998200, 233 MHz (Mobile) Introduced September 8, 1997300 MHz (Mobile) Introduced January 7, 1999

Introduced November 1, 1995Precursor to Pentium II and III

[edit]Pentium with MMX Technology

[edit]32-bit processors: P6/Pentium M microarchitecture

[edit]Pentium Pro

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Primarily used in server systemsSocket 8 processor package (387 pins) (Dual SPGA)Number of transistors 5.5 millionFamily 6 model 10.6 µm process technology

16 KB L1 cache256 KB integrated L2 cache60 MHz system bus clock rateVariants

150 MHz0.35 µm process technology, or 0.35 µm CPU with 0.6 µm L2 cache

Number of transistors 5.5 million512 KB or 256 KB integrated L2 cache60 or 66 MHz system bus clock rateVariants

166 MHz (66 MHz bus clock rate, 512 KB 0.35 µm cache) Introduced November 1, 1995180 MHz (60 MHz bus clock rate, 256 KB 0.6 µm cache) Introduced November 1, 1995200 MHz (66 MHz bus clock rate, 256 KB 0.6 µm cache) Introduced November 1, 1995200 MHz (66 MHz bus clock rate, 512 KB 0.35 µm cache) Introduced November 1, 1995200 MHz (66 MHz bus clock rate, 1 MB 0.35 µm cache) Introduced August 18, 1997

Introduced May 7, 1997Pentium Pro with MMX and improved 16-bit performance242-pin Slot 1 (SEC) processor packageSlot 1Number of transistors 7.5 million32 KB L1 cache512 KB ½ bandwidth external L2 cacheThe only Pentium II that did not have the L2 cache at ½ bandwidth of the core was the Pentium II450 PE.Klamath – 0.35 µm process technology (233, 266, 300 MHz)

66 MHz system bus clock rateFamily 6 model 3Variants

233, 266, 300 MHz Introduced May 7, 1997Deschutes – 0.25 µm process technology (333, 350, 400, 450 MHz)

Introduced January 26, 199866 MHz system bus clock rate (333 MHz variant), 100 MHz system bus clock rate for allmodels afterFamily 6 model 5Variants

333 MHz Introduced January 26, 1998350, 400 MHz Introduced April 15, 1998450 MHz Introduced August 24, 1998233, 266 MHz (Mobile) Introduced April 2, 1998333 MHz Pentium II Overdrive processor for Socket 8 Introduced August 10, 1998;Engineering Sample Photo [dead link]

[edit]Pentium II

Page 16: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

300 MHz (Mobile) Introduced September 9, 1998333 MHz (Mobile)

Covington – 0.25 µm process technology

Introduced April 15, 1998242-pin Slot 1 SEPP (Single Edge Processor Package)Number of transistors 7.5 million66 MHz system bus clock rateSlot 132 KB L1 cacheNo L2 cacheVariants

266 MHz Introduced April 15, 1998300 MHz Introduced June 9, 1998

Mendocino – 0.25 µm process technology

Introduced August 24, 1998242-pin Slot 1 SEPP (Single Edge Processor Package), Socket 370 PPGA packageNumber of transistors 19 million66 MHz system bus clock rateSlot 1, Socket 37032 KB L1 cache128 KB integrated cacheFamily 6 model 6Variants

300, 333 MHz Introduced August 24, 1998366, 400 MHz Introduced January 4, 1999433 MHz Introduced March 22, 1999466 MHz500 MHz Introduced August 2, 1999533 MHz Introduced January 4, 2000266 MHz (Mobile)300 MHz (Mobile)333 MHz (Mobile) Introduced April 5, 1999366 MHz (Mobile)400 MHz (Mobile)433 MHz (Mobile)450 MHz (Mobile) Introduced February 14, 2000466 MHz (Mobile)500 MHz (Mobile) Introduced February 14, 2000

Pentium II Xeon (chronological entry)

Introduced June 29, 1998See main entry

Katmai – 0.25 µm process technology

Introduced February 26, 1999

[edit]Celeron (Pentium II-based)

[edit]Pentium III

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Improved PII, i.e. P6-based core, now including Streaming SIMD Extensions (SSE)Number of transistors 9.5 million512 KB ½ bandwidth L2 External cache242-pin Slot 1 SECC2 (Single Edge Contact cartridge 2) processor packageSystem Bus clock rate 100 MHz, 133 MHz (B-models)Slot 1Family 6 model 7Variants

450, 500 MHz Introduced February 26, 1999550 MHz Introduced May 17, 1999600 MHz Introduced August 2, 1999533, 600 MHz Introduced (133 MHz bus clock rate) September 27, 1999

Coppermine – 0.18 µm process technology

Introduced October 25, 1999Number of transistors 28.1 million256 KB Advanced Transfer L2 Cache (Integrated)242-pin Slot-1 SECC2 (Single Edge Contact cartridge 2) processor package, 370-pin FC-PGA(Flip-chip pin grid array) packageSystem Bus clock rate 100 MHz (E-models), 133 MHz (EB models)Slot 1, Socket 370Family 6 model 8Variants

500 MHz (100 MHz bus clock rate)533 MHz550 MHz (100 MHz bus clock rate)600 MHz600 MHz (100 MHz bus clock rate)650 MHz (100 MHz bus clock rate) Introduced October 25, 1999667 MHz Introduced October 25, 1999700 MHz (100 MHz bus clock rate) Introduced October 25, 1999733 MHz Introduced October 25, 1999750, 800 MHz (100 MHz bus clock rate) Introduced December 20, 1999850 MHz (100 MHz bus clock rate) Introduced March 20, 2000866 MHz Introduced March 20, 2000933 MHz Introduced May 24, 20001000 MHz Introduced March 8, 2000 (Not widely available at time of release)1100 MHz1133 MHz (first version recalled, later re-released)400, 450, 500 MHz (Mobile) Introduced October 25, 1999600, 650 MHz (Mobile) Introduced January 18, 2000700 MHz (Mobile) Introduced April 24, 2000750 MHz (Mobile) Introduced June 19, 2000800, 850 MHz (Mobile) Introduced September 25, 2000900, 1000 MHz (Mobile) Introduced March 19, 2001

Tualatin – 0.13 µm process technology

Introduced July 2001Number of transistors 28.1 million32 KB L1 cache

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256 KB or 512 KB Advanced Transfer L2 cache (Integrated)370-pin FC-PGA2 (Flip-chip pin grid array) package133 MHz system bus clock rateSocket 370Family 6 model 11Variants

1133 MHz (256 KB L2)1133 MHz (512 KB L2)1200 MHz1266 MHz (512 KB L2)1333 MHz1400 MHz (512 KB L2)

PII Xeon

Variants

400 MHz Introduced June 29, 1998450 MHz (512 KB L2 Cache) Introduced October 6, 1998450 MHz (1 MB and 2 MB L2 Cache) Introduced January 5, 1999

PIII Xeon

Introduced October 25, 1999Number of transistors: 9.5 million at 0.25 µm or 28 million at 0.18 µmL2 cache is 256 KB, 1 MB, or 2 MB Advanced Transfer Cache (Integrated)Processor Package Style is Single Edge Contact Cartridge (S.E.C.C.2) or SC330System Bus clock rate 133 MHz (256 KB L2 cache) or 100 MHz (1 – 2 MB L2 cache)System Bus Width 64 bitAddressable memory 64 GBUsed in two-way servers and workstations (256 KB L2) or 4- and 8-way servers (1 – 2 MBL2)Family 6 model 10Variants

500 MHz (0.25 µm process) Introduced March 17, 1999550 MHz (0.25 µm process) Introduced August 23, 1999600 MHz (0.18 µm process, 256 KB L2 cache) Introduced October 25, 1999667 MHz (0.18 µm process, 256 KB L2 cache) Introduced October 25, 1999733 MHz (0.18 µm process, 256 KB L2 cache) Introduced October 25, 1999800 MHz (0.18 µm process, 256 KB L2 cache) Introduced January 12, 2000866 MHz (0.18 µm process, 256 KB L2 cache) Introduced April 10, 2000933 MHz (0.18 µm process, 256 KB L2 cache)1000 MHz (0.18 µm process, 256 KB L2 cache) Introduced August 22, 2000700 MHz (0.18 µm process, 1 – 2 MB L2 cache) Introduced May 22, 2000

Coppermine-128, 0.18 µm process technology

Introduced March, 2000Streaming SIMD Extensions (SSE)Socket 370, FC-PGA processor packageNumber of transistors 28.1 million

[edit]Pentium II and III Xeon

[edit]Celeron (Pentium III Coppermine-based)

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66 MHz system bus clock rate, 100 MHz system bus clock rate from January 3, 200132 kB L1 cache128 kB Advanced Transfer L2 cacheFamily 6 model 8Variants

533 MHz566 MHz600 MHz633, 667, 700 MHz Introduced June 26, 2000733, 766 MHz Introduced November 13, 2000800 MHz Introduced January 3, 2001850 MHz Introduced April 9, 2001900 MHz Introduced July 2, 2001950, 1000, 1100 MHz Introduced August 31, 2001550 MHz (Mobile)600, 650 MHz (Mobile) Introduced June 19, 2000700 MHz (Mobile) Introduced September 25, 2000750 MHz (Mobile) Introduced March 19, 2001800 MHz (Mobile)850 MHz (Mobile) Introduced July 2, 2001600 MHz (LV Mobile)500 MHz (ULV Mobile) Introduced January 30, 2001600 MHz (ULV Mobile)

XScale (chronological entry)

Introduced August 23, 2000See main entry

Pentium 4 (not 4EE, 4E, 4F), Itanium, P4-based Xeon, Itanium 2 (chronological entries)

Introduced April 2000 – July 2002See main entries

Tualatin Celeron – 0.13 µm process technology

32 KB L1 cache256 KB Advanced Transfer L2 cache100 MHz system bus clock rateSocket 370Family 6 model 11Variants

1.0 GHz1.1 GHz1.2 GHz1.3 GHz1.4 GHz

Banias 0.13 µm process technology

[edit]Celeron (Pentium III Tualatin-based)

[edit]Pentium M

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Introduced March 200364 KB L1 cache1 MB L2 cache (integrated)Based on Pentium III core, with SSE2 SIMD instructions and deeper pipelineNumber of transistors 77 millionMicro-FCPGA, Micro-FCBGA processor packageHeart of the Intel mobile Centrino system400 MHz Netburst-style system busFamily 6 model 9Variants

900 MHz (Ultra low voltage)1.0 GHz (Ultra low voltage)1.1 GHz (Low voltage)1.2 GHz (Low voltage)1.3 GHz1.4 GHz1.5 GHz1.6 GHz1.7 GHz

Dothan 0.09 µm (90 nm) process technology

Introduced May 20042 MB L2 cache140 million transistorsRevised data prefetch unit400 MHz Netburst-style system bus21W TDPFamily 6 model 13Variants

1.00 GHz (Pentium M 723) (Ultra low voltage, 5W TDP)1.10 GHz (Pentium M 733) (Ultra low voltage, 5W TDP)1.20 GHz (Pentium M 753) (Ultra low voltage, 5W TDP)1.30 GHz (Pentium M 718) (Low voltage, 10W TDP)1.40 GHz (Pentium M 738) (Low voltage, 10W TDP)1.50 GHz (Pentium M 758) (Low voltage, 10W TDP)1.60 GHz (Pentium M 778) (Low voltage, 10W TDP)1.40 GHz (Pentium M 710)1.50 GHz (Pentium M 715)1.60 GHz (Pentium M 725)1.70 GHz (Pentium M 735)1.80 GHz (Pentium M 745)2.00 GHz (Pentium M 755)2.10 GHz (Pentium M 765)

Dothan 533 0.09 µm (90 nm) process technology

Introduced Q1 2005Same as Dothan except with a 533 MHz NetBurst-style system bus and 27W TDPVariants

1.60 GHz (Pentium M 730)1.73 GHz (Pentium M 740)

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1.86 GHz (Pentium M 750)2.00 GHz (Pentium M 760)2.13 GHz (Pentium M 770)2.26 GHz (Pentium M 780)

Stealey 0.09 µm (90 nm) process technology

Introduced Q2 2007512 KB L2, 3W TDPVariants

600 MHz (A100)800 MHz (A110)

Banias-512 0.13 µm process technology

Introduced March 200364 KB L1 cache512 KB L2 cache (integrated)SSE2 SIMD instructionsNo SpeedStep technology, is not part of the 'Centrino' packageFamily 6 model 9Variants

310 – 1.20 GHz320 – 1.30 GHz330 – 1.40 GHz340 – 1.50 GHz

Dothan-1024 90 nm process technology

64 KB L1 cache1 MB L2 cache (integrated)SSE2 SIMD instructionsNo SpeedStep technology, is not part of the 'Centrino' packageVariants

350 – 1.30 GHz350J – 1.30 GHz, with Execute Disable bit360 – 1.40 GHz360J – 1.40 GHz, with Execute Disable bit370 – 1.50 GHz, with Execute Disable bit

Family 6, Model 13, Stepping 8[3]

380 – 1.60 GHz, with Execute Disable bit390 – 1.70 GHz, with Execute Disable bit

Yonah-1024 65 nm process technology

64 KB L1 cache1 MB L2 cache (integrated)SSE3 SIMD instructions, 533 MHz front-side bus, execute-disable bitNo SpeedStep technology, is not part of the 'Centrino' packageVariants

410 – 1.46 GHz420 – 1.60 GHz,423 – 1.06 GHz (ultra low voltage)430 – 1.73 GHz

[edit]Celeron M

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440 – 1.86 GHz443 – 1.20 GHz (ultra low voltage)450 – 2.00 GHz

Yonah 0.065 µm (65 nm) process technology

Introduced January 2006533/667 MHz front side bus2 MB (Shared on Duo) L2 cacheSSE3 SIMD instructions31W TDP (T versions)Family 6, Model 14Variants:

Intel Core Duo T2700 2.33 GHzIntel Core Duo T2600 2.16 GHzIntel Core Duo T2500 2 GHzIntel Core Duo T2450 2 GHzIntel Core Duo T2400 1.83 GHzIntel Core Duo T2300 1.66 GHzIntel Core Duo T2050 1.6 GHzIntel Core Duo T2300e 1.66 GHzIntel Core Duo T2080 1.73 GHzIntel Core Duo L2500 1.83 GHz (Low voltage, 15W TDP)Intel Core Duo L2400 1.66 GHz (Low voltage, 15W TDP)Intel Core Duo L2300 1.5 GHz (Low voltage, 15W TDP)Intel Core Duo U2500 1.2 GHz (Ultra low voltage, 9W TDP)Intel Core Solo T1350 1.86 GHz (533 FSB)Intel Core Solo T1300 1.66 GHzIntel Core Solo T1200 1.5 GHz [4]

Sossaman 0.065 µm (65 nm) process technology

Introduced March 2006Based on Yonah core, with SSE3 SIMD instructions667 MHz frontside bus2 MB Shared L2 cacheVariants

2.0 GHz

0.18 µm process technology (1.40 and 1.50 GHz)

Introduced November 20, 2000L2 cache was 256 KB Advanced Transfer Cache (Integrated)Processor Package Style was PGA423, PGA478System Bus clock rate 400 MHzSSE2 SIMD ExtensionsNumber of Transistors 42 million

[edit]Intel Core

[edit]Dual-Core Xeon LV

[edit]32-bit processors: NetBurst microarchitecture

[edit]Pentium 4

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Used in desktops and entry-level workstations0.18 µm process technology (1.7 GHz)

Introduced April 23, 2001See the 1.4 and 1.5 chips for details

0.18 µm process technology (1.6 and 1.8 GHz)

Introduced July 2, 2001See 1.4 and 1.5 chips for detailsCore Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery OptimizedModePower <1 watt in Battery Optimized ModeUsed in full-size and then light mobile PCs

0.18 µm process technology Willamette (1.9 and 2.0 GHz)

Introduced August 27, 2001See 1.4 and 1.5 chips for details

Family 15 model 1Pentium 4 (2 GHz, 2.20 GHz)

Introduced January 7, 2002Pentium 4 (2.4 GHz)

Introduced April 2, 20020.13 µm process technology Northwood A (1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6, 2.8(OEM),3.0(OEM)GHz)

Improved branch prediction and other microcodes tweaks512 KB integrated L2 cacheNumber of transistors 55 million400 MHz system bus.

Family 15 model 20.13 µm process technology Northwood B (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)

533 MHz system bus. (3.06 includes Intel's hyper threading technology).0.13 µm process technology Northwood C (2.4, 2.6, 2.8, 3.0, 3.2, 3.4 GHz)

800 MHz system bus (all versions include Hyper Threading)6500 to 10000 MIPS

Itanium (chronological entry)

Introduced 2001See main entry

Official designation now Xeon, i.e. not "Pentium 4 Xeon"Xeon 1.4, 1.5, 1.7 GHz

Introduced May 21, 2001L2 cache was 256 KB Advanced Transfer Cache (Integrated)Processor Package Style was Organic Land Grid Array 603 (OLGA 603)System Bus clock rate 400 MHzSSE2 SIMD ExtensionsUsed in high-performance and mid-range dual processor enabled workstations

Xeon 2.0 GHz and up to 3.6 GHz

Introduced September 25, 2001

[edit]Xeon

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Itanium 2 (chronological entry)

Introduced July 2002See main entry

0.13 µm process technology55 million transistorscache L2 512 KBBUS a 400 MHzSupports up to 1 GB of DDR 266 MHz MemorySupports ACPI 2.0 and APM 1.2 System Power Management1.3 V – 1.2 V (SpeedStep)Power: 1.2 GHz 20.8 W, 1.6 GHz 30 W, 2.6 GHz 35 WSleep Power 5 W (1.2 V)Deeper Sleep Power = 2.9 W (1.0 V)

1.40 GHz – 23 April 20021.50 GHz – 23 April 20021.60 GHz – 4 March 20021.70 GHz – 4 March 20021.80 GHz – 23 April 20021.90 GHz – 24 June 20022.00 GHz – 24 June 20022.20 GHz – 16 September 20022.40 GHz – 14 January 20032.50 GHz – 16 April 20032.60 GHz – 11 June 2003

Introduced September 2003EE = "Extreme Edition"Built from the Xeon's "Gallatin" core, but with 2 MB cache-

Introduced February 2004built on 0.09 µm (90 nm) process technology Prescott (2.4A, 2.8, 2.8A, 3.0, 3.2, 3.4, 3.6, 3.8)1 MB L2 cache533 MHz system bus (2.4A and 2.8A only)Number of Transistors 125 million on 1 MB ModelsNumber of Transistors 169 million on 2 MB Models800 MHz system bus (all other models)Hyper-Threading support is only available on CPUs using the 800 MHz system bus.The processor's integer instruction pipeline has been increased from 20 stages to 31 stages,which theoretically allows for even greater bandwidth.7500 to 11000 MIPSLGA 775 versions are in the 5xx series (32-bit) and 5x1 series (with Intel 64)The 6xx series has 2 MB L2 cache and Intel 64

[edit]Mobile Pentium 4-M

[edit]Pentium 4 EE

[edit]Pentium 4E

[edit]Pentium 4F

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Introduced Spring 2004same core as 4E, "Prescott"3.2–3.6 GHzstarting with the D0 stepping of this processor, Intel 64 64-bit extensions has also beenincorporated

New instruction set, not at all related to x86.Before the feature was eliminated (Montecito, July 2006) IA-64 processors supported 32-bit x86in hardware, but slowly (see its 2001 market reception and 2006 architecturalchanges).[dubious – discuss]

Code name MercedFamily 0x07Released May 29, 2001733 MHz and 800 MHz2MB cacheall recalled and replaced by Itanium-II

Family 0x1FReleased July 2002900 MHz – 1.6 GHzMcKinley 900 MHz 1.5MB cache, Model 0x0McKinley 1 GHz, 3MB cache, Model 0x0Deerfield 1 GHz, 1.5MB cache, Model 0x1Madison 1.3 GHz, 3MB cache, Model 0x1Madison 1.4 GHz, 4MB cache, Model 0x1Madison 1.5 GHz, 6MB cache, Model 0x1Madison 1.67 GHz, 9MB cache, Model 0x1Hondo 1.4 GHz, 4MB cache, dual core MCM, Model 0x1

Intel Extended Memory 64 TechnologyMostly compatible with AMD's AMD64 architectureIntroduced Spring 2004, with the Pentium 4F (D0 and later P4 steppings)

Prescott-2M built on 0.09 µm (90 nm) process technology2.8–3.8 GHz (model numbers 6x0)Introduced February 20, 2005Same features as Prescott with the addition of:-

2 MB cacheIntel 64bitEnhanced Intel SpeedStep Technology (EIST)

Cedar Mill built on 0.065 µm (65 nm) process technology3.0–3.6 (model numbers 6x1)Introduced January 16, 2006

[edit]64-bit processors: IA-64

[edit]Itanium

[edit]Itanium 2

[edit]64-bit processors: Intel 64 – NetBurst microarchitecture

[edit]Pentium 4F

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die shrink of Prescott-2MSame features as Prescott-2MFamily 15 Model 4

Main article: List of Intel Pentium D microprocessors

Dual-core microprocessorNo Hyper-Threading800(4×200) MHz front side busLGA 775 (Socket T)

Smithfield – 90 nm process technology (2.66–3.2 GHz)

Introduced May 26, 20052.66–3.2 GHz (model numbers 805–840)Number of Transistors 230 million1 MB × 2 (non-shared, 2 MB total) L2 cacheCache coherency between cores requires communication over the FSBPerformance increase of 60% over similarly clocked Prescott2.66 GHz (533 MHz FSB) Pentium D 805 introduced December 2005Contains 2x Prescott dies in one packageFamily 15 Model 4

Presler – 65 nm process technology (2.8–3.6 GHz)

Introduced January 16, 20062.8–3.6 GHz (model numbers 915–960)Number of Transistors 376 million2 MB × 2 (non-shared, 4 MB total) L2 cacheContains 2x Cedar Mill dies in one package

Dual-core microprocessorEnabled Hyper-Threading800(4×200) MHz front side bus

Smithfield – 90 nm process technology (3.2 GHz)

Variants

Pentium 840 EE – 3.20 GHz (2 × 1 MB L2)

Presler – 65 nm process technology (3.46, 3.73)

2 MB × 2 (non-shared, 4 MB total) L2 cacheVariants

Pentium 955 EE – 3.46 GHz, 1066 MHz front side busPentium 965 EE – 3.73 GHz, 1066 MHz front side bus

NoconaIntroduced 2004

IrwindaleIntroduced 2004

CranfordIntroduced April 2005

[edit]Pentium D

[edit]Pentium Extreme Edition

[edit]Xeon

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MP version of Nocona

PotomacIntroduced April 2005Cranford with 8 MB of L3 cache

Paxville DP (2.8 GHz)

Introduced October 10, 2005Dual-core version of Irwindale, with 4 MB of L2 Cache (2 MB per core)2.8 GHz800 MT/s front side bus

Paxville MP – 90 nm process (2.67 – 3.0 GHz)

Introduced November 1, 2005Dual-Core Xeon 7000 seriesMP-capable version of Paxville DP2 MB of L2 Cache (1 MB per core) or 4 MB of L2 (2 MB per core)667 MT/s FSB or 800 MT/s FSB

Dempsey – 65 nm process (2.67 – 3.73 GHz)

Introduced May 23, 2006Dual-Core Xeon 5000 seriesMP version of Presler667 MT/s or 1066 MT/s FSB4 MB of L2 Cache (2 MB per core)LGA 771 (Socket J).

Tulsa – 65 nm process (2.5 – 3.4 GHz)

Introduced August 29, 2006Dual-Core Xeon 7100-seriesImproved version of Paxville MP667 MT/s or 800 MT/s FSB

Woodcrest – 65 nm process technology

Server and Workstation CPU (SMP support for dual CPU system)Introduced June 26, 2006Dual-CoreIntel VT-x, multiple OS supportEIST (Enhanced Intel SpeedStep Technology) in 5140, 5148LV, 5150, 5160Execute Disable BitTXT, enhanced security hardware extensionsSSSE3 SIMD instructionsiAMT2 (Intel Active Management Technology), remotely manage computersVariants

Xeon 5160 – 3.00 GHz (4 MB L2, 1333 MHz FSB, 80 W)Xeon 5150 – 2.66 GHz (4 MB L2, 1333 MHz FSB, 65 W)Xeon 5140 – 2.33 GHz (4 MB L2, 1333 MHz FSB, 65 W)Xeon 5130 – 2.00 GHz (4 MB L2, 1333 MHz FSB, 65 W)Xeon 5120 – 1.86 GHz (4 MB L2, 1066 MHz FSB, 65 W)

[edit]64-bit processors: Intel 64 – Core microarchitecture

[edit]Xeon

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Xeon 5110 – 1.60 GHz (4 MB L2, 1066 MHz FSB, 65 W)Xeon 5148LV – 2.33 GHz (4 MB L2, 1333 MHz FSB, 40 W) – Low Voltage Edition

Clovertown – 65 nm process technology

Server and Workstation CPU (SMP support for dual CPU system)Introduced December 13, 2006Quad CoreIntel VT-x, multiple OS supportEIST (Enhanced Intel SpeedStep Technology) in E5365, L5335Execute Disable BitTXT, enhanced security hardware extensionsSSSE3 SIMD instructionsiAMT2 (Intel Active Management Technology), remotely manage computersVariants

Xeon X5355 – 2.66 GHz (2×4 MB L2, 1333 MHz FSB, 105 W)Xeon E5345 – 2.33 GHz (2×4 MB L2, 1333 MHz FSB, 80 W)Xeon E5335 – 2.00 GHz (2×4 MB L2, 1333 MHz FSB, 80 W)Xeon E5320 – 1.86 GHz (2×4 MB L2, 1066 MHz FSB, 65 W)Xeon E5310 – 1.60 GHz (2×4 MB L2, 1066 MHz FSB, 65 W)Xeon L5320 – 1.86 GHz (2×4 MB L2, 1066 MHz FSB, 50 W)-- Low Voltage Edition

Conroe – 65 nm process technology

Desktop CPU (SMP support restricted to 2 CPUs)Two cores on one dieIntroduced July 27, 2006SSSE3 SIMD instructionsNumber of Transistors: 291 Million64 KB of L1 cache per core (32+32 KB 8-way)Intel VT-x, multiple OS supportTXT, enhanced security hardware extensionsExecute Disable BitEIST (Enhanced Intel SpeedStep Technology)iAMT2 (Intel Active Management Technology), remotely manage computersLGA 775Variants

Core 2 Duo E6850 – 3.00 GHz (4 MB L2, 1333 MHz FSB)Core 2 Duo X6800 – 2.93 GHz (4 MB L2, 1066 MHz FSB)Core 2 Duo E6750 – 2.67 GHz (4 MB L2, 1333 MHz FSB, 65W)Core 2 Duo E6700 – 2.67 GHz (4 MB L2, 1066 MHz FSB)Core 2 Duo E6600 – 2.40 GHz (4 MB L2, 1066 MHz FSB, 65W)Core 2 Duo E6550 – 2.33 GHz (4 MB L2, 1333 MHz FSB)Core 2 Duo E6420 – 2.13 GHz (4 MB L2, 1066 MHz FSB)Core 2 Duo E6400 – 2.13 GHz (2 MB L2, 1066 MHz FSB)Core 2 Duo E6320 – 1.86 GHz (4 MB L2, 1066 MHz FSB) Family 6, Model 15, Stepping 6Core 2 Duo E6300 – 1.86 GHz (2 MB L2, 1066 MHz FSB)

Conroe XE – 65 nm process technology

Desktop Extreme Edition CPU (SMP support restricted to 2 CPUs)Introduced July 27, 2006

[edit]Intel Core 2

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same features as ConroeLGA 775Variants

Core 2 Extreme X6800 – 2.93 GHz (4 MB L2, 1066 MHz FSB)

Allendale – 65 nm process technology

Desktop CPU (SMP support restricted to 2 CPUs)Two CPUs on one dieIntroduced January 21, 2007SSSE3 SIMD instructionsNumber of Transistors 167 MillionTXT, enhanced security hardware extensionsExecute Disable BitEIST (Enhanced Intel SpeedStep Technology)iAMT2 (Intel Active Management Technology), remotely manage computersLGA 775Variants

Core 2 Duo E4700 – 2.60 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo E4600 – 2.40 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo E4500 – 2.20 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo E4400 – 2.00 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo E4300 – 1.80 GHz (2 MB L2, 800 MHz FSB) Family 6, Model 15, Stepping 2

Merom – 65 nm process technology

Mobile CPU (SMP support restricted to 2 CPUs)Introduced July 27, 2006Family 6, Model 15same features as ConroeSocket M / Socket PVariants

Core 2 Duo T7800 – 2.60 GHz (4 MB L2, 800 MHz FSB) (Santa Rosa platform)Core 2 Duo T7700 – 2.40 GHz (4 MB L2, 800 MHz FSB)Core 2 Duo T7600 – 2.33 GHz (4 MB L2, 667 MHz FSB)Core 2 Duo T7500 – 2.20 GHz (4 MB L2, 800 MHz FSB)Core 2 Duo T7400 – 2.16 GHz (4 MB L2, 667 MHz FSB)Core 2 Duo T7300 – 2.00 GHz (4 MB L2, 800 MHz FSB)Core 2 Duo T7250 – 2.00 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo T7200 – 2.00 GHz (4 MB L2, 667 MHz FSB)Core 2 Duo T7100 – 1.80 GHz (2 MB L2, 800 MHz FSB)Core 2 Duo T5600 – 1.83 GHz (2 MB L2, 667 MHz FSB) Family 6, Model 15, Stepping 6Core 2 Duo T5550 – 1.83 GHz (2 MB L2, 667 MHz FSB, no VT)Core 2 Duo T5500 – 1.66 GHz (2 MB L2, 667 MHz FSB, no VT)Core 2 Duo T5470 – 1.60 GHz (2 MB L2, 800 MHz FSB, no VT)Core 2 Duo T5450 – 1.66 GHz (2 MB L2, 667 MHz FSB, no VT)Core 2 Duo T5300 – 1.73 GHz (2 MB L2, 533 MHz FSB, no VT)Core 2 Duo T5270 – 1.40 GHz (2 MB L2, 800 MHz FSB, no VT)Core 2 Duo T5250 – 1.50 GHz (2 MB L2, 667 MHz FSB, no VT)Core 2 Duo T5200 – 1.60 GHz (2 MB L2, 533 MHz FSB, no VT)Core 2 Duo L7500 – 1.60 GHz (4 MB L2, 800 MHz FSB) (Low Voltage)Core 2 Duo L7400 – 1.50 GHz (4 MB L2, 667 MHz FSB) (Low Voltage)

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Core 2 Duo L7300 – 1.40 GHz (4 MB L2, 800 MHz FSB) (Low Voltage)Core 2 Duo L7200 – 1.33 GHz (4 MB L2, 667 MHz FSB) (Low Voltage)Core 2 Duo U7700 – 1.33 GHz (2 MB L2, 533 MHz FSB) (Ultra Low Voltage)Core 2 Duo U7600 – 1.20 GHz (2 MB L2, 533 MHz FSB) (Ultra Low Voltage)Core 2 Duo U7500 – 1.06 GHz (2 MB L2, 533 MHz FSB) (Ultra Low Voltage)

Kentsfield – 65 nm process technology

Two dual-core cpu dies in one package.Desktop CPU Quad Core (SMP support restricted to 4 CPUs)Introduced December 13, 2006same features as Conroe but with 4 CPU CoresNumber of Transistors 586 MillionLGA 775Family 6, Model 15, Stepping 11Variants

Core 2 Extreme QX6850 – 3 GHz (2×4 MB L2 Cache, 1333 MHz FSB)Core 2 Extreme QX6800 – 2.93 GHz (2×4 MB L2 Cache, 1066 MHz FSB) (April 9, 2007)Core 2 Extreme QX6700 – 2.66 GHz (2×4 MB L2 Cache, 1066 MHz FSB) (November 14,2006)Core 2 Quad Q6700 – 2.66 GHz (2×4 MB L2 Cache, 1066 MHz FSB) (July 22, 2007)Core 2 Quad Q6600 – 2.40 GHz (2×4 MB L2 Cache, 1066 MHz FSB) (January 7, 2007)

Wolfdale – 45 nm process technology

Die shrink of ConroeSame features as Conroe with the addition of:-

50% more cache, 6 MB as opposed to 4 MBIntel Trusted Execution TechnologySSE4 SIMD instructions

Number of Transistors 410 MillionVariants

Core 2 Duo E8600 – 3.33 GHz (6 MB L2, 1333 MHz FSB)Core 2 Duo E8500 – 3.16 GHz (6 MB L2, 1333 MHz FSB)Core 2 Duo E8400 – 3.00 GHz (6 MB L2, 1333 MHz FSB)Core 2 Duo E8300 – 2.83 GHz (6 MB L2, 1333 MHz FSB)Core 2 Duo E8200 – 2.66 GHz (6 MB L2, 1333 MHz FSB)Core 2 Duo E8190 – 2.66 GHz (6 MB L2, 1333 MHz FSB, no TXT, no VT)

Wolfdale-3M – 45 nm process technology

Intel Trusted Execution TechnologyVariants

Core 2 Duo E7600 – 3.06 GHz (3 MB L2, 1066 MHz FSB)Core 2 Duo E7500 – 2.93 GHz (3 MB L2, 1066 MHz FSB)Core 2 Duo E7400 – 2.80 GHz (3 MB L2, 1066 MHz FSB)Core 2 Duo E7300 – 2.66 GHz (3 MB L2, 1066 MHz FSB)Core 2 Duo E7200 – 2.53 GHz (3 MB L2, 1066 MHz FSB)

Yorkfield – 45 nm process technology

Quad core CPUDie shrink of KentsfieldContains 2x Wolfdale dual core dies in one packageSame features as Wolfdale

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Number of Transistors 820 MillionVariants

Core 2 Extreme QX9770 – 3.20 GHz (2×6 MB L2, 1600 MHz FSB)Core 2 Extreme QX9650 – 3.00 GHz (2×6 MB L2, 1333 MHz FSB)Core 2 Quad Q9650 – 3 GHz (2×6 MB L2, 1333 MHz FSB)Core 2 Quad Q9550 – 2.83 GHz (2×6 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q9550s – 2.83 GHz (2×6 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q9450 – 2.66 GHz (2×6 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q9505 – 2.83 GHz (2×3 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q9505s – 2.83 GHz (2×3 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q9500 – 2.83 GHz (2×3 MB L2, 1333 MHz FSB, 95W TDP, no TXT)Core 2 Quad Q9400 – 2.66 GHz (2×3 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q9400s – 2.66 GHz (2×3 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q9300 – 2.50 GHz (2×3 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q8400 – 2.66 GHz (2×2 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q8400s – 2.66 GHz (2×2 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q8300 – 2.50 GHz (2×2 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q8300s – 2.50 GHz (2×2 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q8200 – 2.33 GHz (2×2 MB L2, 1333 MHz FSB, 95W TDP)Core 2 Quad Q8200s – 2.33 GHz (2×2 MB L2, 1333 MHz FSB, 65W TDP)Core 2 Quad Q7600 – 2.70 GHz (2×1 MB L2, 800 MHz FSB, no SSE4) (no Q7600 athttp://ark.intel.com/ProductCollection.aspx?familyID=28398 )

Intel Core2 Quad Mobile Processor Family – 45 nm process technology

Quad core CPUVariants

Core 2 Quad Q9100 – 2.26 GHz (2×6 MB L2, 1066 MHz FSB, 45W TDP)Core 2 Quad Q9000 – 2.00 GHz (2×3 MB L2, 1066 MHz FSB, 45W TDP)

Allendale – 65 nm process technology

Desktop CPU (SMP support restricted to 2 CPUs)Two cores on one dieIntroduced January 21, 2007SSSE3 SIMD instructionsNumber of Transistors 167 MillionTXT, enhanced security hardware extensionsExecute Disable BitEIST (Enhanced Intel SpeedStep Technology)Variants

Intel Pentium E2220 – 2.40 GHz (1 MB L2, 800 MHz FSB)Intel Pentium E2200 – 2.20 GHz (1 MB L2, 800 MHz FSB)Intel Pentium E2180 – 2.00 GHz (1 MB L2, 800 MHz FSB)Intel Pentium E2160 – 1.80 GHz (1 MB L2, 800 MHz FSB)Intel Pentium E2140 – 1.60 GHz (1 MB L2, 800 MHz FSB)

Wolfdale-3M 45 nm process technology

Intel Pentium E6800 – 3.33 GHz (2 MB L2,1066 MHz FSB)Intel Pentium E6700 – 3.20 GHz (2 MB L2,1066 MHz FSB)Intel Pentium E6600 – 3.06 GHz (2 MB L2,1066 MHz FSB)

[edit]Pentium Dual Core

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Intel Pentium E6500 – 2.93 GHz (2 MB L2,1066 MHz FSB)Intel Pentium E6300 – 2.80 GHz (2 MB L2,1066 MHz FSB)Intel Pentium E5800 – 3.20 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E5700 – 3.00 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E5500 – 2.80 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E5400 – 2.70 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E5300 – 2.60 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E5200 – 2.50 GHz (2 MB L2, 800 MHz FSB)Intel Pentium E2210 – 2.20 GHz (1 MB L2, 800 MHz FSB)

Allendale – 65 nm process technology

Variants

Intel Celeron E1600 – 2.40 GHz (512 KB L2, 800 MHz FSB)Intel Celeron E1500 – 2.20 GHz (512 KB L2, 800 MHz FSB)Intel Celeron E1400 – 2.00 GHz (512 KB L2, 800 MHz FSB)Intel Celeron E1300 – 1.80 GHz (512 KB L2, 800 MHz FSB) (Exist?)Intel Celeron E1200 – 1.60 GHz (512 KB L2, 800 MHz FSB)

Wolfdale-3M – 45 nm process technology

Variants

Intel Celeron E3500 – 2.70 GHz (1 MB L2, 800 MHz FSB)Intel Celeron E3400 – 2.60 GHz (1 MB L2, 800 MHz FSB)Intel Celeron E3300 – 2.50 GHz (1 MB L2, 800 MHz FSB)Intel Celeron E3200 – 2.40 GHz (1 MB L2, 800 MHz FSB)

Conroe-L – 65 nm process technology

Variants

Intel Celeron 450 – 2.20 GHz (512 KB L2, 800 MHz FSB)Intel Celeron 440 – 2.00 GHz (512 KB L2, 800 MHz FSB)Intel Celeron 430 – 1.80 GHz (512 KB L2, 800 MHz FSB)Intel Celeron 420 – 1.60 GHz (512 KB L2, 800 MHz FSB)Intel Celeron 220 – 1.20 GHz (512 KB L2, 533 MHz FSB)

Conroe-CL – 65 nm process technology

LGA 771 packageVariants

Intel Celeron 445 – 1.87 GHz (512 KB L2, 1066 MHz FSB)

Merom-L 65 nm process technology

64 KB L1 cache1 MB L2 cache (integrated)SSE3 SIMD instructions, 533 MHz front-side bus, execute-disable bit, 64-bitNo SpeedStep technology, is not part of the 'Centrino' packageVariants

520 – 1.60 GHz530 – 1.73 GHz540 – 1.86 GHz550 – 2.00 GHz560 - 2.13 GHz

[edit]Celeron

[edit]Celeron M

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Clarkdale – 32 nm process technology

2 physical cores/2 threads3 MB L3 cacheIntroduced January 2010Socket 1156 LGA2-channels DDR3Integrated HD GPUVariants

G6950 - 2.8 GHz (No HyperThreading)[5]

G6960 - 2.933 GHz (No HyperThreading)

Clarkdale – 32 nm process technology

2 physical cores/4 threads64 Kb L1 cache512 Kb L2 cache4 MB L3 cacheIntroduced January, 2010Socket 1156 LGA2-channels DDR3Integrated HD GPUVariants

530 – 2.93 GHz Hyper-Threading540 – 3.06 GHz Hyper-Threading550 – 3.2 GHz Hyper-Threading560 – 3.33 GHz Hyper-Threading

Lynnfield – 45 nm process technology

4 physical cores32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache8 MB common L3 cacheIntroduced September 8, 2009Family 6 Model E (Ext. Model 1E)Socket 1156 LGA2-channels DDR3Variants

750S – 2.40 GHz/3.20 GHz Turbo Boost750 – 2.66 GHz/3.20 GHz Turbo Boost760 – 2.80 GHz/3.33 GHz Turbo Boost

Clarkdale – 32 nm process technology

2 physical cores/4 threads64 Kb L1 cache

[edit]64-bit processors: Intel 64 – Nehalem microarchitecture

[edit]Intel Pentium

[edit]Core i3

[edit]Core i5

Page 34: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

512 Kb L2 cache4 MB L3 cacheIntroduced January, 2010Socket 1156 LGA2-channels DDR3Integrated HD GPUAES SupportVariants

650/655K – 3.2 GHz Hyper-Threading Turbo Boost660/661 – 3.33 GHz Hyper-Threading Turbo Boost670 – 3.46 GHz Hyper-Threading Turbo Boost680 – 3.60 GHz Hyper-Threading Turbo Boost

Bloomfield – 45 nm process technology

4 physical cores256 KB L2 cache8 MB L3 cacheFront side bus replaced with QuickPath up to 6.4GT/sHyper-Threading is again included. This had previously been removed at the introduction ofCore line781 million transistorsIntel Turbo Boost TechnologyTDP 130WIntroduced November 17, 2008Socket 1366 LGA3-channels DDR3Variants

975 (extreme edition) – 3.33 GHz/3.60 GHz Turbo Boost965 (extreme edition) – 3.20 GHz/3.46 GHz Turbo Boost960 - 3.20 GHz/3.46 GHz Turbo Boost950 – 3.06 GHz/3.33 GHz Turbo Boost940 – 2.93 GHz/3.20 GHz Turbo Boost930 – 2.80 GHz/3.06 GHz Turbo Boost920 – 2.66 GHz/2.93 GHz Turbo Boost

Lynnfield – 45 nm process technology

4 physical cores256 KB L2 cache8 MB L3 cacheNo QuickPath, instead compatible with slower DMI interfaceHyper-Threading is includedIntroduced September 8, 2009Socket 1156 LGA2-channels DDR3Variants

880 – 3.06 GHz/3.73 GHz Turbo Boost (TDP 95W)870/875K – 2.93 GHz/3.60 GHz Turbo Boost (TDP 95W)870S – 2.67 GHz/3.60 GHz Turbo Boost (TDP 82W)

[edit]Core i7

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860 – 2.80 GHz/3.46 GHz Turbo Boost (TDP 95W)860S – 2.53 GHz/3.46 GHz Turbo Boost (TDP 82W)

TODO: Westmere

Gulftown – 32 nm process technology

6 physical cores256 KB L2 cache12 MB L3 cacheFront side bus replaced with QuickPath up to 6.4GT/sHyper-Threading is includedIntel Turbo Boost TechnologySocket 1366 LGATDP 130WIntroduced 16 March 2010Variants

990X Extreme Edition - 3.46 GHz/3.73 GHz Turbo Boost980X Extreme Edition - 3.33 GHz/3.60 GHz Turbo Boost970 - 3.20 GHz/3.46 GHz Turbo Boost

Clarksfield - Intel Core i7 Mobile Processor Family – 45 nm process technology

4 physical coresHyper-Threading is includedIntel Turbo Boost TechnologyVariants

940XM Extreme Edition - 2.13 GHz/3.33 GHz Turbo Boost (8 MB L3, TDP 55W)920XM Extreme Edition - 2.00 GHz/3.20 GHz Turbo Boost (8 MB L3, TDP 55W)840QM - 1.86 GHz/3.20 GHz Turbo Boost (8 MB L3, TDP 45W)820QM - 1.73 GHz/3.06 GHz Turbo Boost (8 MB L3, TDP 45W)740QM - 1.73 GHz/2.93 GHz Turbo Boost (6 MB L3, TDP 45W)720QM - 1.60 GHz/2.80 GHz Turbo Boost (6 MB L3, TDP 45W)

Gainestown – 45 nm process technology

Same processor dies as Bloomfield256 KB L2 cache8 MB L3 cache, 4MB may be disabledQuickPath up to 6.4GT/sHyper-Threading is included in some models781 million transistorsIntroduced March 29, 2009Variants

W5590, W5580, X5570, X5560, X5550, E5540, E5530, L5530, E5520, L5520, L5518 – 4Cores, 8 MB L3 cache, HTE5506, L5506, E5504 – 4 cores, 4 MB L3 cache, no HTL5508, E5502, E5502 – 2 cores, 4 MB L3 cache, no HT

[edit]Xeon

[edit]64-bit processors: Intel 64 – Sandy Bridge / Ivy Bridgemicroarchitecture

[edit]Celeron

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Sandy Bridge – 32 nm process technology

2 physical cores/2 threads (500 series), 1 physical core/1 thread (model G440) or 1 physicalcore/2 threads (model G460)2 MB L3 cache (500 series), 1 MB (model G440) or 1.5 MB (model G460)Introduced 3rd quarter, 2011Socket 1155 LGA2-channels DDR3-1066400 series has max TDP of 35 W500-series variants ending in 'T' have a peak TDP of 35 W, others 65 WIntegrated GPU

All variants have peak GPU turbo frequencies of 1 GHzVariants in the 400 series have GPUs running at a base frequency of 650 MHzVariants in the 500 series ending in 'T' have GPUs running at a base frequency of650 MHz; others at 850 MHzAll variants have 6 GPU execution units

Variants

G440 - 1.6 GHzG460 - 1.8 GHzG530T - 2.0 GHzG530 - 2.4 GHzG540 - 2.5 GHzG550 - 2.6 GHz

Sandy Bridge – 32 nm process technology

2 physical cores/2 threads3 MB L3 cache624 million transistorsIntroduced May, 2011Socket 1155 LGA2-channels DDR3-1333 (800 series) or DDR3-1066 (600 series)Variants ending in 'T' have a peak TDP of 35 W, others 65 WIntegrated GPU

All variants have peak GPU turbo frequencies of 1.1 GHzVariants ending in 'T' have GPUs running at a base frequency of 650 MHz; others at850 MHzAll variants have 6 GPU execution units

Variants

G620T - 2.2 GHzG630T - 2.3 GHzG620 - 2.6 GHzG622 - 2.6 GHzG630 - 2.7 GHzG632 - 2.7 GHzG840 - 2.8 GHzG850 - 2.9 GHzG860 - 3.0 GHzG870 - 3.1 GHz

[edit]Pentium

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Sandy Bridge – 32 nm process technology

2 physical cores/4 threads32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache3 MB L3 cache624 million transistorsIntroduced January, 2011Socket 1155 LGA2-channels DDR3-1333Variants ending in 'T' have a peak TDP of 35 W, others 65 WIntegrated GPU

All variants have peak GPU turbo frequencies of 1.1 GHzVariants ending in 'T' have GPUs running at a base frequency of 650 MHz; others at850 MHzVariants ending in '5' have Intel HD Graphics 3000 (12 execution units); others have IntelHD Graphics 2000 (6 execution units)

Variants

i3-2100T - 2.5 GHzi3-2120T - 2.6 GHzi3-2100 - 3.1 GHzi3-2102 - 3.1 GHzi3-2105 - 3.1 GHzi3-2120 - 3.3 GHzi3-2125 - 3.3 GHzi3-2130 - 3.4 GHz

Ivy Bridge – 22 nm Tri-gate transistor process technology

2 physical cores/4 threads32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache3 MB L3 cacheIntroduced September, 2012 (?)Socket 1155 LGA2-channels DDR3-1600Integrated GPU Intel HD Graphics 2500TDP 55 WVariants

i3-3220 - 3.3 GHz

Sandy Bridge – 32 nm process technology

4 physical cores/4 threads (except for i5-2390T which has 2 physical cores/4 threads)32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache6 MB L3 cache (except for i5-2390T which has 3 MB)995 million transistorsIntroduced January, 2011Socket 1155 LGA

[edit]Core i3

[edit]Core i5

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2-channels DDR3-1333Variants ending in 'S' have a peak TDP of 65 W, others 95 W except where notedVariants ending in 'K' have unlocked multipliers; others cannot be overclockedIntegrated GPU

i5-2500T has a peak GPU turbo frequency of 1.25 GHz, others 1.1 GHzVariants ending in 'T' have GPUs running at a base frequency of 650 MHz; others at850 MHzVariants ending in '5' or 'K' have Intel HD Graphics 3000 (12 execution units), except i5-2550K which has no GPU; others have Intel HD Graphics 2000 (6 execution units)Variants ending in 'P' and the i5-2550K have no GPU

Variants

i5-2390T - 2.7 GHz/3.5 GHz Turbo Boost (35 W max TDP)i5-2500T - 2.3 GHz/3.3 GHz Turbo Boost (45 W max TDP)i5-2400S - 2.5 GHz/3.3 GHz Turbo Boosti5-2405S - 2.5 GHz/3.3 GHz Turbo Boosti5-2500S - 2.7 GHz/3.7 GHz Turbo Boosti5-2300 - 2.8 GHz/3.1 GHz Turbo Boosti5-2310 - 2.9 GHz/3.2 GHz Turbo Boosti5-2320 - 3.0 GHz/3.3 GHz Turbo Boosti5-2380P - 3.1 GHz/3.4 GHz Turbo Boosti5-2400 - 3.1 GHz/3.4 GHz Turbo Boosti5-2450P - 3.2 GHz/3.5 GHz Turbo Boosti5-2500 - 3.3 GHz/3.7 GHz Turbo Boosti5-2500K - 3.3 GHz/3.7 GHz Turbo Boosti5-2550K - 3.4 GHz/3.8 GHz Turbo Boost

Ivy Bridge – 22 nm Tri-gate transistor process technology

4 physical cores/4 threads (except for i5-3470T which has 2 physical cores/4 threads)32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache6 MB L3 cache (except for i5-3470T which has 3 MB)Introduced April, 2012Socket 1155 LGA2-channels DDR3-1600Variants ending in 'S' have a peak TDP of 65 W, Variants ending in 'T' have a peak TDP of 35or 45 W (see variants), others 77 W except where notedVariants ending in 'K' have unlocked multipliers; others cannot be overclockedIntegrated GPU Intel HD Graphics 2500 or Intel HD Graphics 4000 (i5-3475S and i5-3570Konly)Variants

i5-3470T - 2.9 GHz/3.6 GHz max Turbo Boost (35 W TDP)i5-3570T - 2.3 GHz/3.3 GHz max Turbo Boost (45 W TDP)i5-3450S - 2.8 GHz/3.5 GHz max Turbo Boosti5-3470S - 2.9 GHz/3.6 GHz max Turbo Boosti5-3475S - 2.9 GHz/3.6 GHz max Turbo Boosti5-3550S - 3.0 GHz/3.7 GHz max Turbo Boosti5-3570S - 3.1 GHz/3.8 GHz max Turbo Boosti5-3450 - 3.1 GHz/3.5 GHz max Turbo Boosti5-3470 - 3.2 GHz/3.6 GHz max Turbo Boost

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i5-3550 - 3.3 GHz/3.7 GHz max Turbo Boosti5-3570 - 3.4 GHz/3.8 GHz max Turbo Boosti5-3570K - 3.4 GHz/3.8 GHz max Turbo Boost

Sandy Bridge – 32 nm process technology

4 physical cores/8 threads32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache8 MB L3 cache995 million transistorsIntroduced January, 2011Socket 1155 LGA2-channels DDR3-1333Variants ending in 'S' have a peak TDP of 65 W, others 95 WVariants ending in 'K' have unlocked multipliers; others cannot be overclockedIntegrated GPU

All variants have base GPU frequencies of 850MHz and peak GPU turbo frequencies of1.35 GHzVariants ending in 'K' have Intel HD Graphics 3000 (12 execution units); others have IntelHD Graphics 2000 (6 execution units)

Variants

i7-2600S - 2.8 GHz/3.8 GHz Turbo Boosti7-2600 - 3.4 GHz/3.8 GHz Turbo Boosti7-2600K - 3.4 GHz/3.8 GHz Turbo Boosti7-2700K - 3.5 GHz/3.9 GHz Turbo Boost

Sandy Bridge-E – 32 nm process technology

Up to 8 physical cores/16 threads depending on model number32+32 Kb (per core) L1 cache256 Kb (per core) L2 cacheUp to 20 MB L3 cache depending on model number2270 million transistorsIntroduced November, 2011Socket 2011 LGA4-channels DDR3-1600All variants have a peak TDP of 130 WNo integrated GPUVariants

i7-3820 - 3.6 GHz/3.8 GHz Turbo Boost, 4 cores, 10 MB L3 cachei7-3930K - 3.2 GHz/3.8 GHz Turbo Boost, 6 cores, 12 MB L3 cachei7-3960X - 3.3 GHz/3.9 GHz Turbo Boost, 6 cores, 15 MB L3 cache

Ivy Bridge – 22 nm Tri-gate transistor process technology

4 physical cores/8 threads32+32 Kb (per core) L1 cache256 Kb (per core) L2 cache8 MB L3 cacheIntroduced April, 2012Socket 1155 LGA

[edit]Core i7

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2-channels DDR3-1600Variants ending in 'S' have a peak TDP of 65 W, variants ending in 'T' have a peak TDP of45 W, others 77 WVariants ending in 'K' have unlocked multipliers; others cannot be overclockedIntegrated GPU Intel HD Graphics 4000Variants

i7-3770T - 2.5 GHz/3.7 GHz Turbo Boosti7-3770S - 3.1 GHz/3.9 GHz Turbo Boosti7-3770 - 3.4 GHz/3.9 GHz Turbo Boosti7-3770K - 3.5 GHz/3.9 GHz Turbo Boost

Intel discontinued the use of part numbers such as 80486 in the marketing of mainstream x86-architecture microprocessors with the introduction of the Pentium brand in 1993. However, numericalcodes, in the 805xx range, continued to be assigned to these processors for internal and partnumbering uses. The following is a list of such product codes in numerical order:

Productcode

Marketing name(s) Codename(s)

80500 Pentium P5 (A-step)

80501 Pentium P5

80502 Pentium P54C, P54CS

80503 Pentium with MMX Technology P55C, Tillamook

80521 Pentium Pro P6

80522 Pentium II Klamath

80523 Pentium II, Celeron, Pentium II Xeon Deschutes, Covington, Drake

80524 Pentium II, Celeron Dixon, Mendocino

80525 Pentium III, Pentium III Xeon Katmai, Tanner

80526 Pentium III, Celeron, Pentium III Xeon Coppermine, Cascades

80528 Pentium 4, Xeon Willamette (Socket 423), Foster

80529 cancelled Timna

80530 Pentium III, Celeron Tualatin

80531 Pentium 4, Celeron Willamette (Socket 478)

80532 Pentium 4, Celeron, Xeon Northwood, Prestonia, Gallatin

80533 Pentium III Coppermine (cD0-step)

80534 Pentium 4 SFF Northwood (small form factor)

80535 Pentium M, Celeron M 310–340 Banias

80536 Pentium M, Celeron M 350–390 Dothan

80537 Core 2 Duo T5xxx, T7xxx, Celeron M 5xx Merom

80538 Core Solo, Celeron M 4xx Yonah

80539 Core Duo, Pentium Dual-Core T-series Yonah

80541 Itanium Merced

80542 Itanium 2 McKinley

80543 Itanium 2 Madison

[edit]Intel 805xx product codes

Page 41: The Evolution Of Microprocessor From 4-bits To 64-bits. (Info-graphics)

80546 Pentium 4, Celeron D, XeonPrescott (Socket 478), Nocona,Irwindale, Cranford, Potomac

80547 Pentium 4, Celeron D Prescott (LGA 775)

80548 canceled Tejas and Jayhawk

80549 Itanium 2 90xx Montecito

80550 Dual-Core Xeon 71xx Tulsa

80551 Pentium D, Pentium EE, Dual-Core Xeon Smithfield, Paxville DP

80552 Pentium 4, Celeron D Cedar Mill

80553 Pentium D, Pentium EE Presler

80554 Celeron 800/900/1000 ULV Shelton

80555 Dual-Core Xeon 50xx Dempsey

80556 Dual-Core Xeon 51xx Woodcrest

80557Core 2 Duo E4xxx. E6xxx, Dual-Core Xeon 30xx,Pentium Dual-Core E2xxx

Conroe

80560 Dual-Core Xeon 70xx Paxville MP

80562Core 2 Quad, Core 2 Extreme QX6xxx, Quad-CoreXeon 32xx

Kentsfield

80563 Quad-Core Xeon 53xx Clovertown

80564 Xeon 7200 Tigerton-DC

80565 Xeon 7300 Tigerton

80566 Atom Z5xx Silverthorne

80567 Itanium 91xx Montvale

80569Core 2 Quad Q9xxx, Core 2 Extreme QX9xxx, Xeon33xx

Yorkfield

80570 Core 2 Duo E8xxx, Xeon 31xx Wolfdale

80571Core 2 Duo E7xxx, Pentium Dual-Core E5xxx,Pentium Dual-Core E2210

Wolfdale-3M

80573 Xeon 5200 Wolfdale-DP

80574 Core 2 Extreme QX9775, Xeon 5400 Harpertown

80576Core 2 Duo P7xxx, T8xxx, P8xxx, T9xxx, P9xxx,SL9xxx, SP9xxx, Core 2 Extreme X9xxx

Penryn

80577 Core 2 Duo P7xxx, P8xxx, SU9xxx, T6xxx, T8xxx Penryn-3M

80578 LE80578 Vermilion Range

80579 EP80579 Tolapai

80580 Core 2 Quad Q8xxx, Q9xxx, Xeon 33xx Yorkfield-6M

80581 Core 2 Quad Q9xxx Penryn-QC

80582 Xeon 74xx Dunnington

80583 Xeon 74xx Dunnington-QC

80584 Xeon X33x3 LV Yorkfield CL

80585 Core 2 Solo SU3xxx, Celeron 7xx, 9xx Penryn-L

80586 Atom 2xx, N2xx Diamondville

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80587 Atom 3xx Diamondville DC

80588 Xeon L3014, E3113 Wolfdale-CL

Productcode

Marketing name(s) Codename(s)

80601 Core i7, Xeon 35xx Bloomfield

80602 Xeon 55xx Gainestown

80603 Itanium 93xx Tukwila

80604 Xeon 65xx, Xeon 75xx Beckton

80605 Core i5-7xx, Core i7-8xx, Xeon 34xx Lynnfield

80606 canceled Havendale

80607Core i7-7xx QM, Core i7-8xx QM, Core i7-9xx XM

Clarksfield

80608 canceled Auburndale

80609 Atom Z6xx Lincroft

80610 Atom N400, D400, D500 Pineview

80611 canceled Larrabee

80612 Xeon C35xx, Xeon C55xx Jasper Forest

80613 Core i7-9xxX, Xeon 36xx Gulftown

80614 Xeon 56xx Westmere-EP

80615 Xeon E7-28xx, Xeon E7-48xx Westmere-EX

80616 Pentium G6xxx, Core i3-5xx, Core i5-6xx Clarkdale

80617 Core i5-5xx, Core i7-6xxM/UM/LM Arrandale

80618 Atom E6x0 Tunnel Creek

80619 Core i7-3xxx Sandy Bridge-EP

80620 Xeon E5-24xx Sandy Bridge-EP-8, Sandy Bridge-EP-4

80621Xeon E5-16xx, Xeon E5-26xx, Xeon E5-46xx

Sandy Bridge-EP-8, Sandy Bridge-EP-4

80622 Sandy Bridge-EP-8

80623Xeon E3-xxxx, Core i3/i5/i7-2xxx, PentiumGxxx, Xeon E3-12xx

Sandy Bridge-HE-4, Sandy Bridge-M-2

80627Core i3/i5/i7-2xxxM,, Pentium Bxxx, CeleronBxxx

Sandy Bridge-HE-4, Sandy Bridge-H-2,Sandy Bridge-M-2

80631 Itanium 95xx Poulson

80632 Atom E6x5C Stellarton

80637 Core i5/i7-3xxx, Xeon-E3 Ivy Bridge

80638 Mobile Core i5/i7-3xxxM Ivy Bridge

80640 Atom Penwell

80641 Atom D2xxx, Atom N2xxx Cedar View

80647 Haswell

[edit]Intel 806xx product codes

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[show]V · T · E ·

Computer Science portal

Electronics portal

80649 Xeon Phi Knight's Corner

80650 Cloverview

Comparison of IntelProcessorsList of future IntelmicroprocessorsList of Intel AtommicroprocessorsList of Intel XeonmicroprocessorsList of Intel ItaniummicroprocessorsList of Intel CeleronmicroprocessorsList of Intel Pentiummicroprocessors

List of Intel Pentium PromicroprocessorsList of Intel Pentium IImicroprocessorsList of Intel Pentium IIImicroprocessorsList of Intel Pentium 4microprocessorsList of Intel Pentium DmicroprocessorsList of Intel Pentium M

microprocessorsList of Intel Pentium Dual-Core microprocessors

List of Intel CoremicroprocessorsList of Intel Core 2microprocessorsList of Intel Core i3microprocessorsList of Intel Core i5microprocessorsList of Intel Core i7microprocessorsList of future IntelmicroprocessorsList of Intel CPUmicroarchitecturesList of AMD CPUmicroarchitecturesList of AMD microprocessorsList of PowerPC processorsComparison of AMDprocessorsList of Freescale products

1. ^ The 4004's original goal was to equal the clock rate of the IBM 1620 Model I (1 MHz); this was notquite met.

2. ^ a b c "Intel Microprocessor Quick Reference Guide - Product Family" . Retrieved 2010-01-08.3. ^ Intel Processor Spec Finder for Celeron M Archived 22 January 2011 at WebCite4. ^ Not listed as an official model by Intel but used by Apple in their Intel-based Mac Mini, released

March 2006)[dead link ]

5. ^ "Intel Pentium Processor G6950 (3M Cache, 2.80 GHz) with SPEC Code(s) SLBMS" . Ark.intel.com.2010-07-13. Archived from the original on 2011-01-22. Retrieved 2010-07-29.

Intel SDK Systems on YouTubeIntel CPUs, an OverviewIntel Museum: History of the MicroprocessorStealey A100 and A110Graphical representation of microarchitectures i386 – presentIntel Product Specifications

Intel processors

[edit]See also

[edit]References

[edit]External links

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