TEST DRIVE User Guide - OPAL-RT · v TestDrive User Guide EVENT.CAPTURE.MODULE.(DIN_EST0-23).....61

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TEST DRIVE User Guide

iii TestDrive User Guide

CONTENTS

ANALOG SENSOR MODULE ............................................................................................................ 13INTRODUCTION.............................................................................................................................. 13SPECIFICATIONS............................................................................................................................ 13FEATURES.LIST............................................................................................................................... 14

TECHNICAL DESCRIPTION .............................................................................................................. 15OVERVIEW....................................................................................................................................... 15FUNCTIONAL.DESCRIPTION......................................................................................................... 16ASM.PIN-OUTS................................................................................................................................ 17TESTDRIVE.ASM.GUI...................................................................................................................... 19ASM.GUI.FEATURES.&.FUNCTIONALITIES................................................................................... 20ASM.CONFIGURATION.GUI............................................................................................................ 21THE.ASM.SIMULINK.MODEL.......................................................................................................... 22

TD.mDl...........................................................................................................................................................22OpCTrl.AnAlOg.SenSOr.mODule.....................................................................................................................22DeSCripTiOn....................................................................................................................................................22pArAmeTerS....................................................................................................................................................22ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................22OpFCn.DigiTAl.OuT.gATeD...............................................................................................................................23DeSCripTiOn....................................................................................................................................................23pArAmeTerS....................................................................................................................................................23OpFCn.STATuS.regiSTer..................................................................................................................................24DeSCripTiOn....................................................................................................................................................24pArAmeTerS....................................................................................................................................................24ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................25

FREQUENTLY.ASKED.QUESTIONS............................................................................................... 26BASE MODULE ................................................................................................................................. 29

INTRODUCTION.............................................................................................................................. 29ARCHITECTURE.OVERVIEW.......................................................................................................... 29

pin.ASSignmenTS.............................................................................................................................................31

MODULE.LEDS................................................................................................................................ 32SYSTEM.IDENTIFICATION.............................................................................................................. 33

CAble.iDenTiFiCATiOn.(iD_Cbl5-0)...................................................................................................................33hArneSS.iDenTiFiCATiOn.(iD_hrnS15-0).........................................................................................................33

ECU.SERIAL.INTERFACE................................................................................................................ 33SeriAl.inTerFACe.D-Shell.9.pin.COnneCTOrS...................................................................................................35CAn.TerminATiOn............................................................................................................................................35SeriAl.line.mODule.(ADC.COnTrOller)..........................................................................................................35

POWER.MODING............................................................................................................................. 36bATTery.COnTrOl............................................................................................................................................37SimulATOr.pOwer............................................................................................................................................37

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BATTERY.CONTROL....................................................................................................................... 37RAIL.CONTROL............................................................................................................................... 37KEY.SWITCH.STATE........................................................................................................................ 37

rAil.enAble.(Din_rAil_en_inp)......................................................................................................................38

TRIGGER.OUT................................................................................................................................. 38SYNCHRONIZATION........................................................................................................................ 38FIRMWARE.UPDATE........................................................................................................................ 38

PULSE DRIVEN LOAD MODULE ..................................................................................................... 39INTRODUCTION.............................................................................................................................. 39ARCHITECTURE.OVERVIEW.......................................................................................................... 39

pin.ASSignmenTS.............................................................................................................................................40


CAble.iDenTiFiCATiOn.(iD_Cbl5-0)...................................................................................................................42

PDL.INPUTS..................................................................................................................................... 42STANDARD.PDL.INPUTS................................................................................................................. 43BIPOLAR.PDL.INPUTS.(BIP_[1:0].&.B_EXTV[1:0])......................................................................... 44FLEXIBLE.PDL.INPUTS.(F_[4:0].&.F_EXTV[4:0])........................................................................... 44SYNCHRONIZATION........................................................................................................................ 45FIRMWARE.UPDATE........................................................................................................................ 45

PULSED OUTPUT MODULE ............................................................................................................. 47INTRODUCTION.............................................................................................................................. 47ARCHITECTURE.OVERVIEW.......................................................................................................... 47

pin.ASSignmenTS.............................................................................................................................................49



PULSED.OUTPUT............................................................................................................................ 51FrequenCy.AnD.DuTy.CyCle.preCiSiOn..............................................................................................................52DigiTAl.mODe.(pO1-24,.eXTV1-12).................................................................................................................53AnAlOg.mODe.(pO1-24,.biASV1-12)..............................................................................................................53

SYNCHRONIZATION........................................................................................................................ 53FIRMWARE.UPDATE........................................................................................................................ 53

REFERENCE PULSE GENERATOR MODULE ................................................................................ 55INTRODUCTION.............................................................................................................................. 55ARCHITECTURE.OVERVIEW.......................................................................................................... 55

pin.ASSignmenTS.............................................................................................................................................57

SYSTEM.IDENTIFICATION.............................................................................................................. 59CAble.iDenTiFiCATiOn.(iD_Cbl5-0)...................................................................................................................59

ENGINE.SYNCHRONOUS.PATTERN.GENERATION...................................................................... 60OPERATION..................................................................................................................................... 60

v TestDrive User Guide

EVENT.CAPTURE.MODULE.(DIN_EST0-23).................................................................................. 61OperATiOn......................................................................................................................................................61KnOCK............................................................................................................................................................61


RESISTIVE SENSORS MODULE ...................................................................................................... 63INTRODUCTION.............................................................................................................................. 63ARCHITECTURE.OVERVIEW.......................................................................................................... 63

pin.ASSignmenTS.............................................................................................................................................65




SWITCH MODULE .............................................................................................................................. 69INTRODUCTION.............................................................................................................................. 69SPECIFICATIONS............................................................................................................................ 69FEATURES.LIST............................................................................................................................... 69TECHNICAL.DESCRIPTION............................................................................................................ 70

DiSCreTe.SwiTCh.............................................................................................................................................71FleXible.SwiTCh..............................................................................................................................................71rOTAry.SwiTCh...............................................................................................................................................72SwiTCh.COnFigurATiOnS...................................................................................................................................72glObAl.rAil.SeleCTiOn...................................................................................................................................73Sm.pin-OuTS..................................................................................................................................................73

GRAPHICAL.USER.INTERFACE..................................................................................................... 75TeSTDriVe.inTerFACe.......................................................................................................................................75ASm.inTerFACe.FeATureS.&.FunCTiOnAliTieS....................................................................................................75Sm.COnFigurATiOn.gui..................................................................................................................................75

SM.SIMULINK.MODEL..................................................................................................................... 78TD.mDl...........................................................................................................................................................78OpCTrl.SwiTCh.mODule..................................................................................................................................78DeSCripTiOn....................................................................................................................................................79TheOry.OF.OperATiOn.......................................................................................................................................79pArAmeTerS....................................................................................................................................................80inpuTS............................................................................................................................................................80OuTpuTS.........................................................................................................................................................80ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................81

Synchronization: ........................................................................................................................................................81

pin.ASSignmenTS.............................................................................................................................................82OpFCn.DigiTAl.SwiTCh....................................................................................................................................83DeSCripTiOn....................................................................................................................................................83pArAmeTerS....................................................................................................................................................83

Inputs ........................................................................................................................................................................84Outputs ......................................................................................................................................................................84

ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................84

TestDrive User Guide vi

OPFCN.STATUS.REGISTER............................................................................................................ 85DeSCripTiOn....................................................................................................................................................85pArAmeTerS....................................................................................................................................................85

Inputs ........................................................................................................................................................................86Outputs ......................................................................................................................................................................86

ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................87

RESOLVER MODULE ......................................................................................................................... 89INTRODUCTION.............................................................................................................................. 89TECHNICAL.DESCRIPTION............................................................................................................ 90

eXTernAl.CArrier.in.SpeCiFiCATiOnS................................................................................................................90reSOlVer.OuT.SpeCiFiCATiOnS..........................................................................................................................90

RESOLVER.OVERVIEW................................................................................................................... 91reSOlVer.pin-OuTS.........................................................................................................................................91

GRAPHICAL.USER.INTERFACE.(GUI)........................................................................................... 94reSOlVer’S.TeSTDriVe.gui.............................................................................................................................94eXCiTer.gui...................................................................................................................................................94inTernAl.CArrier............................................................................................................................................95

MX Exciter Source ....................................................................................................................................................95MX Exciter Frequency ...............................................................................................................................................95

eXTernAl.CArrier...........................................................................................................................................95MX Exciter Amplitude ................................................................................................................................................95MX External Carrier RMS Value ................................................................................................................................95MX External Carrier Avg Value ..................................................................................................................................95MX External Carrier Frequency .................................................................................................................................95MX Source Impedance ..............................................................................................................................................95MX Speed (Hz) ..........................................................................................................................................................95MX Winding ...............................................................................................................................................................96MX SIN Enable ..........................................................................................................................................................96MX SIN Amplitude .....................................................................................................................................................96MX COS Enable ........................................................................................................................................................96MX COS Amplitude ...................................................................................................................................................97MX COS Bias ............................................................................................................................................................97MX Phase ..................................................................................................................................................................97

SySTem.inFOrmATiOn.gui.................................................................................................................................97

THE.RESOLVER.SIMULINK.MODEL............................................................................................... 98TD.mDl...........................................................................................................................................................98reSOlVer.SenSOr.blOCK..................................................................................................................................98DeSCripTiOn....................................................................................................................................................99pArAmeTerS....................................................................................................................................................99

Inputs ........................................................................................................................................................................99Outputs ......................................................................................................................................................................99

ChArACTeriSTiCS.AnD.limiTATiOnS......................................................................................................................99Connector Pin Assignments: ....................................................................................................................................99

FREQUENTLY.ASKED.QUESTIONS............................................................................................. 100RESOLVER.MODULE.APPLICATIONS.......................................................................................... 100APPENDIX.–.TEST.CASE.............................................................................................................. 101

reSOlVer.TeST..............................................................................................................................................101

vii TestDrive User Guide

CURRENT SENSOR MODULE ........................................................................................................ 103INTRODUCTION............................................................................................................................ 103

SpeCiFiCATiOnS.wiThOuT.OpTiOnAl.Op5511.mODule..........................................................................................104CurrenT.SenSOr.mODule.SpeCiFiCATiOnS.wiTh.OpTiOnAl.Op5511.mODule........................................................104reFerenCe.DOCumenTS.................................................................................................................................105DeFiniTiOnS...................................................................................................................................................105

TECHNICAL.DESCRIPTION.......................................................................................................... 106OVerView.....................................................................................................................................................106CurrenT.SOlVer.mODule.pin-OuTS................................................................................................................107pin-OuTS.FOr.Op5511..................................................................................................................................110iD.VAlueS.FOr.The.Op5511.prObe.................................................................................................................110ChAnnel.TeST.OuTpuT....................................................................................................................................111

GRAPHICAL.USER.INTERFACE.(GUI)......................................................................................... 112CurrenT.SOlVer.mODule’S.TeSTDriVe.gui....................................................................................................112

File Management ....................................................................................................................................................113

SySTem.inFOrmATiOn.AnD.Trigger.SeTTingS....................................................................................................115SCOpe..........................................................................................................................................................117DiSplAy.........................................................................................................................................................118

CURRENT.SENSOR.MODULE’S.CONFIGURATION.PANEL........................................................ 121CURRENT.SENSOR.MODULE.SIMULINK.MODEL...................................................................... 122

TD.mDl.........................................................................................................................................................122CurrenT.SenSOr.blOCK.................................................................................................................................122pArAmeTerS..................................................................................................................................................123

Inputs ......................................................................................................................................................................123Outputs ....................................................................................................................................................................123

ChArACTeriSTiCS.AnD.limiTATiOnS....................................................................................................................123Connector Pin Assignments: ..................................................................................................................................123

OPVIRTUALSCOPE....................................................................................................................... 124pArAmeTerS..................................................................................................................................................124

Inputs ......................................................................................................................................................................125Outputs ....................................................................................................................................................................126

FREQUENTLY.ASKED.QUESTIONS............................................................................................. 127CURRENT.SENSOR.MODULE.APPLICATIONS........................................................................... 130APPENDIX.I.-.CUSTOMIZING.THE.GUI........................................................................................ 131

inpuT:.iD......................................................................................................................................................131inpuT:.SCOpe.elemenTS.................................................................................................................................131inpuT:.File.mAnAgemenT................................................................................................................................131OuTpuT:.wAVeFOrm.grAph............................................................................................................................131requireD.COnTrOlS......................................................................................................................................131

APPENDIX.II.–.BITSTREAM.HISTORY.......................................................................................... 132APPENDIX.III.–.MEZZANINES.AND.CONNECTORS.................................................................... 133

TestDrive User Guide viii

LIST OF FIGURES

Figure.1:..Analog.Sensor.Module.Function.......................................................................................... 11Figure.2:..Analog.Sensor.Module.Function.Block.Diagram.................................................................. 13Figure.3:.ASM.and.FPGA.Engine.Functional.Block.Diagram............................................................... 14Figure.4:.Further.details.the.block.diagram.of.the.an.Analog.Sensor.Channel.................................... 15Figure.5:.TestDrive.Analog.Sensor.Module.GUI................................................................................... 17Figure.6:..ASM.Configuration.GUI........................................................................................................ 19Figure.7:..Cable.Identifcation................................................................................................................ 24Figure.8:.Base.Module.block.diagram.with.the.FPGA.engine.............................................................. 27Figure.9:.Base.Module.Firmware.Block.Diagram................................................................................. 28Figure.10:.Cable.Identification.............................................................................................................. 31Figure.11:.CAN.Monitor./.Termination.................................................................................................. 31Figure.12:.Front.Panel.of.the.Base.Module.......................................................................................... 32Figure.13:.Input.&.Output.Power.Banana.Jacks................................................................................... 34Figure.14:.Power.Moding.Diagram....................................................................................................... 35Figure.15:.Pulse.Driven.Load.Module.Electronic.Board.Diagram........................................................ 37Figure.16:.Cable.Identification.............................................................................................................. 40Figure.17:.Standard.PDL.Input.Electrical.Diagram............................................................................... 41Figure.18:.Bipolar.PDL.Input.Electrical.Diagram.................................................................................. 42Figure.19:...Flexible.PDL.Input.Electrical.Diagram............................................................................... 42Figure.20:.Pulsed.Output.Module.Electronic.Board.Diagram............................................................... 45Figure.21:.Pulsed.Output.Module.Firmware.Diagram.......................................................................... 46Figure.22:.Cable.Identification.............................................................................................................. 49Figure.23:..Pulsed.Output.Channel.Diagram........................................................................................ 50Figure.24:..Reference.Pulse.Generation.Module.Electronic.Board.Diagram........................................ 53Figure.25:.Reference.Pulse.Generation.Module.Firmware.Diagram.................................................... 54Figure.26:.Cable.Identification.............................................................................................................. 57Figure.27:..Output.stage.of.the.Engine.Synchronous.Pattern.Generation.module............................... 58Figure.28:.Resistive.Sensor.Module.Electronic.Board.Diagram........................................................... 61Figure.29:.Resistive.Sensor.Module.Firmware.Diagram...................................................................... 62Figure.30:.Cable.Identification.............................................................................................................. 65Figure.31:.Resistive.Sensor.Channel.Diagram..................................................................................... 65Figure.32:.SM.and.FPGA.Functional.Block.Diagram........................................................................... 68Figure.33:.Discrete.Switch.Block.Diagram........................................................................................... 69Figure.34:..Flexible.Switch.Block.Diagram........................................................................................... 69Figure.35:.Rotary.Switch.Block.Diagram.............................................................................................. 70Figure.36:.TestDrive.Switch.Module.Interface...................................................................................... 73Figure.37:.SM.-.Discrete.Switch.Configuration.Interface...................................................................... 74Figure.38:..SM.-.Flexible.Switch.Configuration.Interface...................................................................... 75Figure.39:..SM.-.Rotary.Switch.Configuration.Interface....................................................................... 75

ix TestDrive User Guide

Figure.40:..Switch.module.I/O.signal.desciption................................................................................... 80Figure.41:.Cable.Identifcation............................................................................................................... 86Figure.42:.Nature.of.resolver.signals.................................................................................................... 87Figure.43:.Resolver.block.diagram....................................................................................................... 87Figure.44:.Differential.Input.Analog.to.Digital.Converter.Circuit........................................................... 89Figure.45:..Resolver’s.TestDrive.GUI.................................................................................................... 92Figure.46:.Resolver’s.exciter.GUI......................................................................................................... 92Figure.47:.Resolver’s.winding.GUI....................................................................................................... 94Figure.48:.Resolver’s.system.informations.GUI.................................................................................... 95Figure.49:.System.Information.............................................................................................................. 99Figure.50:.Internal.Carrier.GUI............................................................................................................. 99Figure.51:.Winding.GUI...................................................................................................................... 100Figure.52:.Current.Sensor.Module.connected.with.optional.OP5511................................................. 101Figure.53:.Differential.Input.Analog.to.Digital.Converter.Circuit......................................................... 104Figure.54:.Current.Sensor.Module.and.FPGA.Functional.Block.Diagram.......................................... 105Figure.55:.Signal.List.for.ELCO.56.pin.Connector.A.......................................................................... 106Figure.56:.Signal.List.for.ELCO.56.Pin.Connector.B.......................................................................... 107Figure.57:.OP5511’s.front.panel.connectors...................................................................................... 108Figure.58:.J1,.25.Pin.Connector.(front.view)...................................................................................... 108Figure.59:.Current.Sensor.Module’s.TestDrive.GUI............................................................................ 110Figure.60:.File.Management.GUI....................................................................................................... 111Figure.61:.System.Information.and.Trigger.Settings.GUI................................................................... 113Figure.62:.Scope................................................................................................................................ 115Figure.63:.Display.GUI....................................................................................................................... 116Figure.64:.Current.Sensor.Module’s.Configuration.GUI..................................................................... 119Figure.65:.Current.Sensor.Module.with.OP5340.on.section.A........................................................... 131Figure.66:.Current.Sensor.Module.with.DIN.96-pin.connectors.labeled............................................. 131

TestDrive User Guide x

LIST OF TABLES

Table.1:.ASM.Electrical.Specifications.................................................................................................. 11Table.2:.ASM.Board.Features............................................................................................................... 12Table.3:.Signal.list.for.for.the.ELCO-56.pin.connector.......................................................................... 16Table.4:.Base.Module.DIN.I/O.Signal.Description................................................................................ 29Table.5:.Monitored.Serial.Signals......................................................................................................... 32Table.6:.Serial.Signals.to.Banana.Jacks............................................................................................... 32Table.7:.Serial.Signal.List.9.Pin.D......................................................................................................... 33Table.8:.Power.Moding......................................................................................................................... 34Table.9:.Pulse.Driven.Load.Module..DIN.I/O.Signal.Description.......................................................... 38Table.10:..Pulsed.Output.Module..DIN.IO.Signal.Description............................................................... 47Table.11:.Digital.and.Analog.mode.summary....................................................................................... 49Table.12:.Channel.Characteristics.in.digital.mode................................................................................ 50Table.13:.Channel.Characteristics.in.analog.mode.............................................................................. 51Table.14:.Reference.Pulse.Generation.Module.DIN.I/O.Signal.Description......................................... 55Table.15:.RPG.Output.Voltage.............................................................................................................. 58Table.16:.Resistive.Sensor.Module.DIN.I/O.Signal.Description........................................................... 63Table.17:.Switch.Module.Electrical.Specifications................................................................................ 67Table.18:.Switch.Module.Board.Features............................................................................................. 67Table.19:.Signal.list.for.ELCO-56.pin.connector................................................................................... 72Table.20:.External.carrier.in.specifications........................................................................................... 88Table.21:..Resolver.out.specifications.................................................................................................. 88Table.22:.Resolver.in.signal.list.for.DIN96.and.Screw.Terminal............................................................ 90Table.23:.Resolver.out.signal.list.for.DIN96.and.Screw.Terminal.......................................................... 91Table.24:.Current.Sensor.Module.Specifications................................................................................ 102Table.25:.OP5511.Specifications........................................................................................................ 102Table.26:.Signal.list.for.J1.25-pin.connector....................................................................................... 108Table.27:.Signal.list.for.J2.4-pin.connector......................................................................................... 108Table.28:.ID.list.with.representative.values......................................................................................... 109Table.29:.Bitstreams.history............................................................................................................... 130

11 TestDrive User Guide

Analog Sensor module.Specifications

ANALOG SENSOR MODULE

INTRODUCTIONThe.purpose.of.this.section.is.to.describe.the.Analog.Sensor.Module.–.an.I/O.signal.conditioning.module.that.is.part.of.the.TestDrive.System...It.includes.an.overview.of.the.module’s.functions,.it’s.specifications.and.features,.technical.details,.and.a.description.of.the.context.of.use..

This.document.is.intended.for.run-time.and.development.users.to.implement.the.ASM.as.part.of.TestDrive...Support.engineers.may.also.use.the.information.from.this.document.to.troubleshoot.technical.issues.

The.ASM.is.used.to.simulate.analog.sensor.signals.to.an.Electrical.Control.Unit.(ECU)...When.used.with.the.TestDrive.system,.it.is.capable.of.providing.sensor.functionalities.required.in.all.simulator.applications.for.the.automotive.industry...Simulation.results.are.strengthened.by.the.ASM’s.ability.to.provide.ratiometric.outputs.for.user.defined.High.and.Low.voltage.references.on.each.channel.

Figure.1.shows.how,.through.the.ASM,.the.user.is.able.to.control.K.so.that.the.desired.VOUT.(between.VREF_HI.and.VREF_LOW).is.obtained..(Ranging.from..VREF_LOW..to.VREF_HI)..

Figure.1:..Analog.Sensor.Module.Function

SPECIFICATIONS

Outputs Characteristics (Per Channel)

16.Channels

Resolution 12.bits Accuracy 1%

Voltage output (impedance > 100KΩ)

VO(min). 0V Ratiometric:.Linear.output.range.between.high.&.low.references.Linearization:.possible.for.last.4.channels

VO(max) 16V

Voltage Protection VREF_L.(min)

VREF_H.(max)

-1V

27V

Max. Current 200mA.continuous

Frequency Protection

50KHz.(1.6μsec/V.slew.rate;.Rload.=.1KΩ)

Over.Current.Yes Thermal.Shutdown..Yes

Table 1: ASM Electrical Specifications

ASMK (0--> 1) VOUT = VREF_LOW + K (VREF_HI - VREF_LOW)

VREF_LOW

VREF_HI

TestDrive User Guide 12

Analog Sensor module.Features.List

FEATURES LIST

Feature Details

User defined HI/LOW reference for each channel

Individual.external.voltage.references.(0V.to.16V.range).are.used.for.each.channel...The.reference..voltages.(REF_Hx.&.REF_Lx).are.routed.through.the.56-pin.Elco.connector...

Common Reference Capability (Rev2 only)

Rev2.only.–.All.output.channels.could.can.be.configured.to.have.a.common.high.and.low.reference.that.is.connected.through.the.56-pin.Elco.connector.

Disabling faulty channels Any.faulty.channel.reported.to.the.system.is.automatically.disabled.until.the.user.acknowledges.the.error.and.the.situation.is.corrected..The.channel.is.then.reenabled.

Module.Status

Error Reporting:

Power.(Green).LED:.indicates.that.5V.and.3.3V.digital.power.supplies.are.within.validity.range.

Activity (Yellow) LED:

.- Steady.flash.if.the.TestDrive.model.accesses.the.card;.(communication.established.)

.- Blinks.2.times.if.the.FPGA.module.is.not.programmed;.(flash.update.operation.required.)

.- Blinks.3.times.if.the.FPGA.firmware.does.not.

correspond.to.the.module.Fault.(Red).LED:..indicates.that.a.fault.has.been.detected.in.the.system.or.module.

On.the.front.of.the.module

Individual.Channel.Status

Channel.Over.Current.LED.–.reports.an.over.current.state.on.a.specific.channel.

Channel.Thermal.Shutdown.LED.–.reports.if.an.amplifier.thermal.shutdown.has.occurred.on.a.specific.channel.

In.the.TestDrive.GUI

Positive Cable ID The.module.is.able.to.report.a.bad.or.lost.cable.connection.or.a.loss.of/.or.a.change.to.a.good.cable.connection.occurs...This.is.done.in.the.TestDrive.GUI.

Positive Module ID The.TestDrive.system.is.able.to.report.(on.the.TestDrive.GUI).the.identification.of.an.inserted.module...The.ASM.has.module.ProductMajorID.1..See.the.“Frequently.asked.questions”.section.

Firmware Update The.module.supports.a.robust.remote.software.update.mechanism.that.It.is.capable.of.recovering.from.a.failure.to.update.the.FPGA.Configuration.Data.due.to.uncontrollable.circumstances,.such.as.a.power.failure...The.module.is.also.able.to.reprogram.itself.while.the.model.is.paused.

Table 2: ASM Board Features


TECHNICAL DESCRIPTION.Overview

TECHNICAL DESCRIPTION

OVERVIEW

The.ASM.module.allows.the.user.to.synchronously.control.up.to16.channels.of.analog.voltage,.that.is.output.to.the.ECU.at.every.calculation.step...Each.output.signal.is.able.to.sink.or.source.a.maximum.of.200mA.where.the.output.voltage.is.proportional.to.the.difference.between.the.reference.voltage.signals.(Ref.HI.X.and.Ref.LO.X).as.shown.in.Figure.2...Ref.HI.X.and.Ref.LO.X.are,.respectively,.the.high.and.low.reference.voltages.for.each.output.channel.where.X.is.the.identification.number.of.the.channel,.number.ranging.from.0.to.15..

In.addition.to.this,.the.module.supports.the.Cable.ID.I/O.process..

Figure.2:..Analog.Sensor.Module.Function.Block.Diagram.

Intermodule Communications Bus

Power Buses (ACC, Radio, Crank, IGN0, IGN1, IGN3, User Def1, User Def2, Batt, Batt Gnd, SIM Pow, SIM

Vref High

Vref Low

16

16

16

Ref Hi X

Ref Lo X

16

CableID GND 5

CableID

Analog Sensors Module

Analog Out 62,50 mm.


TECHNICAL DESCRIPTION.Functional.Description

FUNCTIONAL DESCRIPTION

Figure.3.shows.the.block.diagram.for.the.Analog.Sensor.ModuleASM,.it.details.the.functionalities.of.the.analog.sensor.channels.and.the.FPGA.engine...The.ASM.has.16.channels.sharing.share.a.common.data.bus,.while.having.specific.control.lines.for.each.channel..

Figure.3:.ASM.and.FPGA.Engine.Functional.Block.Diagram

The.FPGA.engine.is.used.to.perform.the.following.tasks:

•. Communicate.with.the.RTU•. Enable.the.output.stage.for.each.channel’s.Analog.analog.Output.output.line•. Latch.synchronously.the.digital.value.to.the.Digital.to.Analog.Converter•. Disable.all.channels.in.fault.because.of.an.over.current.or.thermal.shutdown.conditions•. Control.the.Activity.&.Fault.LEDs•. Read.the.module.identification.and.report.the.module.status.

Diagnostic

Signal Wire

Analog Sensors Module

Chassis ID FPGA Engine

Slot ID RTSI

3 5 7

Communication Connector

Module ID 5

DACQ SPI 3

Module I/O Bus

Firmware Manager

& Memory

DIN IO

Temperature Sensors

Active/Fault LEDs

Cable ID 5 DACQ SPI & 11 IOs 14

64 32

12

Module ID (3)

System Reset

Power Good

System Reset Power

Good

FPGA Engine

SW Select 2

Power Rails

Power DIN

BATT IGN1

ACC IGN0

CRANK MPS2 MPS1

IGN3 GND

ECU 5V

DAQ

Module

Connector Module IO

191 All IOs

16 16 16

16x ID_CBL5:0 REF_H15:0 OUT_A15:0 REF_L15:0


TECHNICAL DESCRIPTION.ASM.Pin-outs

Figure.4:.Further.details.the.block.diagram.of.the.an.Analog.Sensor.Channel.

The.FPGA.engine.loads.each.channel’s.DACs.through.implementation.of.the.LDACx,.WRx.and.CSx.lines...The.FPGA.engine.also.enables.the.output.of.the.power.amplifier...The.DAC.outputs.a.signal.to.the.power.amplifier.that.is.ratiometric.between.REF_Hx.and.REF_Lx...When.the.DAC.code.field.is.set.to.0x000,.the.output.voltage.is.set.to.REF_Lx...Similarly,.when.the.value.of.the.DAC.code.field.is.set.to.0xFFF,.the.output.voltage.is.equivalent.to.REF_Hx.

The.power.amplifier.outputs.the.analog.sensor.simulated.signal.on.OUT_Ax...Should.over.current.or.thermal.shutdown.conditions.occur,.the.power.amplifier.notifies.the.FPGA.engine.(through.AOCx.and.TSDx.respectively).to.which.disables.the.respective.faulty.channel.

The.RTU.updates.the.value.of.every.DAC.register.at.each.calculation.step.

ASM PIN-OUTS

All.16.channels’.reference.voltages.(REF_H15:0.and.REF_L15:0).and.analog.output.signals.(OUT_A15:0).are.routed.from.through.the.ELCO-56.pin.connector...Below,.Table.3.provides.the.list.of.signals.available.on.the.external.ELCO-56.connector.sorted.by.pin.numbers...The.table.shows.also.on.which.pin.of.the.DIN.96.(DIN.96/.J7A).connector.the.signal.is.supplied.to.the.module.

As.can.be.seen.from.the.table.below,.positive.cable.identification.is.also.achieved.through.the.ELCO-56.pin.connector.(Signals.ID_CBL.and.ID_CBL4:0).

For.Rev..2.boards,.signals.COM_REF_L.and.COM_REF_H.are.used.to.connect.common.low.and.high.references.for.the.channels.(see.section.3.3.for.more.details)...For.Rev..1.boards,.signals.PROTO0.and.PROTO1.are.not.used.

.

Power amp.

AOCx ENAx

OUT_Ax = VREF_L + K (VREF_H-VREF_L)

V+

V+

REF_Hx

REF_Lx

REFHI

REFLO

D11:0

CLR LDAC CTRLs Data

Reset LDACx

Analog Sensor Function x

WRx & CSx

AOCx : Analog Over Current flag ENAx : Enable Amplifier Output LDACx : Load Digital to Analog Converter OUT_Ax : Analog Output Voltage

REF_Lx : Lower rail reference voltage REF_Hx : Higher rail reference voltage TSDx : Thermal Shutdown flag WRx & CSx : Microprocessor controls logic

K (0 1)

TSDx


TECHNICAL DESCRIPTION.ASM.Pin-outs

Elco Eq. # (female)

Elco Pin name (female)

Signal Name in Analog Module Schematic (2003/10/07)

Input Line

Output Line

1 A OUT_A0. x

FemaleELCO Connector

56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

2 B REF_L2. x3 C REF_L0. x4 D REF_H0.5 E REF_L4. x6 F REF_H1. x7 H OUT_A1. x8 J COM_REF_H. x x9 K COM_REF_L x x10 L OUT_A3. x11 M REF_L5. x12 N REF_H2. x13 P OUT_A2. x14 R REF_L7. x15 S REF_H4. x16 T OUT_A4. x17 U REF_L6. x18 V REF_H3. x19 W OUT_A6. x20 X REF_L8. x21 Y REF_H5. x22 Z OUT_A5. x23 a REF_H7. x24 b OUT_A7. x25 c REF_L9. x26 d REF_H6. x27 e OUT_A8. x28 f REF_L10 x29 h REF_L11 x30 j REF_H8. x31 k OUT_A10 x32 l REF_L12 x33 m REF_H9. x34 n OUT_A9. x35 p REF_H11 x36 r OUT_A11 x37 s REF_L13 x38 t REF_H10 x

39 u OUT_A13 x

40 v REF_L15 x

41 w REF_H12 x

42 x OUT_A12 x

43 y REF_L14 x

44 z REF_H14 x

45 AA OUT_A14 x

46 BB REF_L1. x

47 CC REF_H13 x

48 DD ID_CBL0 x

49 EE ID_CBL. x

50 FF REF_H15 x

51 HH OUT_A15 x

52 JJ REF_L3. x

53 KK ID_CBL4 x

54 LL ID_CBL3 x

55 MM ID_CBL2 x

56 NN ID_CBL1 x

Table 3: Signal list for for the ELCO-56 pin connector


TECHNICAL DESCRIPTION.TestDrive.ASM.GUI

TESTDRIVE ASM GUI

TestDrive.provides.a.LabView.based.GUI.that.facilitates.the.use.and.configuration.of.the.Analog.Sensor.Module’s.16.channels...All.functionalities.required.for.to.simulating.an.analog.signal.for.the.ECU.are.encompassed.in.the.TestDrive’s.Analog.Sensor.Module.GUI...Additionally,.error.detection.tools.are.provided.to.ease.troubleshooting.of.a.system/module.

The.following.section.details.the.highlighted.features/functions.of.the.graphic.ASM.GUI.

.

Figure.5:.TestDrive.Analog.Sensor.Module.GUI


TECHNICAL DESCRIPTION.ASM.GUI.Features.&.Functionalities

ASM GUI FEATURES & FUNCTIONALITIESA. Channel Inputs:..The.GUI.provides.users.with.two.means.for.the.user.to.supply.inputs.to.the.16.

channels...Each.channel.provides.has.a.slider.bar.and.an.incremental.numerical.control.to.input.analog.sensor.values...Additionally,.the.incremental.numerical.control.field.can.have.any.user-defined.value.directly.entered.

B. Channel Output:..The.output.being.generated.by.the.module.for.each.channel.can.be.seen.in.this.field.

C. Fault Indicators:..The.‘Rail.Over.Current.Status’.and.‘Over.Temperature’.LED.indicators.are.used.to.alert.the.user.that.there.is.an.Over.Current.or.Thermal.Shutdown.error.on.one.of.the.channels...The.user.can.then.refer.to.the.fault.monitoring.fields.of.each.channel.to.see.which.channel.is.experiencing.the.fault.

D. Fault Monitor:..Analog.Over.Current.(AOC).and.Thermal.Shutdown.(TSD).faults.for.each.channel.are.indicated.in.this.field...The.default.value.is.zero.(0),.no.faults...When.an.Over.Current.and/or.Thermal.Shutdown.occur,.a.one.(1).is.indicated.in.this.field.(NOTE:..this.applies.only.for.rev.2.modules...Revision.1.module.error.reporting.is.as.follows:...

.- Zero.(0). No.Error

.- One.(1). AOC.fault

.- Two.(2). TSD.fault

.- Three.(3). AOC.&.TSD.faultE. Fault Acknowledge:..These.toggle.switches.are.used.to.acknowledge.an.error.that.may.occur.and.

to.reactivate.a.particular.channel...Note.that.the.fault.can.only.be.acknowledged.once.the.error.condition.has.been.corrected..If.the.situation.hasn’t.been.corrected.the.fault.monitor.will.still.show.the.fault.and.the.channel.won’t.be.reactivated..

F. Software Faults:..These.fields.report.if.a.Software.software.based.error.has.occurred.on.the.module.

G. Chassis ID & Slot ID:..These.fields,.respectively,.report.the.TestDrive.Chassis.ID.(between.main.and.auxiliary).and.the.slot.where.the.ASM.has.been.inserted.into.the.chassis.

H. Cable ID:..The.Cable.ID.is.reported.in.the.cable.ID.field...This.feature.must.be.enabled.to.function..and.the.ID.for.the.proper.cable.is.set.from.the.ASM.Configuration.GUI.(see.3.3)...If.a.bad.cable.is.connected.or.if.a.correct.cable.connection.is.changed.or/removed,.an.error.is.indicated.with.the.Cable.Error.LED...This.error.can.be.acknowledged.by.the.Cable.Error.toggle.switch.

I. HW & SW Revisions:..The.current.firmware.revision.and.hardware.revisions.are.indicated.in.the.XXX0.Firm.Rev.and.XXX0.HW.Rev.fields.(respectively).


TECHNICAL DESCRIPTION.ASM.Configuration.GUI

ASM CONFIGURATION GUI

The.ASM.board’s.GUI.provides.a.separate.panel.that.allows.the.user.to.modify.certain.configurations.for.board.operation...From.selecting.the.‘Config’.tab.of.the.TestDrive.interface,.the.user.can.access.the.configuration.panels.for.all.modules.inserted.into.the.system...Figure.6.details.the.ASM.configuration.panel.

From.the.configuration.GUI.the.user.can.decide.if.each.channel.should.use.specific.High.&.Low.references.or.if.they.should.use.common.references...Connection.of.the.common.references.can.be.seen.from.“Table.3:.Signal.list.for.for.the.ELCO-56.pin.connector”.(this.feature.is.exclusive.to.Rev2.modules).

Channels.12,.13,.14.and.15.can.also.be.configured.to.have.a.linear,.instead.of.ratiometric,.output.with.respect.to.their.references.

The.user.can.also.enable.cable.identification.and.set.the.desired.cable.value.that.the.system.should.monitor.for.(see.“Frequently.asked.questions”.for.more.details)..

Figure.6:..ASM.Configuration.GUI


TECHNICAL DESCRIPTION.THE.ASM.SIMULINK.MODEL

THE ASM SIMULINK MODELTD.mdl

‘TD.mdl’.is.a.standard.Simulink.model.provided.with.all.TestDrive.systems..The.model.is.used.to.simulate.automotive.functions.to.the.ECU...The.Analog.Sensor.Module.is.a.component.of.the.overall.model...The.default.version.of.‘TD.mdl’.supports.up.to.three.ASMs.in.the.TestDrive.chassis.(Note:.the.model.may.need.to.be.modified.to.support.more.ASMs).

OpCtrl Analog Sensor Module

Block.

.

Mask.

Description

The.“OpCtrl.AnalogSensorModule”.block.accesses.the.Analog.Sensor.Module.ASM.of.the.same.Controller.Name.

The.block.enables.the.user.to.select.the.type.of.High.and.Low.Reference.for.each.channel...Each.number.in.the.High.and.Low.Reference.Selection.field.vector.represents.channels.0.to.15.from.left.to.right...The.user.can.modify.the.channel’s.specific.number.to.‘1’.if.common.references.are.desired...The.common.reference.values.are.connected.externally.through.pins.COM_REF_H.and.COM_REF_L.(see.Table.3)...Note.that.this.only.applies.for.Rev.2.boards.

Parameters

Controller Name:..The.controller.name.specified.in.an.OpCtrl.block’s.Controller.Name.parameter.enables.the.binding.between.a.specific.controller.and.it’s.generic.functionalities.

High and Low Reference Selection:..From.left.to.right,.each.value.of.the.vector.represents.channels.0.to.15...The.user.can.select.channel.specific.(0).or.common.(1).references.for.each.channel.by.modifying.the.vector.values.

Inputs: No.Inputs.

Outputs: No.Outputs.

Characteristics and Limitations•. Direct.Feedthrough•. Discrete.sample.time•. XHP.support•. Work.offline



OpFcn Digital Out Gated

Block.

.

Mask.

Description

This.block.refers.to.one.channel.of.the.ASM..In.such,.there.should.be.16.entities.to.work.with.the.16.channels.

Parameters

Controller Name:..Each.functionality.block.such.as.the.OpFcn.Digital.Out.Gated.block.must.refer.to.an.OpCtrl.block.that.will.manage.the.data.transfer.with.the.IO.board...The.binding.between.OpFcn.and.OpCtrl.blocks.is.performed.via.the.use.of.the.Controller.name.that.each.OpCtrl.block.uniquely.defines...This.binding.is.checked.during.the.initialization.phase.of.the.model...If.no.OpCtrl.block.is.found.that.defines.the.same.Controller.Name.as.this.OpFcn.Digital.Out.Gated.block,.the.OpFcn.Digital.Out.Gated.block.is.simply.disabled.and.returns.0s.

Selection of Functionalities:..This.field.is.used.to.determine.which.Analog.analog.output.the.OpFcn.Digital.Out.Gated.block.is.tied.to...For.example,.to.use.this.block.to.control.OUT_A2,.a.2.should.be.placed.in.this.field...Note.that.if.using.‘td.mdl’,.the.values.of.these.fields.default.to.the.same.corresponding.switch.(ex:.OpFcn.Digital.Out.Gated.0.ties.to.OUT_A0;.OpFcn.Digital.Out.Gated.1.ties.to.OUT_A1)..

Inputs

Vals:..This.input.is.the.value..

Ack:..This.input.is.to.acknowledge.faults..This.means.that.if.a.fault.has.previously.been.flagged.the.channel.receives.this.signal.to.confirm.that.it.should.stay.deactivated..

Outputs

Curr..Vals:.This.output.gives.the.value.the.hardware.could.approximate.from.the.<i>Vals</i>.input..Since.the.hardware.as.a.12.bits.precision.it.is.possible.that.the.input.field.can.differ.slightly.

Faults:.This.field.outputs.if.there.was.a.fault.detected.on.the.channel..A.fault.can.be.due.to.over.current.overheating,.etc.

Characteristics and Limitations

•. Direct.Feedthrough•. Discrete.sample.time•. XHP.support•. Work.offline



OpFcn Status Register

Block.

.. . . . . . Mask.

Description

This.generic.Status.Register.functionality.block,.OpFcnStatusRegister,.is.designed.to.return.status.information.from.a.TestDrive.module.board..All.TestDrive.boards.define.a.similar.status.register.that.enables.the.user.to.get.information.regarding:.board.location.(chassis,.slot.and.cable.identification),.synchronization.status.and.error.status.(over-current,.over-voltage,.over-temperature,.software.faults,.communication.faults)..Although.not.all.these.parameters.can.be.of.interest.for.a.given.module.board,.the.register.mapping.allows.the.use.of.the.same.OpFcnStatusRegister.for.all.boards.

Parameters

Controller.Name:.The.controller.name.uniquely.specified.in.an.OpCtrl.block’s.parameter.enables.the.binding.between.a.specific.controller.block.and.the.present.functionality.block..Binding.between.OpFcn.and.OpCtrl.blocks.that.define.the.same.Controller.Name.is.performed.during.the.initialization.phase.of.the.model..If.no.OpCtrl.block.is.found.that.defines.the.same.Controller.Name.as.the.OpFcnStatusRegister.block,.the.OpFcnStatusRegister.is.simply.disabled.

Inputs

This.block.has.no.inputs.

OutputsChassis Id:.. This.output.returns.the.number.of.the.chassis.where.the.board.is.

installed..Typically.this.number.is.0.Slot Id:.. This.output.returns.the.number.of.the.slot.where.the.board.is.installed..

Typically.this.number.is.1.to.11.when.the.board.is.in.a.chassis,.and.0.when.the.board.is.standalone.

Rail Over-Current Status:.. This.output.returns.1.when.an.over-current.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Rail Over-Voltage Status:.. This.output.returns.1.when.an.over-voltage.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Thermostat Output Status:.This.output.returns.1.when.an.over-temperature.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Software Fault Rail:.. This.flag.is.more.relevant.for.modules.that.support.different.power.rail.values..The.flag.is.raised.when.2.power.rails.are.selected.for.the.same.output.line.



Software Fault State:.. This.flag.is.more.relevant.for.modules.that.support.different.states.values..The.flag.is.raised.when.2.states.(high.and.low).are.selected.for.the.same.output.line.

Software Fault From Host:..Function.not.available.in.this.version.CRC Fault Status:.. Function.not.available.in.this.version.Cable Identification:.. This.output.returns.the.state.of.the.cable.identification.lines.ID-CBL1-5.of.

the.module.board..The.default.value.is.31.Device revision:.. This.output.returns.the.revision.number.of.the.associated.device.Carrier Info:.. This.output.returns.information.about.the.IO.card.revision..This.output.

has.a.size.of.2.and.will.ultimately.return.the.hardware.revision.and.serial.number.of.the.board..Presently.the.first.value.is.1.if.the.driver.detects.that.the.card.holds.an.EEPROM.for.storing.revision.and.serial.number.information..The.second.value.is.presently.fixed.to.65535.


Connector.Pin.Assignments:.

Since.the.OpFcnStatusRegister.block.may.attach.itself.to.different.boards.that.support.the.Status.Register.functionality,.the.user.should.refer.to.the.documentation.of.his.specific.module.board.for.connector.pin.assignments.

•. Direct.Feedthrough. No•. Discrete.sample.time. Yes•. XHP.support. Yes•. Work.offline. No•. ..


TECHNICAL DESCRIPTION.Frequently.asked.questions

FREQUENTLY ASKED QUESTIONSQ: What is the maximum number of ASMs that may be connected to the TestDrive System?

A:.. The.maximum.number.of.ASMs.that.can.be.used.is.dependant.on.the.number.of.TestDrive.chassis.used...Up.to.10.ASM.modules.can.be.inserted.into.each.chassis...Note.that.the.TestDrive.model.(‘TD.mdl’).must.be.modified.to.support.this.additional.feature...The.default.model.allows.up.to.three.ASMs.in.one.TestDrive.chassis.

Q: What is the module ID for the ASM and where can it be read?

A:.. The.module.ID.for.the.ASM.is.3...This.is.not.directly.visible.on.the.default.GUI.of.the.ASM...A.development.level.user.can.make.modifications.to.the.model.and.GUI.to.output.the.module.ID.

Q: How does cable identification work?

A:.. Each.module.supports.positive.cable.identification...Cable.identification.is.enabled.and.set.by.the.ASM.Configuration.GUI.(“Cable.Identifcation”)...The.user.will.define.a.value.between.0.and.31...This.value.will.be.set.in.binary.with.the.signals.ID_CBL0.to.ID_CBL4.(Table.3Table.3)...The.figure.below.depicts.functionality.of.cable.identification.

Figure.7:..Cable.IdentifcationThe.user.will.ground.the.necessary.signals.(Cable_ID0.to.Cable_ID4).via.Elco.pin.EE.to.achieve.the.binary.equivalent.of.the.decimal.value.set.in.the.ASM.Configuration.panel.

A:.. How.do.I.use.common.references.for.some/all.of.my.ASM.outputs?

A:.. This.is.a.feature.specific.to.Rev.2.ASM.modules...The.High.and.Low.common.reference.can.be.connected.to.pins.J.and.K.of.the.Elco.connector,.respectively.(Table.3)...From.the.ASM.Configuration.panel.(Figure.6),.the.user.can.select.which.channels.can.use.the.common.references.

Q: Can I vary my output linearly instead of ratiometrically between the High and Low references?

A:.. ASM.channels.12.to.15.allow.for.linearization.of.outputs...These.options.must.be.enabled.from.the.ASM.Configuration.Panel.(Figure.6)...Note.that.this.feature.is.only.available.on.Rev..2.ASMs.


TECHNICAL DESCRIPTION.Frequently.asked.questions

Q: Is it possible to control the linear relation (gain and offset) of outputs 12 to 15?

A:.. Using.RT-Lab,.from.td.mdl,.the.user.can.modify.the.gain.and.offset.of.channels.12.to.15.to.any.desired.set.of.values...Note.that.the.linearization.option.for.these.channels.must.be.enabled.for.the.changes.to.take.effect.

Q: What is the relation between the rail voltages and the ASM? Is it necessary to power the rail to have the ASM working?

A:.. There.is.no.implied.relation.between.the.rail.and.the.ASM...It.is.not.necessary.to.power.the.rail.to.operate.the.ASM...It.is.possible.to.use.the.rail.voltages.(ex:.Batt.and.GND).as.the.high.and.low.references.for.a.specific.channel.


..


Base Module .Architecture.Overview.

BASE MODULE

INTRODUCTION

This.document.contains.sections.pertaining.to.the.installation,.architecture.and.features.of.the.Base.module...

All.simulators.have.a.Base.module,.which.contains.a.digital.controller.that.drives.the.simulator.chassis..It.also.contains.the.power.moding.circuitry.that.drives.the.power.bus..

The.board.has.the.following.capabilities:.

•. Monitoring.of.the.operating.power.supply.(simulator.power).provided.to.all.modules.•. Control.of.the.power.moding.circuitry.which.resides.on.the.power.backplane.and.drives.the.power.

bus.•. A.serial.interface,.provided.to.analyze.the.connection.of.serial.tools.to.the.ECU..

The.board.provides.the.following.benefits:.

•. Cable.and.harness.identification.•. Module.identification.and.listing.•. On.site.firmware.updates.•. Trigger.output.based.on.engine.position.for.easy.logic.analyzer.and.oscilloscope.capture.of.high.

speed.transient.

ARCHITECTURE OVERVIEW

Figure.8:.Base.Module.block.diagram.with.the.FPGA.engine



The.“Base.Module.Firmware.Block.Diagram”.shows.the.block.diagram.of.the.Base.module’s.embedded.firmware..The.firmware.is.mainly.composed.of.the.following.elements:.

•. Communication.Bus.Interface.•. Battery.Control.Module.•. Key.Switch.Module.•. Rail.Control.Module.•. CAN.Termination.•. Serial.Line.(State.&.Transition.Counters).•. Synchronization.Unit•. Position.Synchronization.Module.

Figure.9:.Base.Module.Firmware.Block.Diagram



Pin Assignments

Elco Eq. # (female)

Elco Pin name

(female)


Input Line

Output Line

1 A PROTO1 x x2 B CAN1_LOW x .


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

Note:..Artwork.was.done.using.Elco.male.and.female.connector.used.during.assembly

3 C CAN1_HI x .4 D 3V3 A .5 E CAN2_LOW x .6 F PROTO5 x .7 H PROTO2 x x8 J CAN2_HI x x9 K PROTO4 x x10 L PWR_SW1 x x11 M LSCAN_HI x .12 N PROTO6 x .x13 P PROTO3 x x14 R SJ1850_LOW x .15 S RAIL_PWRGD x .x16 T RST_SW_A2 x17 U PJ1850_HI .18 V PWR_SW2 x x.19 W R_IN/OUT0 x x20 X KLINE_HI x .21 Y /RST x x22 Z RST_SW_A1 x x23 a R_IN/OUT5 x x.24 b R_IN/OUT1 x x25 c CAN+12 x .26 d R_IN/OUT4 x .27 e R_IN/OUT2 x x28 f CAN+12V x .29 h LSCAN_LOW x .30 j R_IN/OUT6 x x.31 k DIN_RAIL_EN_INP x32 l KLINE_LOW x .33 m R_IN/OUT7 x .34 n R_IN/OUT3 x x35 p ID_HRNS3 x36 r ID_HRNS2 x37 s ID_HRNS1 x .38 t ID_HRNS0 x .39 u ID_HRNS8 x40 v ID_HRNS7 x .41 w ID_HRNS6 x .42 x ID_HRNS5 x43 y ID_HRNS4 x .44 z ID_HRNS12 x .45 AA ID_HRNS11 x46 BB ID_HRNS10 x .47 CC ID_HRNS9 x .48 DD ID_CBL0 x .49 EE ID_CBL..(GND) x50 FF ID_HRNS15 x .51 HH ID_HRNS14 x52 JJ ID_HRNS13 x .53 KK ID_CBL4 x .54 LL ID_CBL3 x .55 MM ID_CBL2 x .56 NN ID_CBL1 x .

Table 4: Base Module DIN I/O Signal Description


Base Module .Module.LEDs.

MODULE LEDS

Each.module’s.state.is.displayed.using.3.LEDs:.

LED Indicator Description

Green. Power Indicates.that.the.digital.power.supply.for.5.V.or.3.3V.are.within.the.validity.range..This.LED.is.not.software.controlled

Yellow. Activity. Driven.by.the.FPGA..This.LED.indicates.that.the.FPGA.has.been.configured.and.the.communication.has.been.reset.by.the.real-time.unit.(RTU)..This.LED.shows.that.the.FPGA.engine.of.the.module.is.able.to.communicate.with.the.RTU

The.yellow.LED.indicates.error.codes.when.the.RED.led.is.ON:

•. No.blink:.general.error•. 2.blinks:.the.FPGA.module.is.not.programmed,.you.need.to.perform.flash.update.

operation.•. 3.blinks:.the.FPGA.firmware.does.not.correspond.to.current.module..(e.g..The.FPGA.is.

programmed.for.a.Base.Module.but.is.inserted.on.Switch.Module.).Red Fault. Driven.by.the.FPGA..This.LED.indicates.that.a.fault.has.been.detected.in.the.system..These.

faults.are,.but.are.not.limited.to:.over.tension,.over.current.and.software.fault..Other.software.faults.are.raised.under.the.following.conditions:.

•. Invalid.configuration,.e.g..Enabling.several.power.rails.for.an.output.signal.•. Invalid.output.driver.selection.•. Invalid.model.conditions.

The.FPGA.prevents.invalid.configuration,.however,.it.lets.the.fault.LEDs.inform.the.operator.of.an.abnormal.condition..In.addition,.the.error.is.reported.to.the.model..


Base Module .ECU.Serial.Interface.

SYSTEM IDENTIFICATION Cable Identification (ID_CBL5-0)

These.five.input.signals.are.used.by.the.real-time.unit.to.identify.which.harness.connector.is.attached.to.the.module..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩ.resistor..When.the.harness.connector.is.plugged.into.the.simulator.it.grounds.the.selected.signals.to.provide.the.simulator.with.the.cable.ID.(see.“Cable.Identification”)..For.example,.if.the.first.and.fourth.signals.(ID.0.and.ID3).are.shorted.to.the.ground,.the.simulator.returns.22.(10110).for.the.cable.ID..

Figure.10:.Cable.Identification.Harness Identification (ID_HRNS15-0)

16.harness.ID.signals.are.provided..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩ.minimum,.resistor..Harness.ID.is.determined.by.the.grounded.signals.as.explained.in.the.previous.sub-section.Cable.Identification.and.is.illustrated.in.Figure.10..

ECU SERIAL INTERFACE

This.feature.provides.you.with.a.front.panel.interface.between.the.ECU.and.a.diagnostic.scan.tool..Signals.are.routed.from.the.harness.to.the.front.panel..These.signals.are.hooked.to.female.banana.jack.(Figure.13).and.D-Shell.9.Pin.Connectors..as.shown.in.the.following.tables..You.are.able.to.monitor.the.activity.on.the.signals.shown.in.Table.5..The.inputs.are.operating.voltage.tolerant.and.have.an.input.impedance.greater.than.100.kΩ..The.state.of.the.input.is.monitored.over.a.one.second.window.sampled.at.1.kHz..All.voltages.listed.are.derived.from.the.harness.connector...

Figure.11:.CAN.Monitor./.Termination.



For.the.K-Line,.CAN.1-.HI,.CAN.2-HI.and.LS.CAN.input.lines,.the.sense.unit.indicates.a.high.when.the.input.voltage.is.above.3.0.V.and.a.low.when.the.input.is.below.2.8.V..For.the.J1850,.the.sense.unit.indicates.a.high.when.the.input.voltage.is.above.4.1.V.and.a.low.when.the.input.is.below.3.8.V..The.sense.unit.provides.the.simulator.with.three.values:.the.digital.current.state,.the.analog.current.state.and.the.transition.count.

Figure.12:.Front.Panel.of.the.Base.Module.

Item Signal

1 Primary.J1850

2 K-line

3 CAN1-High

4 CAN2-High

5 LS-CAN

Table 5: Monitored Serial Signals Jack Number Signal

1 Primary.J1850

2 Secondary.J1850.(Ground)

3 +12.V

4 K-line

5 +12.V

6 Ground

7 CAN1-Low

8 CAN1-High

9 CAN2-Low

10 CAN2-High

11 LS-CAN

12 Ground

Table 6: Serial Signals to Banana Jacks

FAULTACTIVITYPOWER

RESET

TRIG OUT

1 2

3 4

5 6

7 8

9 10

1211

1

2

3

BASE

#1



Serial Interface D-Shell 9 Pin Connectors

The.signals.shown.in.Table.7.are.routed.from.the.harness.connector.to.D-Shell.9.Pin.Connectors.mounted.on.the.front.panel.of.the.Base.module..

DB9 Connector # Signal DB9 Pin ELCO 56

1 CAN1-Low 2 B

CAN1-High 7 C

2 CAN2-Low 2 E

CAN2-High 7 J

3 LS-CAN 2 M

Ground 7 h

Table 7: Serial Signal List 9 Pin D CAN Termination

You.can.activate.a.termination.resistor.(120.O).between.each.pair.of.CAN.signals.(CAN.X.HI.and.CAN.X.LO.).LS.CAN.termination.resistor.is.between.LS.CAN.and.ground.and.it.has.a.value.of.2.2.kΩ..

Serial Line Module (ADC Controller)

The.serial.line.module.monitors.serial.lines..It.also.controls.analog.to.digital.converters.to.store.the.state.of.the.analog.line.in.a.status.register..


Base Module .Power.Moding.

POWER MODING

Power.moding.takes.the.battery.input.and.creates.moded.power.that.is.output.through.the.power.bus.and.routed.to.the.output.banana-jacks.at.the.back.of.the.chassis.(see.Figure.13)..The.Battery.Input.is.protected.with.a.25.A.fuse.and.each.of.the.moded.power.output.operates.up.to.25.A..The.power.backplane.is.designed.with.low.resistance.between.the.battery.input.and.any.of.the.moded.power.outputs.featuring.less.than.25.mΩ..

Figure.13:.Input.&.Output.Power.Banana.Jacks.

The.state.of.the.power.moded.outputs.is.controlled.as.shown.in.Table.8..For.each.mode,.each.output.set.to.HI.is.shorted.to.the.battery.input.or.opened.when.set.to.LO..

There.are.eight.power.modes..The.power.moding.states.are.completely.programmable..In.addition.to.the.shown.moding,.the.state.of.a.particular.rail.is.controlled.by.the.rail.enable.input..

The.moded.outputs.are.gated.by.the.rail.enable.input..Any.changes.made.to.the.rail.enable.input.is.immediately.reflected.in.the.state.of.the.power.moding.outputs..See.the.“Rail.Enable.(Din_Rail_En_Inp)”.section.for.more.details..

Mode Moded Power Outputs

ACC RADIO CRANK IGN3 IGN1 IGN0 UD1 UD2

ACC HI HI LO LO LO LO LO LO

OFF/LOCKED

LO LO LO LO LO LO LO LO

UNLOCK LO LO LO LO LO HI LO LO

RUN HI HI LO HI HI HI LO LO

CRANK LO LO HI LO LO LO LO LO

OFF LO LO LO LO LO LO LO LO

SPARE.1 LO LO LO LO LO LO LO LO

SPARE2 LO LO LO LO LO LO LO LO

Table 8: Power Moding

NOTE: when the battery line is disabled, all moded outputs are opened.

OUTIN

BATT ACC RADIO CRANK IGN 3

IGN 1 IGN 0 MP S1 MP S2 GND GND

BATT ECU 5V

+

+ +


Base Module .Key.Switch.State.

Battery Control

You.can.control.the.state.of.the.battery.line..When.the.battery.line.is.disabled,.the.connection.between.the.battery.input.and.the.battery.is.opened.(see.Figure.8)..

Simulator Power

All.module.power.is.supplied.by.the.internal.power.supply..The.input.power.to.the.simulator.is.a.standard.120./.220.VAC.60/50.Hz.input..

The.simulator.power.is.monitored..When.it.deviates.from.the.acceptable.operating.range,.an.error.is.generated.and.the.chassis.protects.itself.and.the.ECU..This.action.could.include,.but.is.not.limited.to:.dropping.into.an.unconfigured.state.or.shutting.down.until.error.circumstances.have.been.corrected..The.ground.for.all.of.the.modules.and.the.power.ground.used.by.the.ECU.are.tied.at.a.single.point.in.the.Base.module...

Figure.14:.Power.Moding.Diagram

BATTERY CONTROL

Battery.control.acts.on.the.state.of.the.battery.line..A.control.register.allows.software.to.set.the.state.of.the.output.line..Also,.a.status.register.monitors.the.current.state.of.the.battery.line..

RAIL CONTROL

Rail.control.acts.on.the.rail.enable.signal..It.allows.you.to.disable.all.the.lines.or.to.disable.each.line.individually..Two.control.registers.are.used.to.set.the.active.state.of.the.rail.enable.signal.and.to.determine.the.state.of.each.line..

KEY SWITCH STATE

Key.Switch.State.controls.the.state.of.the.power.moding.circuitry..A.control.register.allows.software.to.set.the.state.of.the.output.lines..Also,.a.status.register.monitors.the.current.state.of.the.power.moding.circuitry..Each.line.can.be.disabled.individually.according.to.the.rail_mask.input..

.

ACCRADIO

CRANK

IGN3

IGN1

IGN0

BATT

Keyswitch

Mode

Controller

INPUTPOWER

MP SPARE1

MP SPARE2

120/240 VAC 50 /60 HzInternal Power Supply

Simulator Power

POWERGND

POWERGND

SIM POWERGND

POWERSWITCH

Rail Enable

ECU 5VECU 5V

AC INPUT

Battery Controller

- Keyswitch- Rail Enable Designator- Rail Enable Polarity


Base Module .Firmware.Update.

Rail Enable (Din_Rail_En_Inp)

This.high.impedance.input.(>100.kΩ).is.used.to.control.the.state.of.the.power.rail.selected.by.the.rail.enable.designator..The.active.state.of.this.input.is.determined.by.the.Rail.Enable.Polarity.variable..The.state.of.this.signal.is.based.on.a.3.5.threshold.voltage.with.hysteresis..When.the.input.is.above.the.threshold.voltage,.it.is.considered.high..When.the.input.voltage.is.below.the.threshold.voltage,.it.is.considered.low..The.appropriate.bias.voltage.is.applied.to.the.input,.by.the.simulator,.to.prevent.accidental.assertion.of.the.power.rail..

TRIGGER OUT

This.feature.outputs.a.synchronization.signal.on.the.Base.module.BNC.that.is.available.on.the.front.panel.in.order.to.synchronize.a.capture.device.such.as.an.oscilloscope.or.a.logic.analyzer..

It.can.generate.a.trigger.lasting.200.ns.based.on.either.the.model.synchronization,.the.high.resolution.signal.or.a.trigger.when.the.engine.position.reaches.a.specified.value..

SYNCHRONIZATION A.synchronization.pulse.that.corresponds.to.the.start.of.a.calculation.step.is.generated.to.enable.synchronization.between.the.different.modules.of.the.chassis..Because.many.operations.are.time.related,.this.pulse.is.used.to.latch.data.(preserve.the.contents.of.the.previous.calculation.step).and.to.reset.registers.and/or.counters.for.the.next.time.interval..

FIRMWARE UPDATE

TestDrive.modules.support.a.robust.remote.firmware.update.mechanism..This.mechanism.is.capable.of.recovering.from.a.failure.to.update.FPGA.configuration.data.due.to.uncontrolled.circumstances.such.as.a.power.failure..In.order.to.recover.from.such.an.incident,.the.FPGA.engine.includes.an.FPGA.Safe.Configuration.Data.Flash.memory.device..This.memory.device.holds.a.bootstrap.application.code.that.is.common.to.all.Opal-RT.modules..These.modules.are.minimal.components.of.any.Opal-RT.IO.controller.application.allowing.a.module.to.be.reprogrammed.while.the.model.application.is.in.pause..


Pulse Driven Load Module .Architecture.Overview.

PULSE DRIVEN LOAD MODULE

INTRODUCTION

The.Pulse.Driven.Load.module.is.designed.to.measure.the.frequency,.duty.cycle.and.analog.state.of.pulses.from.an.external.source.or.the.ECU..This.module.supports.3.types.of.inputs;.standard,.bipolar.and.flexible..

The.board.exhibits.the.following.capabilities:.

•. 32.standard.pulse.driven.load.inputs.•. 2.flexible.pulse.driven.load.inputs.•. 5.flexible.pulse.driven.load.inputs.The.board.provides.the.following.benefits:.•. Cable.identification.•. Module.identification.and.listing.•. On.site.firmware.update.

ARCHITECTURE OVERVIEW “Pulse.Driven.Load.Module.Electronic.Board.Diagram”.shows.the.block.diagram.of.the.Pulse.Driven.Load.module.with.the.FPGA.engine..

Figure.15:.Pulse.Driven.Load.Module.Electronic.Board.Diagram

The.firmware.is.mainly.composed.of.the.following.elements:.

•. Standard.PDL.Unit.•. Bipolar.PDL.Unit.•. Power.Rail.Select.Unit.•. Communication.Bus.Interface.•. Synchronization.Unit.


Pulse Driven Load Module .Architecture.Overview.

Pin Assignments

Elco Eq. # (female)

Elco Pin name

(female)


Input Line

Output Line

1 A OUT_A0. . x


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

Note:..Artwork.was.done.using.Elco.male.and.female.

connector.used.during.assembly

2 B REF_L2. x .3 C REF_L0. x .4 D REF_H0. . .5 E REF_L4. x .6 F REF_H1. x .7 H OUT_A1. . x8 J PROTO0. x x9 K PROTO1. x x10 L OUT_A3. . x11 M REF_L5. x .12 N REF_H2. x .13 P OUT_A2. . x14 R REF_L7. x .15 S REF_H4. x .16 T OUT_A4. . x17 U REF_L6. x .18 V REF_H3. x .19 W OUT_A6. . x20 X REF_L8. x .21 Y REF_H5. x .22 Z OUT_A5. . x23 a REF_H7. x .

24 b OUT_A7. . x25 c REF_L9. x .26 d REF_H6. x .27 e OUT_A8. . x28 f REF_L10 x .29 h REF_L11 x .30 j REF_H8. x .31 k OUT_A10 . x32 l REF_L12 x .33 m REF_H9. x .34 n OUT_A9. . x35 p REF_H11 x .36 r OUT_A11 . x37 s REF_L13 x .38 t REF_H10 x .39 u OUT_A13 . x40 v REF_L15 x .41 w REF_H12 x .42 x OUT_A12 . x43 y REF_L14 x .44 z REF_H14 x .45 AA OUT_A14 . x46 BB REF_L1. x .47 CC REF_H13 x .48 DD ID_CBL0 x .49 EE ID_CBL. . x50 FF REF_H15 x .51 HH OUT_A15 . x52 JJ REF_L3. x .53 KK ID_CBL4 x .54 LL ID_CBL3 x .55 MM ID_CBL2 x .56 NN ID_CBL1 x .

Table 9: Pulse Driven Load Module DIN I/O Signal Description


Pulse Driven Load Module .Module.LEDs.

MODULE LEDS




Yellow. Activity. Driven.by.the.FPGA..Indicates.that.the.FPGA.has.been.configured.and.the.communication.has.been.reset.by.the.real-time.unit.(RTU)..This.LED.shows.that.the.FPGA.engine.of.the.module.is.able.to.communicate.with.the.RTU


•. No.blink:.general.error•. 2.blinks:.the.FPGA.module.is.not.programmed,.you.must.perform.flash.update.operation.•. 3.blinks:.the.FPGA.firmware.does.not.correspond.to.current.module..(e.g..The.FPGA.is.

programmed.for.a.Pulse.Driven.Load.Module.but.is.inserted.on.Switch.Module.).Red Fault. Driven.by.the.FPGA,.the.LED.indicates.that.a.fault.has.been.detected.in.the.system..These.

faults.are,.but.not.limited.to:.over.tension,.over.current.and.software.fault..Other.software.faults.are.raised.under.the.following.conditions:.




Pulse Driven Load Module .PDL.inputs.


These.five.input.signals.are.used.by.the.real-time.unit.to.identify.which.harness.connector.is.attached.to.the.module..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩ.resistor..When.the.harness.connector.is.plugged.into.the.simulator.it.grounds.the.selected.signals.to.provide.the.simulator.with.the.cable.ID.(see.Figure.3)..For.example,.if.the.first.and.fourth.signals.(ID.0.and.ID3).are.shorted.to.the.ground,.the.simulator.returns.22.(10110).for.the.cable.ID..

..

Figure.16:.Cable.Identification.

PDL INPUTS

The.PDL.module.has.three.types.of.inputs.for.monitoring.signals:.Standard,.Bipolar.and.Flexible..The.inputs’.analog.and.digital.states.are.continuously.monitored.to.extract.all.transitions..Period.and.duty.cycle.is.computed.using.the.transition.timestamps..

A.12.bits.analog.to.digital.converter.is.used.to.measure.analog.state..Each.input’s.operating.voltage.is.0.to.16.V.and.the.sense.unit.impedance.is.superior.to.100K...All.inputs.are.tolerant.from.–1.V.to.27.V..


Pulse Driven Load Module .Standard.PDL.Inputs.

STANDARD PDL INPUTS (STD_An,.STD_Bn,.STD_Cn,.STD_Dn).

The.32.standard.input.lines.are.tied.to.either.IGN1.or.GND.via.a.bias.resistor..Standard.PDL.inputs.are.typically.used.to.monitor.digital.signals.with.one.of.the.following.state.combinations:.

GND-IGN1(STD.TYPE.A,C,D).;.OPEN-IGN1(STD.TYPE.B);.GND-OPEN.(STD.TYPE.A,C,D).

The.“Standard.PDL.Input.Electrical.Diagram”.shows.the.electrical.schematics.of.a.standard.PDL.input..It.illustrates.that.the.input.is.internally.connected.to.a.specified.rail.voltage.via.bias.resistor..Sense.units.indicate.high.when.the.input.voltage.is.above.3.5.V.±.10%.and.low.when.the.input.is.below.1.5.V.±.10%..

.

Figure.17:.Standard.PDL.Input.Electrical.Diagram

The.32.standard.PDL.inputs.are.divided.into.four.types.defined.below..

1. Standard PDL Input - Type A (STD_A[16:0]) These.17.Standard.PDL.inputs.have.a.330.Ω.tied.to.the.IGN1.power.rail.

2. Standard PDL Input - Type B (STD_B[3:0]) These.4.Standard.PDL.inputs.have.a.330.Ω.tied.to.GND..

3. Standard PDL Input - Type C (STD_C[3:0]) These.4.Standard.PDL.inputs.have.a.3,3.kΩ.tied.to.the.IGN1.power.rail..

4. Standard PDL Input - Type D (STD_D[6:0]) These.7.Standard.PDL.inputs.have.a.10,0.kΩ.tied.to.the.IGN1.power.rail..


Pulse Driven Load Module .Flexible.PDL.Inputs.(F_[4:0].&.F_EXTV[4:0]).

BIPOLAR PDL INPUTS (BIP_[1:0] & B_EXTV[1:0])

The.2.bipolar.inputs.have.configurable.rail.and.a.fixed.bias.set.to.50%.to.rail.voltage..Bipolar.PDL.inputs.are.typically.used.to.monitor.bipolar.signals.with.a.positive.voltage.offset..

Figure.18.shows.that.the.input.is.internally.connected.to.50%.of.the.rail.voltage.via.bias.resistors..Sense.units.indicate.high.when.the.input.voltage.is.above.80%.of.rail.voltage.and.low.when.the.input.is.below.20%.of.rail.voltage..

.

Figure.18:.Bipolar.PDL.Input.Electrical.Diagram

FLEXIBLE PDL INPUTS (F_[4:0] & F_EXTV[4:0])

The.5.flexible.inputs.have.configurable.rail..Inputs.are.tied.to.rail.via.a.bias.resistor..Flexible.PDL.inputs.are.typically.used.to.monitor.digital.signals.that.are.referenced.to.BATT,.ECU5V,.IGN1.or.external.voltage..

Figure.19.illustrates.that.the.input.is.internally.connected.to.the.rail.voltage.via.bias.resistors..Sense.units.indicate.high.when.the.input.voltage.is.above.3.5.V.±.10%.and.low.when.the.input.is.below.1.5.V.±.10%..

Figure.19:...Flexible.PDL.Input.Electrical.Diagram


Pulse Driven Load Module .Firmware.Update.

SYNCHRONIZATION

A.synchronization.pulse.that.corresponds.to.the.start.of.a.calculation.step.is.generated.to.enable.synchronization.between.the.different.modules.of.the.chassis..Because.many.operations.are.time.related,.this.pulse.is.used.to.latch.data.(preserve.the.contents.of.the.previous.calculation.step).and.to.reset.registers.and/or.counters.for.the.next.time.interval..

FIRMWARE UPDATE

TestDrive.modules.support.a.robust.remote.firmware.update.mechanism..This.mechanism.is.capable.to.recover.from.a.failure.to.update.FPGA.configuration.data.due.to.uncontrolled.circumstances.such.as.a.power.failure..In.order.to.recover.from.such.an.incident,.the.FPGA.engine.includes.an.FPGA.Safe.Configuration.Data.Flash.memory.device..This.memory.device.holds.a.bootstrap.application.code.that.is.common.to.all.Opal-RT.modules..These.modules.are.minimal.components.of.any.Opal-RT.IO.controller.application.allowing.a.module.to.be.reprogrammed.while.the.model.application.is.in.pause..


Pulsed Output Module .Architecture.Overview.

PULSED OUTPUT MODULE

INTRODUCTION

The.Pulse.Output.module.(POM).is.designed.to.generate.bipolar.signal.with.variable.frequency.and.duty.cycle..The.Pulsed.Output.module.has.three.types.of.outputs:.Open.drain,.Analog.and.Digital..


•. 24.output.channels.•. Cable.and.harness.identification.•. Module.identification.and.listing.•. On.site.firmware.update.

ARCHITECTURE OVERVIEW Figure.20.shows.the.lock.diagram.of.the.Pulsed.Output.module.with.the.FPGA.engine..

Figure.20:.Pulsed.Output.Module.Electronic.Board.Diagram



Figure.21.shows.the.block.diagram.of.the.Pulsed.Output.module’s.embedded.firmware..The.firmware.is.mainly.composed.of.the.following.elements:.

•. Pulsed.Output.Unit.•. Communication.Bus.Interface.•. Synchronization.Unit.

Figure.21:.Pulsed.Output.Module.Firmware.Diagram



Pin Assignments

Elco Eq. # (female)

Elco Pin name

(female)


Input Line

Output Line

1 A IO_DIN_BIASV1 x .


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

Note:..Artwork.was.done.using.Elco.male.and.female.

connector.used.during.assembly

2 B IO_DIN_EXTV1 x .3 C IO_DIN_PO2 . x4 D IO_DIN_PO1 . x5 E IO_DIN_PO5 . x6 F IO_DIN_BIASV2 x .7 H IO_DIN_EXTV2 x .8 J IO_DIN_PO4 . x9 K IO_DIN_PO3 . x10 L IO_DIN_PO7 . x11 M IO_DIN_BIASV3 x .12 N IO_DIN_EXTV3 x .13 P IO_DIN_PO6 . x14 R IO_DIN_PO10 . x15 S IO_DIN_PO9 . x16 T IO_DIN_BIASV4 x .17 U IO_DIN_EXTV4 x .18 V IO_DIN_PO8 . x19 W IO_DIN_PO12 . x20 X IO_DIN_PO11 . x21 Y IO_DIN_BIASV5 x .22 Z IO_DIN_EXTV5 x .23 a IO_DIN_PO14 . x

24 b IO_DIN_PO13 . x25 c IO_DIN_BIASV6 x .26 d IO_DIN_EXTV6 x .27 e IO_DIN_BIASV7 x .28 f IO_DIN_EXTV7 x .29 h IO_DIN_PO16 . x30 j IO_DIN_PO15 . x31 k IO_DIN_PO18 . x32 l IO_DIN_PO17 . x33 m IO_DIN_BIASV8 x .34 n IO_DIN_EXTV8 x .35 p IO_DIN_PO20 . x36 r IO_DIN_PO19 . x37 s IO_DIN_BIASV9 x .38 t IO_DIN_EXTV9 x .39 u IO_DIN_EXTV11 x .40 v IO_DIN_PO22 . x41 w IO_DIN_PO21 . x42 x IO_DIN_BIASV10 x .43 y IO_DIN_EXTV10 x .44 z IO_DIN_EXTV12 x .45 AA IO_DIN_PO24 . x46 BB IO_DIN_PO23 . x47 CC IO_DIN_BIASV11 x .48 DD ID_CBL0 x .49 EE ID_CBL . x50 FF IO_PROTO2 x x51 HH IO_PROTO1 x x52 JJ IO_DIN_BIASV12 x .53 KK ID_CBL4 x .54 LL ID_CBL3 x .55 MM ID_CBL2 x .56 NN ID_CBL1 x .

Table 10: Pulsed Output Module DIN IO Signal Description


Pulsed Output Module .Module.LEDs.

MODULE LEDS Each.module’s.state.is.displayed.using.3.LEDs:.











Pulsed Output Module .Pulsed.Output.


These.five.input.signals.are.used.by.the.real-time.unit.to.identify.which.harness.connector.is.attached.to.the.module..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩresistor..When.the.harness.connector.is.plugged.into.the.simulator.it.grounds.the.selected.signals.to.provide.the.simulator.with.the.cable.ID.(see.Figure.20)..For.example,.if.the.first.and.fourth.signals.(ID.0.and.ID3).are.shorted.to.the.ground,.the.simulator.returns.22.(10110).for.the.cable.ID..

.


PULSED OUTPUT

The.Pulsed.Output.Module.features.24.channels.that.can.be.individually.configured.for.digital.or.analog.mode..In.digital.mode,.you.can.select.a.reference.voltage.then.modify.frequency.and.duty.cycle..In.Analog.mode,.you.can.specify.amplitude.and.offset..The.signal.will.be.either.a.bipolar.signal.(switching.for.low.to.high.value).or.a.sine.wave...The.following.table.lists.the.options.for.each.mode..

Output Type Duty Cycle Freq. Adj. Offset Adj. Ampl. Reference Voltage

[0-100%] [0-10.KHz] [±.12V] [±.12V] IGN1 ECU.5V External

Digital X X X X X

Analog X X X X

Analog.Sine X X X X

Table 11: Digital and Analog mode summary Over.current.and.over.voltage.conditions.are.monitored.for.each.channel..Faulty.channels.will.be.disabled.until.you.acknowledge.the.error.from.the.user.interface..


Pulsed Output Module .Pulsed.Output.

Figure.23.shows.the.block.diagram.of.a.pulse.output.channel..An.output.switch.allows.you.to.either.the.analog.or.the.digital.mode..

Figure.23:..Pulsed.Output.Channel.DiagramFrequency and Duty cycle precision

The.following.tables.show.the.Marginal.Frequency.resolution.and.the.frequency.accuracy.due.to.the.frequency.divider..However,.the.user.should.keep.in.mind.that.current.hardware.configuration.features.a.Module.Clock.frequency.of.either.100.MHz.with.100.ppm.(0,01%).or.62,5.MHz.with.30.ppm.(0,003%)..The.crystal.accuracy.factor.is.not.included.in.the.tables.below..Tables.were.calculated.with.a.clock.of.62.5.MHz.and.highlighted.numbers.in.bold.indicate.characteristics.over.specification...However,.accuracy.is.met.in.all.cases,.at.all.times..

Frequency (Hz)

Min Resolution (Hz)

Marginal Frequency

Marginal Resolution (Hz)

Actual Freq. Accuracy

Duty Cycle Minimum Resolution

10.000 0.1526 9,996.8 3,199 0.03% 0.03%

5,000 0.1526 4,999.2 0.800 0.02% 0.02%

2,200 0.1526 2,199.8 0.155 0.01% 0.01%

1,000 0.1526 1,000.0 0.032 0.00% 0.00%

500 0.0100 499,992 0.008 0.00% 0.00%

100 0.0100 100,000 0.000 0.00% 0.00%

Table 12: Channel Characteristics in digital mode

Filter 1% & Offset

10K

IGN1 ECU 5V

Power Rail & Mode Select

Stage Control

Enable Analog 1

IGN1ECU, Ext

ADC SDI (A-F)

ADC Controls (A-F)

LDAC (A-F)

OC -V

PO xx Control

PO xx OverCurrent

Ext Off & Gain

DAC1 / 4

0

OV +15

Current Sense Gnd

OC -VOV +15

OC +V

3

4 1

1

Current Sense -V

5 V

OC +V

Over Voltage (> 15V)

GND -V

Ext Ref Voltage y

Ext BIAS y

Enable Analog Mode

Open DrainOutput PO

XX

+ V

Current Sense +V

- 15V

+ 15V

Adjustable Analog Output

Note: Each Ext. Bais & Ref voltage is shared by 2 consecutive PO channels

SelectExt.

1K1K

Pulsed Output Channel


Pulsed Output Module .Firmware.Update.

Frequency (Hz)

Min Resolution (Hz)

Marginal Frequency

Marginal Resolution (Hz)

Actual Freq. Accuracy

Nb Coefficient

10.000 0.1526 9,949.1 50,939 0.51% 32

5,000 0.1526 4,987.2 12,767 0.26% 32

2,200 0.1526 2,197.5 2,475 0.11% 32

1,000 0.1526 999.5 0.512 0.05% 32

500 0.0100 499,872 0.128 0.03% 32

100 0.0100 99,995 0,.005 0.01% 32

Table 13: Channel Characteristics in analog mode Digital mode (PO1-24, EXTV1-12)

While.using.the.digital.mode,.select.a.rail.voltage.that.is.either.IGN1,.ECU5V.or.an.external.voltage..The.EXTV1-12.input.lines.are.used.when.external.voltage.is.selected..Since.only.12.lines.are.available,.each.line.is.used.for.2.consecutive.channels,.e.g..EXTV1.is.used.for.PO1.and.PO2,.EXTV2.is.used.for.PO3.and.PO3..

Analog mode (PO1-24, BIASV1-12)

The.analog.mode.is.not.available.in.current.POM.boards..

In.analog.mode,.the.output.is.generated.by.a.Digital.to.Analog.Converter.where.the.output.is.centered.around.the.offset.voltage.±1%..You.can.select.from.an.external.offset.voltage.(BIASVX).or.the.one.provided.internally..The.output.has.a.maximum.peak.to.peak.voltage.of.24.V.with.a.resolution.of.0.0234.V.±1%.and.an.accuracy.of.1%.over.the.range..The.output.is.able.to.drive.60.mA..

SYNCHRONIZATION


FIRMWARE UPDATE

TestDrive.modules.support.a.robust.remote.firmware.update.mechanism..This.mechanism.is.capable.of.recovering.from.a.failure.to.update.FPGA.configuration.data.due.to.uncontrolled.circumstances.such.as.a.power.failure..In.order.to.recover.from.such.an.incident,.the.FPGA.engine.includes.an.FPGA.Safe.Configuration.Data.Flash.memory.device..This.memory.device.holds.a.bootstrap.application.code.that.is.common.to.all.Opal-RT.modules..These.modules.are.minimal.components.of.any.Opal-RT.IO.controller.application.allowing.a.module.to.be.reprogrammed.while.the.model.application.is.paused..


Reference Pulse Generator Module .Architecture.Overview.

REFERENCE PULSE GENERATOR MODULE

INTRODUCTION

The.Reference.Pulse.Generation.Module.(RPG).serves.as.the.interface.for.all.engine.synchronous.input.and.output.signals..The.RPG.generates.multiple.signal.patterns.at.a.selected.RPM.value.and.measures.spark.and.injector.signal.timings..


•. 13.reference.pulse.generation.channels.with.a.0.1.degree.resolution.•. 24.Engine.Spark.Timing.(EST).or.Injector.inputs.•. Knock.generation.using.an.arbitrary.waveform.generator.or.an.external.signal.•. Cable.and.harness.identification.•. Module.identification.and.listing.•. On.field.firmware.update.


Figure.24.shows.the.block.diagram.for.the.Reference.Pulse.Generation.Module.with.the.FPGA.engine..

Figure.24:..Reference.Pulse.Generation.Module.Electronic.Board.Diagram

Diagnostic

Signal Wire

Reference Pulse Generation Module

Chassis ID

FPGAEngine

S lot ID

RTSI

3

5

7

CommunicationConnector

Module ID5

DACQSPI3

ModuleI/O Bus

FirmwareManager

&Memory

DIN IO

TemperatureSensors

Active/FaultLEDs

Cable ID5DACQ SPI & 11 IOs14

x

x

x

Module ID(1)

SystemReset

PowerGood

SystemResetPower

Good

FPGA Engine

SW Select2

PowerRails

PowerDIN

BATTIGN 1

ACC

IGN0

CRANK

MPS2MPS1

IGN3

GNDECU 5V

DA

QM

odul

eC

onne

ctor

IGN1ECU 5V

Module IO191 All IOs

Knock Module

Engine Spark Timing(EST)

Reference PulsesGeneration Module

RP, CAM, TDC, HiRes,

EST In [23:0]

Knock 2

24

15

ECU5VIGN1,Ext Ref

8

Noise In BNCs

Knock In

Face Plate

Reset



Figure.25:.Reference.Pulse.Generation.Module.Firmware.Diagram

The.firware.diagram.(above).shows.the.Reference.Pulse.Generation.module’s.embedded.firmware.diagram..The.firmware.is.mainly.composed.of.the.following.elements:.

•. Communication.Bus.Interface.•. Engine.Synchronous.Pattern.Generation.Module.featuring.Position.Encoder.and.Pattern.

Generation.Modules.•. Event.Capture.module.for.EST./.Injector.evaluation.•. Knock.Control.Module.•. Power.Rail.Selection.Module.•. Synchronization.Unit.

Common

Com

mun

icat

ion

Bus

Signal Wire

Remote Core

InboundFifo

OutboundFifo

Synchronization Unit

Board FPGA

PositionSynchronisati

on Module

TX ClockDomain

RX ClockDomain

Board ID(descriptor 5)

Control Signals

Command Signals

Status Signals

FirmwareUpdate

Module Status

Wis

hbon

e In

terf

ace

SynchronizedUpload

CommunicationBus Interface

Wis

hbon

e In

terf

ace

CrossConnect

Stat

usC

omm

and

Con

trol

Com

mon

100 MHz Clock Domain

EST Injectors

ESTInjector

Power RailEnable

230

.................

ReferencePattern

40

Power RailSelect

4

Power RailSelect

0

................

Knock

0,01%xx

Power RailSelect



Pin Assignments

Elco Eq. # (female)

Elco Pin Name

(female)

Signal Name in RPG Module Schematic

Input Line

Output Line

1 A TDC. x


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

2 B HIRES. x3 C INJ_BIAS_VOLT x4 D KNOCK_OUT. x5 E CAM3. x6 F CAM2 x7 H CAM1. x8 J EXT_BIAS_VOLT. x x9 K KNOCK_HI_RES x10 L RPBV3. x11 M RPBV2. x12 N RPBV1 x13 P CAM4. x1 R RPBV8. x15 S RPBV7 x16 T RPBV6. x17 U RPBV5. x18 V RPBV4 x19 W RP4. x20 X RP3. x21 Y RP2 x22 Z RP1. x23 a RP8 x24 b RP7. x25 c RP6. x26 d RP5 x27 e EST2. x28 f EST1. x29 h EST4. x30 j EST3 x31 k EST8 x32 l EST7 x33 m EST6 x34 n EST5 x35 p EST12 x36 r EST11 x37 s EST10 x38 t EST9 x39 u INJ5 x40 v INJ4 x41 w INJ3 x42 x INJ2 x43 y INJ1 x44 z INJ9 x45 AA INJ8 x46 BB INJ7 x47 CC INJ6 x48 DD ID_CBL0 x49 EE ID_CBL x50 FF INJ12 x51 HH INJ11 x52 JJ INJ10 x53 KK ID_CBL4 x54 LL ID_CBL3 x55 MM ID_CBL2 x56 NN ID_CBL1 x

Table 14: Reference Pulse Generation Module DIN I/O Signal Description



MODULE LEDS












Reference Pulse Generator Module .System.Identification.


These.five.input.signals.are.used.by.the.real-time.unit.to.identify.which.harness.connector.is.attached.to.the.module..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩ.resistor..When.the.harness.connector.is.plugged.into.the.simulator.it.grounds.the.selected.signals.to.provide.the.simulator.with.the.cable.ID.(see.Figure.3)..For.example,.if.the.first.and.fourth.signals.(ID.0.and.ID3).are.shorted.to.the.ground,.the.simulator.returns.22.(10110).for.the.cable.ID..



Reference Pulse Generator Module .Operation.

ENGINE SYNCHRONOUS PATTERN GENERATION

(DIN_RP1-8, DIN_CAM1-4, DIN_TDC)

Engine.synchronous.pattern.generation.module.allows.generation.of.digital.pattern.according.to.specified.engine.speed..Signal.definition.is.done.according.to.rising.and.falling.edge.positions.in.degrees..

The.RPG.module.has.a.total.of.13.configurable.output.channels.and.2.fixed.reference.outputs.(Ref.pulse,.RESET)..The.following.table.describes.possible.voltage.levels.for.each.output..

Signal 0-5V 0-IGN1 ±12V Open Drain

Ref.Pulse X

TDC X

Reset X

Cam.Phaser.1-4 X X X X

User.Defined.RP.1-3 X X X X

User.Defined.RP.4-8 X X

Table 15: RPG Output Voltage

OPERATION

At.the.model.level,.you.first.need.to.supply.pattern.definitions..This.is.done.using.a.MAT.file.with.a.cell.array.that.contains.a.dataset.of.pattern.definitions.for.each.channel..

When.running.the.simulation,.select.the.RPM.value.and.the.current.dataset.to.be.used..The.RPG.outputs.are.continuously.updated.according.to.the.RPM.selection..For.CAM.Phaser.1-4.channels,.you.can.specify.a.phase.offset.in.degrees.for.the.pattern.definition..

RPG.outputs.are.protected.for.over.current.using.an.internal.mechanism.that.will.automatically.disable.faulty.channels..You.can.re-enable.a.channel.by.acknowledging.the.error.from.the.user.interface..

Figure.27:..Output.stage.of.the.Engine.Synchronous.Pattern.Generation.module.

RP Switch Control

Upper Power Rail Select

Lower Rail Select

ECU5VBit0

10K

IGN1 ECU 5V

1K1K

106

Open DrainIGN1, ±12V(bit 1-5)

State (0,1)

Enable

Open DrainOpen Source

OverCurrentDetect

±12V(bit 6-7) 02

0

1

5V IGN1 +12

-12

ReferencePatternSignalxx

Rail

GNDGND

+-12V

RPBiasVoltage xx

5V IGN1 +- 12 V Open Drain

RPG Output Stage Configuration


Reference Pulse Generator Module .Firmware.Update.

EVENT CAPTURE MODULE (DIN_EST0-23)

The.event.capture.module.allows.you.to.monitor.digital.signal.to.extract.pulse.rising.and.falling.edge.in.degrees..In.a.typical.ECU.configuration,.all.sparks.and.fuel.lines.will.be.connected.to.the.Event.Capture.module..

Operation

The.Event.Capture.module.requires.an.engine.synchronous.digital.signal.(.0.–.5V.or.0.-12V).to.be.connected.to.the.input..The.software.extracts.all.rising.and.falling.transition.times.and.converts.them.to.degrees..For.each.720.degrees.period,.the.user.interface.displays.the.pulse.start.and.end.position.in.degrees.and.displays.an.error.code.if.no.or.half.a.pulse.is.detected..The.latching.point.of.pulse.positions.is.configured.in.the.model..By.default,.each.channel.is.latched.with.a.60.degrees.increment,.e.g..INJ0.is.latched.at.60.degrees,.INJ1.is.latched.at.60.degrees,.INJ2.is.latched.at.120.degrees.).

Knock

The.knock.feature.is.not.available.on.the.current.RPG.boards..It.will.eventually.allow.you.to.simulate.knock.for.each.cylinder.using.external.signals.and.arbitrary.waveforms..

SYNCHRONIZATION


FIRMWARE UPDATE

TestDrive.modules.support.a.robust.remote.firmware.update.mechanism..This.mechanism.is.capable.to.recover.from.a.failure.to.update.FPGA.configuration.data.due.to.uncontrolled.circumstances.such.as.a.power.failure..In.order.to.recover.from.such.an.incident,.the.FPGA.engine.includes.an.FPGA.Safe.Configuration.Data.Flash.memory.device..This.memory.device.holds.a.bootstrap.application.code.that.is.common.to.all.Opal-RT.modules..These.modules.are.minimal.components.of.any.Opal-RT.IO.controller.application.allowing.a.module.to.be.reprogrammed.while.the.model.application.is.paused..


Resistive Sensors Module .Architecture.Overview.

RESISTIVE SENSORS MODULE

INTRODUCTION

The.Resistive.Sensor.module.is.used.to.simulate.variable.resistance.sensor.outputs..This.module.contains.12.variable.resistance.channels.with.20.bits.resolution.over.a.0.5.O.to.200.kΩ.range..Each.channel.is.rated.for.a.250.mw.dissipation.into.the.selected.resistance..


•. 12.variable.resistance.channels.with.0.5.Ωto.200.kΩ.range..•. Cable.and.harness.identification.•. Module.identification.and.listing.•. On.field.firmware.update.


Figure.28.shows.the.block.diagram.of.the.Resistive.Sensors.module.with.the.FPGA.engine..

Figure.28:.Resistive.Sensor.Module.Electronic.Board.Diagram



Figure.29.shows.the.block.diagram.of.the.Resistive.Sensors.module’s.embedded.firmware..The.firmware.is.mainly.composed.of.the.following.elements:.

•. Resistance.Selection.Unit.•. Communication.Bus.Interface.•. Synchronization.Unit.

Figure.29:.Resistive.Sensor.Module.Firmware.Diagram.

.



Pin Assignments

Elco Eq. # (female)


Signal Name in Resistive Module Schematic

Input Line

Output Line

1. A. INP1. x.


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

2. B. USR0. x.3. C. B1. x. x.4. D. INP0. x.5. E. USR2. x.6. F. B3. x. x.7. H. INP2. x.8. J. USR1. x.9. K. B2. x. x.10. L. INP4. x.11. M. USR3. x.12. N. B4. x. x.13. P. INP3. x.14. R. USR5. x.15. S. B6. x. x.16. T. INP5. x.17. U. USR4. x.18. V. B5. x. x.19. W. INP7. x.20. X. USR6. x.21. Y. B7. x. x.22. Z. INP6. x.23. a. B9. x. x.24. b. INP8. x.25. c. USR7. x.26. d. B8. x. x.27. e. INP9. x.28. f. USR8. x.29. h. USR9. x.30. j. B10. x. x.31. k. INP11. x.32. l. USR10. x.33. m. B11. x. x.34. n. INP10. x.35. p.36. r.37. s. USR11. x.38. t. B12. x. x.39. u.40. v.41. w.42. x.43. y.44. z.45. AA.46. BB.47. CC.48. DD. ID_CBL0. x.49. EE. ID_CBL. x.50. FF.51. HH.52. JJ.53. KK. ID_CBL4. x.54. LL. ID_CBL3. x.55. MM. ID_CBL2. x.56. NN. ID_CBL1. x.

Table 16: Resistive Sensor Module DIN I/O Signal Description


Resistive Sensors Module .Module.LEDs.

MODULE LEDS












Resistive Sensors Module .System.Identification.


These.five.input.signals.are.used.by.the.real-time.unit.to.identify.which.harness.connector.is.attached.to.the.module..Each.of.these.signals.is.pulled.up.to.5V.through.a.100.kΩ.resistor..When.the.harness.connector.is.plugged.into.the.simulator.it.grounds.the.selected.signals.to.provide.the.simulator.with.the.cable.ID.(see.Figure.3)..For.example,.if.the.first.and.fourth.signals.(ID.0.and.ID3).are.shorted.to.the.ground,.the.simulator.returns.22.(10110).for.the.cable.ID...

Figure.30:.Cable.Identification.Resistance.Selection.Channels.(INPx,USRx).

The.Resistive.Sensor.module.has.12.channels.with.0.5Ω.to.200kΩ.resistance.range.and.up.to.250mW.dissipation..For.each.channel,.the.current.into.the.resistance.must.be.in.the.same.direction..If.current.direction.changes.or.if.an.over.current.condition.(power.>.250.mW).is.detected,.an.error.will.be.generated.and.the.channel.will.be.disabled.until.the.error.is.acknowledged.from.the.user.interface..

Figure.31.shows.the.block.diagram.of.a.resistive.sensor’s.channel..You.must.select.a.termination.voltage.that.is.either.GND,.user.defined.(using.USRx.input.line).or.Open.(Channel.disabled)..The.resistance.is.available.between.the.INPx.and.ground.or.INPx.and.USRx.depending.on.the.termination.voltage.selection..

Figure.31:.Resistive.Sensor.Channel.Diagram


Resistive Sensors Module .Firmware.Update.

SYNCHRONIZATION


FIRMWARE UPDATE

TestDrive.modules.support.a.robust.remote.firmware.update.mechanism..This.mechanism.is.capable.to.recover.from.a.failure.to.update.FPGA.configuration.data.due.to.uncontrolled.circumstances.such.as.a.power.failure..In.order.to.recover.from.such.an.incident,.the.FPGA.engine.includes.an.FPGA.Safe.Configuration.Data.Flash.memory.device..This.memory.device.holds.a.bootstrap.application.code.that.is.common.to.all.Opal-RT.modules..These.modules.are.minimal.components.of.any.Opal-RT.IO.controller.application.allowing.a.module.to.be.reprogrammed.while.the.model.application.is.paused..


Switch Module.Features.List

SWITCH MODULE

INTRODUCTION

The.purpose.of.this.section.is.to.describe.the.Switch.Module.–.an.I/O.switching.module.part.of.the.TestDrive.System...It.includes.an.overview.of.the.module’s.functions,.its.specifications.and.features,.technical.details,.and.a.description.of.the.context.of.use...Run-time.and.development.users.may.use.this.document.to.implement.the.SM.as.part.of.TestDrive..Support.engineers.may.also.use.the.information.from.this.document.to.troubleshoot.technical.issues.

The.Switch.Module.(SM).is.used.to.simulate.various.switch.configurations.found.in.a.vehicle...When.used.with.TestDrive,.it.is.capable.of.connecting/disconnecting.a.signal.to/from.a.specified.voltage.as.required.in.simulator.applications.for.the.automotive.industry.

SPECIFICATIONS

Channels Characteristics (Per Switch)

36 Switches

(30.Discrete,.5.Flexible,.1.Rotary)

Voltage.Tolerance -1V./.27V.(Min/Max)

Max.Current 2A.continuous,.3A.pulsed.for.100msec.(per.channel).(Total.of.12A.maximum.for.the.module)

Switch.ON.resistance 50mΩ

Rise/Fall.Time Turn.ON.–.Turn.OFF;.100nsec

Short.Circuit.Protection Yes;.max.200μsec.response.time

Table 17: Switch Module Electrical Specifications

FEATURES LIST

Switch Type Details

Selectable Power Rails Switch Configurations*

3.Types.of.Switches 30.Discrete Open,.Global† Unconfigured,.Active.Low,.Active.High,.Open.Drain,.Open.Source5.Flexible Open,.Global†,.Batt,.ECU5V,.Ext.

Voltage1.Rotary

Table 18: Switch Module Board Features†.Global.rail.option.is.only.available.on.boards.with.REV2.5.and.higher;.it.can.be.selected.as.ACC,.ECU.5V,.Crank,.IGN3,.IGN1,.IGN0,.Spare1,.Spare2,.Batt..(previous.modules,.Global.rail.is.replaced.by.IGN1).*.Details.of.Switch.Configurations.are.provided.in.“Switch.Configurations”.


Switch Module.Technical.Description

TECHNICAL DESCRIPTION

the.Switch.module.allows.the.user.to.control.up.to.36.switches.output.to/from.the.ECU...Each.of.the.three.types.of.switches.is.able.to.sink.or.source.a.maximum.of.2A.

Figure.32.shows.the.SM.block.diagram.detailing.the.functionalities.of.the.different.switches.and.the.FPGA.engine...The.SM.has.36.switches.that.share.a.common.data.bus.but.it.has.also.specific.control.lines.for.each.switch.

In.addition,.the.module.supports.the.Cable.ID.I/O.process..

Figure.32:.SM.and.FPGA.Functional.Block.Diagram.

The.FPGA.engine.is.used.to.perform.the.following.tasks:

•. To.communicate.with.the.RTU;•. To.control.the.Switch.Units;•. To.disable.all.switches.in.fault.because.of.over.current.or.thermal.shutdown.conditions;•. To.control.the.Activity.&.Fault.LEDs;•. To.read.the.module.identification.and.report.the.module.status.



Discrete Switch

The.SM.provides.30.discrete.switches.that.can.be.used.to.simulate.automotive.switching.applications...A.single.rail.can.be.assigned.for.all.discrete.switches...For.modules.previous.to.Rev.2.5,.the.rail.is.defaulted.to.IGN1...For.Rev.2.5.modules,.the.user.can.utilize.the.Global.Rail.for.all.discrete.switches.(see.“Global.Rail.Selection”.for.information.on.Global.Rails)...Figure.33.details.the.block.diagram.of.a.Discrete.Switch.

Figure.33:.Discrete.Switch.Block.Diagram

Discrete.switches.can.be.individually.configured.to.suit.the.corresponding.application.(see.“Switch.Configurations”.for.more.information.on.switch.configurations).

Flexible Switch

The.SM.provides.5.flexible.switches...The.distinct.quality.of.these.switches.is.that.a.variety.of.rails.may.be.selected.for.each.of.the.5.flexible.switches...The.user.is.able.to.assign.Global,.Batt,.ECU5V,.or.an.External.Voltage.as.a.rail...The.option.is.also.available.to.disable.a.switch.by.selecting.the.Open.rail...Note.that.the.Global.rail.is.replaced.with.IGN1.for.modules.prior.to.Rev..2.5...Figure.32.details.the.block.diagram.of.a.Flexible.Switch...Flexible.switches.can.be.configured.to.suit.its.application.(see.“Switch.Configurations”for.information.on.switch.configurations).

Figure.34:..Flexible.Switch.Block.Diagram



Rotary Switch

The.SM.provides.1.rotary.switch...The.key.feature.of.this.switch.is.that.it.enables.the.user.to.cycle.through.8.different.digital.switches.that.connect.to.8.different.systems.through.a.single.input...The.user.is.able.to.assign.Global,.Batt,.ECU5V,.or.an.External.Voltage.as.a.rail...The.option.is.also.available.to.disable.a.digital.switch.(Open)...Note.that.the.Global.rail.is.replaced.with.IGN1.for.modules.prior.to.Rev.2.5....Figure.35.details.the.block.diagram.of.a.rotary.switch..Each.digital.switch.can.be.configured.to.suit.its.application.(see.“Switch.Configurations”.for.information.on.switch.configurations).

Figure.35:.Rotary.Switch.Block.DiagramSwitch Configurations

The.SM.enables.a.number.of.different.configurations.for.the.three.types.of.switches...Switches.can.be.configured.to.best.suit.various.ECU.applications...The.various.configurations.are.detailed.below:

A. Unconfigured:..Switch.is.disabled.B. Active High:..When.off,.the.switch.will.sink.signal.to.ground;.when.on,.switch.will.source.to.Rail.C. Active Low:..When.off,.the.switch.will.source.signal.to.Rail;.when.on,.switch.will.sink.to.ground.D. Open Drain:..When.off,.switch.will.be.open.state;.when.on,.switch.will.sink.signal.to.ground.E. Open Source:..When.off,.switch.will.be.open.state;.when.on,.switch.will.source.signal.to.Rail.



Global Rail Selection

The.SM.allows.the.user.to.designate.a.number.of.possible.options.as.a.power.rail.for.the.switches...ACC,.ECU.5V,.Crank,.IGN3,.IGN1,.IGN0,.Spare1,.Spare2,.Batt.can.be.selected.as.a.Global.Rail.from.the.SM.Configuration.GUI...The.Global.Rail.selected.can.be.used.for.Discrete,.Flexible,.and.Rotary.switches...Note.that.for.Discrete.Switches,.only.the.Global.Rail.can.be.selected...Also.the.Global.Rail.selection.is.only.applicable.to.Revision.2.5.of.the.SM...Older.revisions.use.IGN1.by.default.as.the.rail.for.Discrete.switches.and.can’t.be.changed.

SM Pin-outs

All.36.switch.signals.and.rail.levels.are.routed.through.the.ELCO-56.pin.connector...Below,.Table.19.presents.the.list.of.signals.available.on.the.external.ELCO-56.connector.sorted.by.pin.numbers...The.table.shows.also.on.which.pin.of.the.DIN.96.(DIN.96/.J7A).connector.the.signal.is.supplied.to.the.module.

As.illustrated.in.the.table.below,.positive.cable.identification.is.also.achieved.through.the.ELCO-56.pin.connector.(Signals.ID_CBL.and.ID_CBL4:0)...Signal.PROTO0.is.not.used.

Elco Eq. # (female)


Signal Name in Switch Module Schematic (2003/09/17)

Input Line

Output Line

DIN 96/J7A

49. EE. ID_CBL. x. C17. FemaleELCO Connector

56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

48. DD. ID_CBL0. x. A18.56. NN. ID_CBL1. x. C18.55. MM. ID_CBL2. x. A19.54. LL. ID_CBL3. x. C19.53. KK. ID_CBL4. x. C20.26. d. DS0. x. B8.10. L. DS1. x. A5.5. E. DS2. x. C3.28. f. DS3. x. C9.25. c. DS4. x. C8.14. R. DS5. x. C6.37. s. DS6. x. C12.30. j. DS7. x. B10.8. J. DS8. x. C2.36. r. DS9. x. A13.12. N. DS10. x. B4.22. Z. DS11. x. A7.15. S. DS12. x. B6.24. b. DS13. x. A9.43. y. DS14. x. C13.44. z. DS15. x. B16.41. w. DS16. x. B14.29. h. DS17. x. C10.42. x. DS18. x. A14.34. n. DS19. x. A11.31. k. DS20. x. A12.46. BB. DS21. x. C15.38. t. DS22. x. B12.35. p. DS23. x. B13.45. AA. DS24. x. A16.40. v. DS25. x. C14.39. u. DS26. x. A15.51. HH. DS27. x. A17.



Elco Eq. # (female)



Input Line

Output Line

DIN 96/J7A

47. CC. DS28. x. B15.50. FF. DS29. x. B17.19. W. RSO0. x. A8.21. Y. RSO1. x. B7.2. B. RSO2. x. C1.17. U. RSO3. x. C5.18. V. RSO4. x. B5.33. m. RSO5. x. B11.20. X. RSO6. x. C7.27. e. RSO7. x. A10.11. M. RS_EXTV0. x. C4.3. C. FSO0. x. B1.9. K. FSO1. x. B2.7. H. FSO2. x. A3.16. T. FSO3. x. A6.32. l. FSO4. x. C11.4. D. FS_EXTV0. x. A1.1. A. FS_EXTV1. x. A2.6. F. FS_EXTV2. x. B3.13. P. FS_EXTV3. x. A4.23. a. FS_EXTV4. x. B9.52. JJ. PROTO0. x. x. C16.

Table 19: Signal list for ELCO-56 pin connector


Switch Module.Graphical.User.Interface

GRAPHICAL USER INTERFACETestDrive Interface

TestDrive.provides.a.LabView.based.GUI.that.facilitates.the.use.and.configuration.of.the.SM...All.functionalities.required.for.simulating.switch.functionality.for.the.ECU.are.encompassed.in.the.TestDrive.SM.GUI...Additionally,.error.detection.tools.are.provided.to.ease.troubleshooting.of.a.system/module.

Figure.36:.TestDrive.Switch.Module.InterfaceASM Interface Features & FunctionalitiesA. Discrete Switches:..DS0-DS29.can.be.turned.ON/OFF.by.clicking.on.the.corresponding.switch.B. Flexible Switches:..FS0-FS4.can.be.turned.ON/OFF.by.clicking.on.the.corresponding.switch.C. Rotary Switch:..RSO0-RSO7.can.be.turned.ON/OFF.by.selecting.the.corresponding.switch.with.

the.RS.selector.or.through.the.RS.selector.input.box.D. Chassis ID & Slot ID:..These.fields,.respectively,.report.the.TestDrive.Chassis.ID.(between.main.

and.auxiliary).and.the.slot.where.the.ASM.has.been.inserted.in.the.chassis.E. Fault Indicators:..The.‘Rail.Over.Current.Status’.‘Rail.Over.Voltage.Status’.and.‘Over.Temperature’.

LED.indicators.are.used.to.alert.the.user.that.there.is.an.Over.Current,.Over.Voltage.or.Thermal.Shutdown.error.on.one.of.the.switches...The.acknowledge.toggle.switch.is.located.beside.the.indicators.are.used.once.the.error.condition.had.been.corrected..Note.that.the.SM.only.manages.the.Over.Current.fault..The.other.LED.indicators.are.there.but.not.used.

F. Software Faults:..These.fields.report.if.software.based.error.has.occurred.on.the.module.G. Cable ID:..The.Cable.ID.is.reported.in.the.cable.ID.field...This.feature.must.be.enabled.and.the.ID.

for.the.proper.cable.is.set.from.the.ASM.Configuration.GUI.(see.3.3)...If.a.bad.cable.is.connected.or.if.a.correct.cable.connection.has.changed/removed,.an.error.is.indicated.with.Cable.Error.LED...This.error.can.be.acknowledged.by.the.Cable.Error.toggle.switch.

H. HW & SW versions:..The.current.firmware.and.hardware.versions.are.indicated.in.the.XXX0.Firm.Rev.and.XXX0.HW.Rev.fields.(respectively).

SM Configuration GUI

A

B

C

D

E

F

G

H



The.SM.GUI.provides.a.separate.panel.that.allows.the.user.to.modify.certain.configurations.for.board.operation..After.selecting.the.‘Config’.tab.of.the.TestDrive.interface,.the.user.can.access.the.configuration.panels.for.all.modules.inserted.into.the.system...Figure.37.details.the.SM.configuration.panel.

From.the.configuration.GUI.the.user.can.decide.what.rail.is.to.be.considered.as.the.Global.Rail.as.well.as.enabling.cable.identification.and.set.the.desired.cable.value.that.the.system.should.monitor.

The.Discrete.Switches.tab.allows.the.user.to.configure.each.of.the.30.discrete.switches.and.to.select.if.the.switches.are.to.be.opened.or.connected.to.the.Global.Rail..The.Flexible.Switches.tab.allows.to.user.to.configure.the.5.flexible.switches.and.to.assign.the.power.rail.to.which.they.connect..The.final.tab,.the.Rotary.Switches.tab,.allows.the.user.to.configure.each.digital.switch.that.composes.the.rotary.switch..This.tab.also.allows.the.user.to.set.on.which.selector.position.a.particular.digital.switch.is.enabled.and.which.power.rail.is.connected.to.the.digital.switches.

Figure.37:.SM.-.Discrete.Switch.Configuration.Interface

.



Figure.38:..SM.-.Flexible.Switch.Configuration.Interface

Figure.39:..SM.-.Rotary.Switch.Configuration.Interface


Switch Module.SM.SIMULINK.MODEL

SM SIMULINK MODELTD.mdl

‘TD.mdl’.is.a.standard.Simulink.model.provided.with.all.TestDrive.systems...The.model.is.used.to.simulate.automotive.functions.to.the.ECU...The.Switch.Module.is.a.component.of.the.overall.model...The.default.version.of.‘TD.mdl’.supports.up.to.three.SMs.in.the.TestDrive.chassis.(Note:.the.model.may.be.modified.to.support.more.SMs).

OpCtrl Switch Module

Block

.

Mask



Description

This.controller.block.(OpCtrl).accesses.an.Opal-RT.Switch.Module.Board.(OP6227).or.SM.for.short..This.module.features.30.discrete.switches,.5.flexible.switches,.and.1.rotary.switch.with.4.different.configurations.and.different.rail.connections.

The.OpCtrl.blocks.and.the.OpFcn.blocks.are.designed.to.separate.board.access.and.data.treatment.to.and.from.the.boards..The.OpCtrl.block.attempts.to.detect.an.OP6227.Switch.Module.board.connected.to.an.OP5110.card.via.a.SignalWire.link..(The.OP5110.is.the.SignalWire.controller.card.in.the.Opal-RT.TestDrive.).Once.the.hardware.is.detected,.the.OpCtrl.block.relays.the.data.to.and.from.the.Switch.Module.board.to.the.OpFcn.function.blocks..

OpFcn.blocks.are.linked.to.an.OpCtrl.block.through.the.controller.name.specified.in.both.the.OpFcn.and.OpCtrl.blocks..Since.the.number.and.type.of.available.functionalities.on.each.board.are.different,.each.OpCtrl.block.driver.registers.a.set.of.available.functionalities.that.represent.the.different.components.of.the.board.it.represents..The.SM.supports.43.OpFcn.Digital.Switch.functionalities.and.one.OpFcnStatusRegister.functionality..Please.refer.to.the.documentation.of.the.OpFcn.blocks.for.more.details.on.these.functionalities.

NOTE: The Switch Module board was designed for use in an Opal-RT TestDrive simulator but it can be used as a standalone module also. Please refer to “Characteristics and Limitations” for important information regarding the synchronization of the model when the OP6227 is standalone.

The.following.table.lists.the.functionalities.available.on.the.module..It.also.specifies.the.functionality.numbers.that.must.be.passed.to.the.function.blocks.to.use.each.switch..Note.that.the.Status.Register.functionality.requires.no.functionality.number.

Functionality type Count Functionality name (and number)

Digital.Switch 43 Discrete:.DS0.to.DS29.(0.to.29)

Flexible:.FSO0.to.FSO4.(30.to.34)

Rotary:.RSO0.to.RSO7.(35.to.42)

Status.register 1 -

Theory of operation

The.switch.output.of.the.SM.may.be.described.as.a.software.controlled.switch..The.State.input.of.the.OpFcn.Digital.Switch.block.is.a.Boolean.and.is.used.to.control.the.state.(ON/OFF).of.each.switch..The.State.input.of.the.OpFcn.Digital.Switch.block.is.a.Boolean.and.is.used.to.identify.to.current.state.(ON/OFF).of.each.switch.

Value Description

0 The.switch.is.in.open.state..(OFF)

1 The.switch.is.in.closed.state..(ON)

The.Fault acknowledge.input.of.the.OpCtrl.serves.to.acknowledge.over.current.in.the.switch.module.board..When.a.fault.as.been.flagged.by.the.OpFcn.Status.Register,.the.user.inputs.this.signal.to.reset.the.over.current.status.and.resume.functionality.of.the.board..The.acknowledge.signal.accepts.the.following.values:

Value Description

0 Run:.The.board.functions.properly.

1 Reset.the.board:.The.over.current.state.as.been.corrected.and.the.board.can.resume.its.functions.



ParametersController Name:... The.controller.name.uniquely.specified.in.an.OpCtrl.block’s.parameter.

enables.the.binding.between.a.specific.controller.(that.has.functionalities).and.its.generic.functionalities.

Discrete Switches.Rail:... Permits.the.user.to.select.whether.Discrete.Switches.are.connected.to.Global.Rail.(IGN1.for.older.revision.than.2.5.module.boards).or.Open.(disabled).

Flexible Switches Rails:... Allows.the.user.to.define.which.rail.each.of.the.five.(5).flexible.switches.are.connected.to.through.a.single.row.matrix..Flexible.switch.0.is.the.left.most.value.and.the.last.one.on.the.right.represents.flexible.switch.4..Rails.values.between.0.and.4.represent.each.available.rail..Open.(disabled),.battery,.global.(IGN1.for.older.revision.than.2.5.module.boards),.Electronic.Controller.Unit.(ECU).5.volts.output,.and.external.power.source.are.respectively.0.to.4.

Rotary Switch Rail:... Lets.the.user.define.to.which.rail.the.rotary.switch.will.connect..Rail.values.between.0.and.4.represent.each.available.rail..Open.(disabled),.battery,.global.(IGN1.for.older.revision.than.2.5.module.boards),.Electronic.Controller.Unit.(ECU).5.volts.output,.and.external.power.source.are.respectively.0.through.4.

Global Rail Select:... From.the.drop.down.list,.user.defines.a.rail.as.Global.Rail...Note.that.this.only.applies.to.Rev.2.5.modules..IGN1.is.defaulted.as.the.Global.Rail.for.prior.modules.

Sample Time.(s):.. Allows.the.user.to.specify.the.sample.time.for.this.block.and.the.TestDrive.board.in.seconds..The.default.value.is.0,.which.specifies.a.continuous.sample.time.(note.that.the.sample.time.is.then.borrowed.from.the.separated.subsystem)..Some.rules.must.be.respected:

.- All.controller.blocks.of.TestDrive.modules.sharing.the.same.SignalWire.port.must.have.the.same.sample.time.

.- A.controller.block.and.its.related.function.blocks.must.share.the.same.sample.time.

.- If.an.OpConfigSync.block.is.used.and.does.not.specify.the.SignalWire.port.of.the.module.as.the.synchronization.source,.the.sample.time.must.be.an.integer.multiple.of.the.synchronization.source.sample.time.specified.in.it.

.- If.an.OpConfigSync.block.is.used.and.specifies.the.SignalWire.port.of.the.module.as.the.synchronization.source,.its.sample.time.must.be.the.fastest.rate.in.the.model.

Inputs

Error Ack Rail Over Current:..This.input.is.to.acknowledge.over.current.faults..This.means.that.if.a.fault.has.previously.been.flagged.the.controller.receives.this.signal.to.confirm.if.it.should.stay.deactivated.or.if.it.should.resume.operation..

Outputs

No.Output.



Characteristics and LimitationsSynchronization:

By.default,.when.an.OpCtrl.block.of.one.of.the.TestDrive.modules.is.placed.in.a.Simulink.model,.the.synchronization.of.the.model.is.controlled.by.the.right-most.module.inserted.in.the.TestDrive.chassis..This.mechanism.ensures.that.status.messages.coming.from.all.modules.and.that.transit.on.the.SignalWire.link.are.received.before.the.end.of.calculation.step.signal.is.sent.to.the.model..

When.a.TestDrive.module.is.used.standalone.(out.of.a.TestDrive.chassis).and.in.particular.when.it.is.to.be.used.simultaneously.with.OPHSDIO.blocks,.the.automatic.synchronization.feature.must.be.disabled..This.is.done.by.setting.the.user.Variable.DCS_SYNCHRONIZED.to.OFF.in.the.UserVariables.sub-panel.of.the.Configuration.panel.of.RT-LAB.MainControl..Failure.to.do.this.creates.communication.errors.on.the.SignalWire.link.which.in.turn.results.in.overruns.in.the.model.



Pin Assignments Elco Eq. # (female)

Elco Pin name

(female)


Input Line

Output Line

1. A. FS_EXTV1. x.


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

2. B. RSO2. x.3. C. FSO0. x.4. D. FS_EXTV0. x.5. E. DS2. x.6. F. FS_EXTV2. x.7. H. FSO2. x.8. J. DS8. x.9. K. FSO1. x.10. L. DS1. x.11. M. RS_EXTV0. x.12. N. DS10. x.13. P. FS_EXTV3. x.14. R. DS5. x.15. S. DS12. x.16. T. FSO3. x.17. U. RSO3. x.18. V. RSO4. x.19. W. RSO0. x.20. X. RSO6. x.21. Y. RSO1. x.22. Z. DS11. x.23. a. FS_EXTV4. x.24. b. DS13. x.25. c. DS4. x.26. d. DS0. x.27. e. RSO7. x.28. f. DS3. x.29. h. DS17. x.30. j. DS7. x.31. k. DS20. x.32. l. FSO4. x.33. m. RSO5. x.34. n. DS19. x.35. p. DS23. x.36. r. DS9. x.37. s. DS6. x.38. t. DS22. x.39. u. DS26. x.40. v. DS25. x.41. w. DS16. x.42. x. DS18. x.43. y. DS14. x.44. z. DS15. x.45. AA. DS24. x.46. BB. DS21. x.47. CC. DS28. x.48. DD. ID_CBL0. x.49. EE. ID_CBL. x.50. FF. DS29. x.51. HH. DS27. x.52. JJ. PROTO0. x. x.53. KK. ID_CBL4. x.54. LL. ID_CBL3. x.55. MM. ID_CBL2. x.56. NN. ID_CBL1. x.

Figure.40:..Switch.module.I/O.signal.desciption



OpFcn Digital Switch

Block.

.

Mask.

.

Description

This.block.enables.the.use.and.configuration.of.digital.switches.present.on.the.Switch.Module.board.

Parameters

Controller Name:..Each.function.block,.such.as.the.OpFcn.DigitalSwitch.block,.must.refer.to.an.OpCtrl.block.such.as.the.OpCtrl.SwitchModule.block.that.will.manage.the.data.transfer.with.the.IO.board..The.binding.between.OpFcn.and.OpCtrl.blocks.is.performed.via.the.use.of.the.Controller.name.that.each.OpCtrl.block.uniquely.defines..In.this.case.the.controller.name.could.be.‘SM’.in.both.blocks..This.binding.is.checked.during.the.initialization.phase.of.the.model..If.no.OpCtrl.block.is.found.that.defines.the.same.Controller.Name.as.this.OpFcn.DigitalSwitch.block,.the.OpFcn.DigitalSwitch.block.is.simply.disabled.and.returns.0s.

The.image.below.shows.an.example.of.a.controller.name,.here.‘SM’,.used.successfully..

.

Selection of Functionalities:.This.field.is.used.to.determine.which.digital.switch.the.OpFcn.



DigitalSwitch.block.is.tied.to..In.the.example.above,.the.block.refers.to.the.discrete.switch.0.and.drives.the.DS0.output.pin;.it.has.a.0.typed.in.this.field..There.are.specific.numbers.that.refer.to.the.discrete,.flexible,.and.rotary.switches..All.are.explained.in.the.table.below.

Switch Type Pin-outs Assign number

Discrete DS0.to.DS29 0.to.29

Flexible FSO0.to.FSO4 0.to.34

Rotary RSO0.to.RSO7 35.to.42

Configuration:..From.the.drop.down.list,.user.defines.the.configuration.(Unconfigured,.Active.High,.Active.Low,.Open.Drain,.Open.Source).of.the.switch...See.“Switch.Configurations”.for.more.details.

Inputs

State:.This.signal.gives.the.information.to.the.switch.if.it.should.be.ON.or.OFF.

Outputs

State:.This.signal.gives.the.information.from.the.switch.if.it.is.set.ON.or.OFF.


Direct.Feedthrough Yes

Discrete.sample.time Yes

XHP.support Yes

Work.offline No


Switch Module.OpFcn.Status.Register

OPFCN STATUS REGISTERBlock.

.

Mask.

.

Description

This.generic.Status.Register.function.block,.OpFcnStatusRegister,.is.designed.to.return.status.information.from.a.TestDrive.module.board..All.TestDrive.boards.define.a.similar.status.register.that.enables.the.user.to.get.information.regarding:.board.location.(chassis,.slot.and.cable.identification),.synchronization.status.and.error.status.(over-current,.over-voltage,.over-temperature,.software.faults,.and.communication.faults)..Although.not.all.these.parameters.can.be.of.interest.for.a.given.module.board,.the.register.mapping.allows.the.use.of.the.same.OpFcnStatusRegister.for.all.boards.

Parameters

Controller Name:.The.controller.name.uniquely.specified.in.an.OpCtrl.block’s.parameter.enables.the.binding.between.a.specific.controller.block.and.the.present.function.block..Binding.between.OpFcn.and.OpCtrl.blocks.that.define.the.same.Controller.Name.is.performed.during.the.initialization.phase.of.the.model..If.no.OpCtrl.block.is.found.that.defines.the.same.Controller.Name.as.the.OpFcnStatusRegister.block,.the.OpFcnStatusRegister.is.simply.disabled.



Sample Time (s):.This.parameter.allows.the.user.to.specify.the.sample.time.for.this.block.and.the.TestDrive.board.in.seconds..The.default.value.is.0,.which.specifies.a.continuous.sample.time.(note.that.the.sample.time.is.then.borrowed.from.the.separated.subsystem)..Some.rules.must.be.respected:

•. All.controller.blocks.of.TestDrive.modules.sharing.the.same.SignalWire.port.must.have.the.same.sample.time..

•. A.controller.block.and.its.related.functionality.blocks.must.share.the.same.sample.time..•. If.an.OpConfigSync.block.is.used.and.does.not.specify.the.SignalWire.port.of.the.module.as.the.

synchronization.source,.the.sample.time.must.be.an.integer.multiple.of.the.synchronization.source.sample.time.specified.in.it..

•. If.an.OpConfigSync.block.is.used.and.specifies.the.SignalWire.port.of.the.module.as.the.synchronization.source,.its.sample.time.must.be.the.fastest.rate.in.the.model..

Inputs

This.block.has.no.inputs.

OutputsChassis Id:.. This.output.returns.the.number.of.the.chassis.where.the.board.is.

installed..Typically.this.number.is.0.Slot Id:.. This.output.returns.the.number.of.the.slot.where.the.board.is.installed..

Typically.this.number.is.1.to.11.when.the.board.is.in.a.chassis,.and.0.when.the.board.is.standalone.

Rail Over-Current Status:.. This.output.returns.1.when.an.over-current.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Rail Over-Voltage Status:.. This.output.returns.1.when.an.over-voltage.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Thermostat Output Status:.This.output.returns.1.when.an.over-temperature.condition.is.detected.on.the.board,.and.0.otherwise..Acknowledgment.of.this.error.depends.on.the.type.of.board.

Software Fault Rail:.. This.flag.is.more.relevant.for.modules.that.support.different.power.rail.values..The.flag.is.raised.when.2.power.rails.are.selected.for.the.same.output.line.

Software Fault State:.. This.flag.is.more.relevant.for.modules.that.support.different.states.values..The.flag.is.raised.when.2.states.(high.and.low).are.selected.for.the.same.output.line.

Software Fault from Host:.. (Disabled.function.)CRC Fault Status:.. (Disabled.function.)Cable Identification:.. This.output.returns.the.state.of.the.cable.identification.lines.ID-CBL1-5.of.

the.module.board..The.default.value.is.31.Device revision:.. This.output.returns.the.revision.number.of.the.associated.device.Carrier Info:.. This.output.returns.information.about.the.IO.card.revision..This.output.

has.a.size.of.2.and.will.ultimately.return.the.hardware.revision.and.serial.number.of.the.board..Presently.the.first.value.is.1.if.the.driver.detects.that.the.card.holds.an.EEPROM.for.storing.revision.and.serial.number.information..The.second.value.is.presently.fixed.to.65535.




Connector.Pin.Assignments:.

Since.the.OpFcnStatusRegister.block.may.attach.itself.to.different.boards.that.support.the.Status.Register.functionality,.the.user.should.refer.to.the.documentation.of.his.specific.module.board.for.connector.pin.assignments.

Direct.Feedthrough Yes

Discrete.sample.time Yes

XHP.support Yes

Work.offline No

.

.



FREQUENTLY ASKED QUESTIONSQ: What is the maximum number of SMs that may be connected to the TestDrive System?

A:.. The.maximum.number.of.SMs.that.can.be.used.is.dependant.on.the.number.of.TestDrive.chassis.used...Up.to.10.SM.modules.can.be.inserted.into.each.chassis...Note.that.the.TestDrive.model.(‘TD.mdl’).must.be.modified.to.support.this.additional.feature...The.default.model.allows.up.to.three.SMs.in.one.TestDrive.chassis.

Q: What is the module ID for the SM and where can it be read?

A:.. The.module.ID.for.the.SM.is.2...This.is.not.directly.visible.on.the.default.GUI.of.the.SM...A.development.level.user.can.make.modifications.to.the.model.and.GUI.to.output.the.module.ID.

Q: How does cable identification work?

A:.. Each.module.supports.positive.cable.identification...Cable.identification.is.enabled.and.set.by.the.SM.Configuration.GUI.(Figure.6)...The.user.will.define.a.value.between.0.and.31...This.value.will.be.set.in.binary.with.the.signals.ID_CBL0.to.ID_CBL4.(Table.3)...The.figure.below.depicts.functionality.of.cable.identification.

Figure.41:.Cable.IdentifcationThe.user.will.ground.the.necessary.signals.(Cable_ID0.to.Cable_ID4).via.Elco.pin.EE.to.achieve.the.binary.equivalent.of.the.decimal.value.set.in.the.SM.Configuration.panel.


Resolver Module.Introduction

RESOLVER MODULE

INTRODUCTION

The.Resolver.module.simulates.the.behavior.of.a.real.resolver.positioning.sensor..Resolver.position.sensors.resemble.small.motors.and.are.essentially.rotary.transformers,.so.the.coefficient.of.coupling.between.rotor.and.stator.varies.with.shaft.angle..A.resolver.is.based.on.the.concept.of.encoding.the.shaft.angle.into.sine.and.cosine.signals.

The.nature.of.resolver.signals.is.described.in.the.picture.below..The.resolver.is.excited.by.an.AC.voltage.of.the.form.Vsin(ωt)..The.excitation.signal.Vsin(ωt).(also.known.as.the.carrier.signal).is.generated.by.either.the.internal.model.or.an.external.source..This.voltage.produces.a.current.in.the.excitation.coil.and.induces.two.output.voltages.known.as.positioning.sine.and.cosine.given.by.Vsin(ωt)sin(θ).and.Vsin(ωt)cos(θ+Φ).respectively..The.phasing.Φ.models.the.error.in.the.placement.of.the.output.coils..The.ideal.resolver.has.the.sine.coil.placed.at.exactly.90.degrees.of.the.cosine.coil..The.phasing.expresses.the.difference.between.this.ideal.position.and.the.real.one,.hence.the.ideal.resolver.has.a.physical.angle.of.Φ=0..

Figure.42:.Nature.of.resolver.signals.

Figure.43:.Resolver.block.diagram

With.this.application,.other.functionalities.have.been.implemented.such.as.the.measurement.of.the.RMS,.mean.value.and.frequency.of.the.external.carrier.for.both.resolvers.as.well.as.the.error.induction.mode.on.the.phasing.at.the.outputs.

Sine or Cosineenvelop

Excitation

Sine or Cosine modulated(Positioning waves)

AnalogMultiplier


Resolver Module.TECHNICAL.DESCRIPTION

TECHNICAL DESCRIPTIONExternal Carrier In Specifications

In CharacteristicsTechnical Specifications

Number.of.channels 16.differentialsResolution 16.bits.per.channelMax..Sampling.Frequency 400.kS/s.per.channelMin.Conversion./.Acquisition.Time 2.5.μs.per.channelType.of.Analog.to.Digital.Converter.(ADC)

8.x.Dual.ADC.with.10.MBit/s.Serial.Output.Transfer

Maximum.Functional.Voltage.Input ±.20V.Maximum.Voltage.before.damage ±.40V

DC Transfer Characteristic

No.Missing.Codes.Resolution 14.bits.minimumIntegral.Nonlinearity.(INL) ±.8.LSB.maximumDifferential.Nonlinearity.(DNL) ±.1.5.LSB.typ..(0.to.+70°C)Common-mode.Rejection.Ratio 90.dB

Dynamic Characteristics

Bandwidth Small.signal.(-3.dB) 820.kHz

Large.signal.(1%.THD) 55.kHzSystem.noise 1.8.LSB.rms.(including.quantization)

Table 20: External carrier in specificationsResolver Out Specifications

Out CharacteristicsTechnical Specifications

Number.of.channels 16.Digital.to.analog.(DA)Resolution 16.bits.per.DAMaximum.output.voltage.(Vmax) ±.16VMinimum.recommended.output.voltage.range.setting.(Vmin)

±.1V

Update.rate.(tupd),.all.channels 1.usUpdate.rate.(tupd),.eight.channels 0.5.usSimultaneous.update.of.all.channels YesSetting time… Small Signal

(Step = 10% of Vmax)Large Signal

(Step = 90% of Vmax)….to.1%.of.step.input 0.7.us 1.7.us….to.0.1%.of.step.input 1.us 2.3.us….to.1.LSB 2.us 3.5.us

Table 21: Resolver out specifications


Resolver Module.Resolver.Overview

RESOLVER OVERVIEW

Each.Resolver.module.has.the.ability.to.analyze.voltages.ranging.from.-20V.to.+20V..The.maximum.and.minimum.input.voltages.before.any.damage.occurs.on.the.module.are.±40V.per.channel..The.Resolver.In.takes.the.analog.voltage.and.converts.it.to.a.digital.signal.that.can.be.processed.by.the.Resolver.Out..The.figure.below.represents.a.rough.draft.of.the.circuit.found.for.each.Resolver.In..

Figure.44:.Differential.Input.Analog.to.Digital.Converter.Circuit

Since.the.FPGA.needs.to.acquisition.data.in.order.to.calculate.the.indicators,.namely.for.the.RMS,.mean,.and.frequency.of.the.carrier,.a.small.delay.may.occur.between.the.input.of.the.signal.and.the.display.of.the.right.values.in.the.indicators..Rapidly.changing.indicator.values.are.also.possible.while.the.FPGA.samples.the.signal..The.positioning.sine.and.cosine.are.not.affected.by.this.delay..The.changes.are.applied.immediately.to.the.Resolver.Out’s.signals

Resolver Pin-outs

The.Resolver.module.has.two.different.sets.of.pin-out..These.sets.separate.the.outputs.of.the.optional.inputs..Table.22.below.presents.the.list.of.signals.composing.the.input.of.the.resolver.on.the.DIN96.and.on.a.screw.terminal..In.that.list,.we.find.the.external.carriers.or.exciters,.the.controls.for.the.relays.that.command.the.impedance.of.the.external.exciters,.and.the.loop.back.used.by.the.relays..It.is.to.be.kept.in.mind.that.the.Ext..Car..Imped..In.X.pins.should.be.connected.to.their.respective.Ext..Car..In.X.pins,.the.Ext..Car..Imped..GND.X.pins.to.Ext..Car..GND.X.pins,.and.the.Relay.Ctrl.In.X.pins.to.Relay.Ctrl.Out.X..The.X.is.representing.the.simulated.motor.(or.resolver).that.they.are.tied.to,.so.pins.with.the.same.motor.number.should.be.connected.together..Here.is.an.example:.Ext..Car..Imped..In.1.should.be.connected.to.Ext..Car..In.1.and.so.on.



The.table.below.provides.the.list.of.available.signals.generated.by.the.resolvers..The.signals.in.section.A.of.the.Screw.Terminal.represent.the.positioning.sine.and.cosine.waves.generated.by.the.resolvers..The.signals.in.section.B.represent.the.sine.and.cosine.envelope.that.are.used.to.generate.the.positioning.waves..These.outputs.are.useful.as.triggers.when.analyzing.the.positioning.waves.

DIN96 Screw Terminal

Signal Name in TestDrive-OP5130 + ADC





C01 NC B01 NC A01 NCC02 NC B02 NC A02 NC

1

10

20

30

MALE DIN96CONTACT VIEW

32

ABC

C03 NC B03 NC A03 NCC04 NC B04 B38 NC A04 B37 NCC05 B36 NC B05 B35 Relay.Ctrl.Out.2 A05 B34 Relay.Ctrl.Out.1C06 B33 NC B06 B32 NC A06 B31 NCC07 B30 NC B07 B29 NC A07 B28 NCC08 B27 NC B08 B26 NC A08 B25 NCC09 B24 NC B09 B23 NC A09 B22 NCC10 B21 NC B10 B20 NC A10 B19 NCC11 B18 NC B11 B17 NC A11 B16 NCC12 B15 NC B12 B14 NC A12 B13 NCC13 B12 NC B13 B11 NC A13 B10 NCC14 B09 NC B14 B08 NC A14 B07 NCC15 B06 NC B15 B05 NC A15 B04 Ext..Car..GND.2C16 B03 Ext..Car..In.2 B16 B02 Ext..Car..GND.1 A16 B01 Ext..Car..In.1C17 NC B17 NC A17 NCC18 NC B18 NC A18 NCC19 NC B19 NC A19 NCC20 NC B20 A38 NC A20 A37 NCC21 NC B21 A35 NC A21 A34 NCC22 A33 NC B22 A32 NC A22 A31 Relay.Ctrl.In.2C23 A30 NC B23 A29 Relay.Ctrl.In.1 A23 A28 NCC24 A27 NC B24 A26 NC A24 A25 NCC25 A24 NC B25 A23 NC A25 A22 NCC26 A21 NC B26 A20 NC A26 A19 NCC27 A18 NC B27 A17 NC A27 A16 NCC28 A15 NC B28 A14 NC A28 A13 NCC29 A12 NC B29 A11 NC A29 A10 NCC30 A09 NC B30 A08 NC A30 A07 NCC31 A06 NC B31 A05 NC A31 A04 Ext..Car..Imped..GND.

2C32 A03 Ext..Car..

Imped..In.2B32 A02 Ext..Car..Imped..

GND.1A32 A01 Ext..Car..Imped..In.1

Note: NC.=.Not.ConnectedExt..Car..=.External.CarrierExt..Car..Imped..=.External.Carrier.Impedance

Table 22: Resolver in signal list for DIN96 and Screw Terminal.









C01 NC B01 NC A01 NC



C04 NC B04 B38 NC A04 B37 NC

C05 B36 NC B05 B35 NC A05 B34 NC

C06 B33 NC B06 B32 NC A06 B31 NC

C07 B30 NC B07 B29 NC A07 B28 NC

C08 B27 NC B08 B26 NC A08 B25 NC

C09 B24 NC B09 B23 NC A09 B22 NC

C10 B21 NC B10 B20 NC A10 B19 NC

C11 B18 NC B11 B17 NC A11 B16 NC

C12 B15 NC B12 B14 NC A12 B13 NC

C13 B12 NC B13 B11 NC A13 B10 NC

C14 B09 NC B14 B08 Cos.θ GND.2 A14 B07 Cos.θ.Out.2

C15 B06 Sin.θGND.2 B15 B05 Sin.θ Out.2 A15 B04 Cos.θ.GND.1

C16 B03 Cos.θ.Out.1 B16 B02 Sin.θ.GND.1 A16 B01 Sin.θ Out.1




C20 NC B20 A38 NC A20 A37 NC

C21 NC B21 A35 NC A21 A34 NC

C22 A33 NC B22 A32 NC A22 A31 NC

C23 A30 NC B23 A29 NC A23 A28 NC

C24 A27 NC B24 A26 NC A24 A25 NC

C25 A24 NC B25 A23 NC A25 A22 NC

C26 A21 NC B26 A20 NC A26 A19 NC

C27 A18 NC B27 A17 NC A27 A16 NC

C28 A15 NC B28 A14 NC A28 A13 NC

C29 A12 NC B29 A11 NC A29 A10 NC

C30 A09 NC B30 A08 Cos.Resolver.GND.2 A30 A07 Cos.Resolver.Out.2

C31 A06 Sin.Resolver.GND.2

B31 A05 Sin.Resolver.Out.2 A31 A04 Cos.Resolver.GND.1

C32 A03 Cos.Resolver.Out.1

B32 A02 Sin.Resolver.GND.1 A32 A01 Sin.Resolver.Out.1

Note: NC.=.Not.Connected

Table 23: Resolver out signal list for DIN96 and Screw Terminal

1

10

20

30

MALE DIN96CONTACT VIEW

32

ABC


Resolver Module.GRAPHICAL.USER.INTERFACE.(GUI)

GRAPHICAL USER INTERFACE (GUI)Resolver’s TestDrive GUI

Figure.45:..Resolver’s.TestDrive.GUI

The.resolver.GUI.is.divided.in.three.main.blocks..The.column.on.the.left.shows.all.the.controls.and.indicators.concerning.the.resolver.for.the.first.motor..The.middle.column.shows.all.the.controls.and.indicators.concerning.the.resolver.for.the.second.motor..The.last.column.on.the.right.shows.what.types.of.mezzanines.are.attached.to.the.card.that.composes.the.Resolver.In.

Since.the.first.and.second.columns.contain.the.same.information,.only.the.first.column.will.be.explained.in.details.in.the.following.sections..Consider.the.information.valid.for.both.motor.one.and.two.

Exciter GUI

Figure.46:.Resolver’s.exciter.GUIIn.the.following.sections,.X.refers.to.the.number.of.the.motor..X.can.be.either.a.one.or.a.two.



Internal CarrierMX Exciter Source

This.drop.down.list.lets.the.user.select.between.an.external.exciter.source.and.an.internal.one..The.selection.affects.what.is.displayed.on.the.GUI..Figure.6.shows.both.states.

The.internal.exciter.doesn’t.need.any.external.input.as.its.name.implies..It.uses.all.the.controls.shown.in.the.left.part.of.figure.5.which.are.MX.Exciter.Frequency,.MX.Exciter.Amplitude.and.MX.Speed.(Hz).

The.external.exciter.needs.an.inputted.waveform.to.work..It.uses.all.the.controls.shown.in.the.right.part.of.figure.5.which.are.MX.External.Carrier.RMS.Value,.MX.External.Carrier.Avg.Value,.MX.External.Carrier.Frequency,.MX.Source.Impedance,.and.MX.Speed.(Hz).

MX Exciter Frequency

This.knob.permits.the.user.to.set.the.value.in.Hertz.of.the.internal.exciter’s.frequency..It.is.the.carrier.signal.frequency.that.is.multiplied.by.the.sine.and.cosine.envelopes..The.effective.range.is.from.0.to.30.kHz.with.an.increment.of.0.01.Hz.

NOTE: These controls are only accessible when the Exciter Source has been set to Internal Carrier.

External CarrierMX Exciter Amplitude

This.meter.permits.the.user.to.set.the.value.in.Volts.of.the.internal.exciter’s.amplitude..It.is.the.carrier.signal.amplitude.that.is.multiplied.by.the.sine.and.cosine.envelopes..The.effective.range.is.from.0.to.16.Volts.with.an.increment.of.one.mV.

MX External Carrier RMS Value

This.indicator.shows.the.user.the.RMS.value.of.the.inputted.external.exciter.wave.

MX External Carrier Avg Value

This.indicator.shows.the.user.the.mean.value.of.the.inputted.external.exciter.wave.

MX External Carrier Frequency

This.indicator.shows.the.user.the.frequency.of.the.inputted.external.exciter.wave.

Note:. This.control.is.only.accessible.when.the.Exciter.Source.has.been.set.to.External.Carrier.

MX Source Impedance

This.switch.permits.the.user.to.set.the.value.of.the.impedance.of.the.acquisition.board..The.possible.values.are.110.Ohms.and.greater.than.100.kOhms..

NOTE: These controls are only accessible when the Exciter Source has been set to External Carrier.

MX Speed (Hz)

This.knob.lets.the.user.set.the.speed.of.the.motor.in.Hertz..It.is.used.to.set.the.rotation.of.the.rotor.compared.to.the.stator..The.base.value.is.10.Hz.which.represent.600.rotations.per.minute.(RPM).

The.possible.values.are.comprised.inclusively.between.0.and.1200.Hz.or.0.to.72.000.RPM.

NOTE: This control is always accessible, regardless of Exciter Source setting.



Winding GUI

Figure.47:.Resolver’s.winding.GUIMX Winding

This.switch.gives.the.opportunity.to.enable.or.disable.the.winding.and.its.options.and.controls..If.this.switch.is.ON,.all.the.other.controls.of.the.panel.will.become.visible.and.they.will.disappear.in.the.opposite.setting.

MX SIN Enable

This.button.gives.the.opportunity.to.enable.or.disable.the.sine.and.its.controls..If.this.button.is.ON,.all.the.controls.related.to.the.sine.wave.will.become.visible.and.they.will.disappear.in.the.opposite.setting.

NOTE: This control is only accessible when the MX Winding is ON. MX SIN Amplitude

This.meter.acts.directly.on.the.value.of.the.envelope.sine’s.amplitude..The.amplitude.can.be.set.from.0.Volts.to.16.Volts.with.an.increment.of.one.mV.

NOTE: This control is only accessible when the MX Winding is ON and the MX SIN Enable is set to ON.

MX SIN Bias

This.meter.acts.as.an.offset.setting..It.acts.like.a.vertical.translation.tool.to.calibrate.positioning.sine..The.bias.can.be.set.from.-16.Volts.to.16.Volts.with.an.increment.of.one.mV..

Changing the sine bias will have an effect on the positioning sine, but will not affect the Sin θ Out X signal.

NOTE: This control is only accessible when the MX Winding is ON and the MX SIN Enable is set to ON. MX COS Enable

This.button.gives.the.opportunity.to.enable.or.disable.the.cosine.and.its.controls..If.this.button.is.ON,.all.the.controls.related.to.the.cosine.wave.as.well.as.the.phasing.will.become.visible.and.they.will.disappear.in.the.opposite.setting.

NOTE: This control is only accessible when the MX Winding is ON.



MX COS Amplitude

This.meter.acts.directly.on.the.value.of.the.envelope.cosine’s.amplitude..The.amplitude.can.be.set.from.0.Volts.to.16.Volts.with.an.increment.of.one.mV.

MX COS Bias

This.meter.acts.as.an.offset.setting..It.acts.like.a.vertical.translation.tool.to.calibrate.positioning.cosine..The.bias.can.be.set.from.-16.Volts.to.16.Volts.with.an.increment.of.one.mV.

Changing the sine bias will have an effect on the positioning cosine, but won’t affect the Cos θ Out X signal.

MX Phase

The.phasing.models.the.error.in.the.placement.of.the.output.coils..The.ideal.resolver.has.a.physical.angle.of.90.degrees.between.the.placement.of.the.sine.coil.and.the.cosine.coil..The.phasing.lets.the.user.correct.this.setting.to.use.real,.imperfect,.resolvers.and.still.have.the.right.output..The.phase.has.a.range.of.-90.degrees.to.90.degrees.with.an.increment.of.0.01.degree.

NOTE: These controls are only accessible when the MX Winding is ON and the MX SIN Enable is set to ON.

System Information GUI

Figure.48:.Resolver’s.system.informations.GUI

The.system.information.GUI.is.simply.composed.of.two.indicators.concerning.the.mezzanines.attached.to.the.resolver.in..A.normal.resolver.in.is.composed.of.an.Analog.to.Digital.mezzanine.(ADC).on.section.B..Other.possibilities.exist.but.are.not.commonly.seen.in.the.Opal-RT.Technologies.Inc..product.line..


Resolver Module.THE.RESOLVER.SIMULINK.MODEL

THE RESOLVER SIMULINK MODELTD.mdl

‘TD.mdl’.is.a.standard.Simulink.model.provided.with.the.TestDrive.systems..The.model.is.used.to.simulate.automotive.functions..The.Resolver.module.is.a.component.of.the.overall.model..The.version.of.‘TD.mdl’.that.supports.the.resolver.can.handle.only.one.in.a.WandaBox.connected.to.a.TestDrive.chassis..The.model.may.be.modified.to.support.more.Resolvers.

Resolver Sensor block

Block.

Mask.


Resolver Module.THE.RESOLVER.SIMULINK.MODEL

Description

This.block.contains.all.the.vital.systems.that.compose.the.working.Resolver.module..The.main.subsystem.of.the.Resolver.block.is.the.Op.Ctrl.Reconfigurable.I/O.block..It.accesses.the.Opal-RT.Active.FPGA.Carrier.Board.(OP5130)..This.on-board.FPGA.can.be.programmed.with.application.specific.bitstreams.to.interact.with.the.specialized.cards.mounted.onto.it..For.this.reason,.the.Resolver.block.has.been.masked.to.prevent.any.involuntary.changes.to.be.made.to.it.in.the.model..Changes.can.lead.the.model.to.malfunction.or.crash..

In.this.partucilar.case.the.FPGA.and.other.components.are.set.to.simulate.the.behavior.of.a.real.resolver.positioning.sensor..

Resolver.position.sensors.resemble.small.motors.and.are.essentially.rotary.transformers.so.the.coefficient.of.coupling.between.rotor.and.stator.varies.with.shaft.angle..A.resolver.is.based.on.the.concept.of.encoding.the.shaft.angle.into.sine.and.cosine.signals.

The.nature.of.resolver.signals.is.described.in.the.picture.below..The.resolver.is.excited.by.an.AC.voltage.of.the.form.Vsin(ωt)..The.excitation.signal.Vsin(ωt).(also.known.as.the.carrier.signal).is.generated.by.either.the.internal.model.or.an.external.source..This.voltage.produces.a.current.in.the.excitation.coil.and.induces.two.output.voltages.known.as.positioning.sine.and.cosine.given.by.Vsin(ωt)sin(θ).and.Vsin(ωt)cos(θ+φ).respectively..The.phasing.φ.models.the.error.in.the.placement.of.the.output.coils..The.ideal.resolver.has.the.sine.coil.placed.at.exactly.90.degrees.of.the.cosine.coil..The.phasing.expresses.the.difference.between.this.ideal.position.and.the.real.one,.hence.the.ideal.resolver.has.a.physical.angle.of.φ=0..

Parameters

There.are.no.parameters.

Inputs

Resolver Ctrl In:.This.input.is.a.bus.of.multiple.control.signals.coming.from.the.console..

Outputs

Resolver Out:.This.output.is.a.bus.of.multiple.signals..It.contains.the.sine.and.cosine,.the.external.carriers’.frequency,.the.external.carriers’.mean.and.RMS.values,.mezzanine.IDs,.etc.

Characteristics and LimitationsConnector Pin Assignments:

Refer.to.“Resolver.Pin-outs”.for.pin.assignment.


Resolver Module.Resolver.Module.Applications

FREQUENTLY ASKED QUESTIONSQ: My model is having difficulties to load. What could be wrong?

A:.. Check.your.FireWire.connection..Ensure.that.they.are.well.connected..Ensure.that.the.TestDrive.chassis.is.started.before.the.WandaBox.containing.the.Resolver.and.SPI.modules..It.is.imperative.to.respect.the.power.up.sequence..If.not.the.communication.between.the.chassis.and.the.box.will.not.function..Make.sure.to.reset.both.the.chassis.and.the.Wanda.(respect.#2.power.up.order).after.a.model.reset..This.is.due.to.an.outstanding.bug.that.Opal-RT.is.currently.working.to.resolve.

RESOLVER MODULE APPLICATIONS

As.the.description.of.the.resolver.suggests,.this.module.can.be.used.in.multiple.applications.where.the.position.of.a.shaft,.a.rotor,.a.wheel,.etc..is.needed.in.order.to.activate.or.deactivate.certain.actions,.commands,.systems,.etc.

This.is.especially.the.case.with.some.types.of.electrical.engines..They.need.to.know.precisely.the.rotor’s.position.to.send.more.or.less.power.to.the.motor.to.develop.the.best.power.curve.

Positioning.antennas.or.other.devices.can.also.easily.be.done.with.resolvers..The.waveform.generated.in.this.case.will.be.less.sinusoid.then.the.ones.generated.with.engines.but.the.position.can.still.be.calculated.with.accuracy..

.


Resolver Module.APPENDIX.–.TEST.CASE

APPENDIX – TEST CASEResolver Test1.. Click.on.the.Resolver.button.at.the.bottom.left.of.the.screen..This.calls.the.Resolver.graphical.user.

interface.(GUI)..2.. Once.the.panel.has.loaded,.the.Mezz.B.indicator.(top.right.of.the.GUI).will.show.ADC.as.shown.in.

figure.1..If.not.see.the.FAQ..

Figure.49:.System.Information.3.. An.oscilloscope.is.required.to.observe.the.Resolver.signals..Connect.the.probe.to.the.“RESOLVER.

OUT”.red.wire.on.the.screw.#A1.and.the.ground.to.the.black.wire.on.screw.#A2..This.is.the.resolver.sine.or.positioning.sine.of.the.first.motor.

4.. In.the.GUI,.ensure.the.M1.Exciter.Source.is.set.to.“Internal.Carrier”.

Figure.50:.Internal.Carrier.GUI5.. Verify.that.the.Resolver.is.now.emitting.a.steady.resolver.signal.on.the.scope..Modify.the.M1.

Speed,.the.M1.Exciter.Frequency,.and.the.M1.Exciter.Amplitude..This.should.affect.the.resolver.signal.captured.on.the.scope.


Resolver Module.APPENDIX.–.TEST.CASE

6.. Modify.the.sine.properties..Controls.are.located.just.below.the.Internal.Carrier.GUI..The.figure.below.shows.the.Winding.GUI..Disabling.the.winding,.results.in.the.resolver.signal.dropping.to.zero..Disabling.the.sine.has.the.same.effect..Since.the.sine.acts.like.an.envelope.for.the.resolver.sine,.a.change.in.the.sine’s.amplitude.will.be.reflected.on.the.resolver.sine.as.well..The.same.can.be.said.for.the.bias.which.acts.like.an.offset.

Figure.51:.Winding.GUI7.. Test.the.cosine.with.all.of.the.same.controls..The.controls.in.the.winding.section.that.affects.the.

cosine.all.bear.COS.in.their.name..Note.that.phasing.is.not.included.in.these.preliminary.tests. 8.. Repeat.the.above.procedure.to.verify.the.functionality.of.the.second.motor..Resolver.Pin-outs.are.

provided.in.Appendix.A

To.ensure.that.the.external.carrier.works.for.each.motor.a.function.generator.is.required.to.provide.a.waveform.to.the.Resolver..Connect.the.generator.to.the.“RESOLVER.IN”..Motor.1.is.the.wire.in.red.and.motor.2.the.wire.in.blue..Ensure.the.M1.Exciter.Source.is.set.to.“External.Carrier”.and.repeat.the.above.procedure.for.each.motor.


Current Sensor Module.Introduction

CURRENT SENSOR MODULE

INTRODUCTION

The.purpose.of.this.section.is.to.describe.the.Current.Sensor.Module.–.an.I/O.analog.voltage.analysis.module.that.is.part.of.the.TestDrive.System..It.includes.an.overview.of.the.module’s.functions,.its.specifications.and.features,.technical.details,.and.a.description.of.the.context.of.use...

It.is.anticipated.that.run-time.and.development.users.will.use.this.document.to.implement.the.Current.Sensor.Module.as.part.of.TestDrive..Support.engineers.will.also.use.the.information.from.this.document.to.troubleshoot.technical.issues.

Figure.52:.Current.Sensor.Module.connected.with.optional.OP5511

The.Current.Sensor.Module.is.used.to.analyze.various.currents.and.voltages.found.in.a.vehicle..When.used.with.TestDrive,.it.is.capable.of.displaying.voltage.with.its.acquisition.tool,.capturing.data.from.a.fault.trigger,.and.capturing.data.from.a.forced.fault.trigger.as.required.in.simulator.applications.for.the.automotive.industry.

.



Specifications without optional OP5511 module

OP6228 Characteristics

Technical Specifications

Number.of.channels.: 16.differentials

Resolution: 16.bits.per.channel

Max..Sampling.Frequency: 400.kS/s.per.channel

Min.Conversion./.Acquisition.Time: 2.5.μs.per.channel

Type.of.Analog.to.Digital.Converter.(ADC): 8.x.Dual.ADC.with.10.MBit/s.Serial.Output.Transfer

Maximum.Functional.Voltage.Input: ±20V.

Maximum.Voltage.before.damage: ±40V

DC Transfer Characteristic

No.Missing.Codes.Resolution: 14.bits.minimum

Integral.Nonlinearity.(INL): ±8.LSB.maximum

Differential.Nonlinearity.(DNL): ±1.5.LSB.typ..(0.to.+70°C)

Common-mode.Rejection.Ratio: 90.dB

Dynamic Characteristics

Bandwidth Small.signal.(-3.dB): 820.kHz

Large.signal.(1%.THD): 55.kHz

System.noise: 1.8.LSB.rms.(including.quantization)

Table 24: Current Sensor Module SpecificationsCurrent Sensor Module Specifications with optional OP5511 module

OP5511 Characteristics

Current channel Voltage Channel

Technical Specifications

(8.channels.total:

4.current.channels.and...4.voltage.channels).

Maximum.Input: 50A.* 600V.**

Signal.Output.Range: ±10.V

Common.mode: N/A >200V.(after.resistive.divider)

Isolation: Galvanic.2.5.kV N/A

Bandwidth: DC.to.100.kHz

Linearity: <.0.2%

Accuracy: <.0.5%

Rise.Time: <.2.microseconds

Power.Supply: ±15.V

Table 25: OP5511 Specifications*.The.maximum.input.for.the.current.channels.is.set.at.the.factory.depending.on.the.customer’s.order....50A.is.the.maximum.available.

**.The.maximum.input.for.the.voltage.channels.is.manually.set.with.jumpers..600V.is.the.default.setting.and.the.maximum.available.



Reference Documents

OP5511 High-current and high-voltage input conditioning module – User Manual (OP5511_user_manual-E_4V4I.pdf);.Opal-RT.Technologies;.2004

OP5340 Analog to Digital Converter Module – User Manual .(OP5340_user_manual-A_Analog_In.pdf);.Opal-RT.Technologies;.2005

DefinitionsAcquisition. Continuously.acquire.a.specified.number.of.samples.in.the.calculation.step.

Calculation Step. Basic.period.where.the.model.is.re-evaluated..This.period.is.typically.supplied.by.one.of.the.electronic.boards.in.the.system.and.referred.as.the.Model.Synchronization.signal.

CAN. Controller.Area.Network

Channel. Electrical.input.that.can.have.its.voltage.and/or.its.current.measured.

CPU. Central.Processing.Unit.or.processor..Commonly.know.CPUs.are.Intel’s.Pentium.IV,.and.Celeron.and.AMD’s.Athlon.

CRC.. Check.Redundancy.Character

ECU. Electrical.Control.Unit

Fault Trigger. A.fault.trigger.is.when.a.condition.value.of.a.certain.type.of.wave.on.a.certain.channel.is.reached.

FPGA. Field.Programmable.Gate.Array

Host. User.system.running.Windows.NT.and.the.Graphical.User.Interface...It.is.typically.used.to.monitor.the.model.running.on.the.Real.Time.Unit..

Mezzanine. Electronic.board.composing.the.Current.Sensor.Module..There.are.2.locations.for.mezzanines.on.the.Current.Sensor.Module.labeled.A.and.B..Factory.default.leaves.the.emplacement.B.empty.

Pin-out A and B. Pin-outs.linked.the.mezzanine.A.and.B.respectively.RTU / Target. Real.Time.Unit:.System.running.QNX.and.executing.the.model.in.real.time..Trace. See.channel.Trigger. Short.for.fault.trigger.


Current Sensor Module.TECHNICAL.DESCRIPTION

TECHNICAL DESCRIPTIONOverview

This.chapter.will.help.the.reader.become.more.familiar.with.the.Current.Sensor.Module’s.architecture..The.module.allows.the.user.to.analyze.up.to.8.channels.through.the.default.graphical.user.interface.(GUI).provided..The.GUI.and.FPGA.can.be.modified.to.analyze.up.to.16.channels1.,.which.are.available.on.the.Current.Sensor.Module.pin-out.A,.but.this.feature.is.not.discussed.in.this.document..

Each.channel.has.the.ability.to.analyze.voltages.ranging.from.-20V.to.+20V..The.maximum.and.minimum.input.voltages.before.any.damage.occurs.on.the.module.are.±40V.per.channel..The.channel.takes.the.analog.voltage.and.converts.it.to.a.digital.signal.that.can.be.analyzed..The.figure.below.represents.a.rough.draft.of.the.circuit.found.in.each.channel.

Figure.53:.Differential.Input.Analog.to.Digital.Converter.Circuit

The.serial.output.is.then.evaluated.by.the.FPGA.engine.to.decipher.the.data.needed.to.display.the.correct.information.through.the.GUI..The.FPGA.engine.is.used.to.perform.the.following.tasks:

•. To.communicate.with.the.RTU•. To.control.the.fault.trigger.on.each.of.the.16.channels•. To.control.the.signal.capture.on.each.of.the.16.channels•. To.control.the.sample.rate.needed.on.each.channel•. To.control.the.Activity.&.Fault.LEDs•. To.report.the.ID.of.the.optional.OP5511.modules•. To.report.the.ID.of.the.connected.mezzanine•. Signal.Wire.communication.port•. Flash.update•. ADC.data.monitoring•. Configurable.model.Sync•. EEPROM.r/w.access.

1. More.channels.require.more.CPU.calculation.time..Using.too.much.of.the.CPU.can.result.in.lost.data,.poor.acquisition.and.fault.trigger.precision.



.

Figure.54:.Current.Sensor.Module.and.FPGA.Functional.Block.Diagram.

Current Solver Module Pin-outs

All.16.channels.are.routed.through.the.ELCO-56.pin.connector.A..Below,.Table.3.presents.the.list.of.signals.available.on.the.external.ELCO-56.connector.A.sorted.by.pin.numbers..The.table.also.shows.on.which.pin.of.the.DIN.96.(J2.DIN.96.to.ELCO56).connector.the.signal.is.supplied.to.the.module..

As.can.be.seen.from.the.table.below,.power.to.the.optional.OP5511.external.module.is.supplied.by.pins.DD,.EE,.HH,.KK,.LL,.MM,.and.NN..Signals.ProbeX_IDY.are.used.to.get.the.ID.of.the.two.probes.and.are.implemented.on.channels.10.to.15..The.signals.with.the.plus.sign.refer.to.the.actual.3.3.Volts.required.for.the.IDs;.the.signals.with.the.minus.sign.refer.to.grounding.pins.needed.by.the.differential.channels.used.to.acquire.the.IDs..A.square.wave.is.outputted.from.pin.x..There.are.fourteen.unconnected.pins.

The.ELCO-56.pin.connector.B.offers.almost.the.same.connections..The.difference.resides.in.the.fact.that.there.is.no.power.for.external.modules.and.the.ProbeIDs.are.not.implemented..Table.4.below.presents.the.list.of.available.signals.sorted.by.pin.numbers..The.table.also.shows.on.which.pin.of.the.DIN.96.(J2.DIN.96.to.ELCO56).connector.the.signal.is.supplied.to.the.module.

.



Elco Eq. # (female)

ELCO Pin name (female)

Signal Name in TestDrive-OP5130 with OP5330

Input Line

Output Line

J2 DIN96 to ELCO56

1 A .-CH01 x A2


56 pins

HDC

J KBA

FM N P

EL

T U VSX Y Z

RW

c dbf

ae

jhm nl

r s tk

pw x yv

AA BB CCu

zFF HH JJEE

LL MM NNDD

KK

Note:..Artwork.was.done.using.Elco.Male.and.female.connector.used.during.assembly

2 B .+CH00 C13 C .-CH00 x B14 D .+CH01 x A15 E .+CH04 x C3

6 F .-CH03 x B37 H .+CH03 x A38 J .-CH02 x C29 K .+CH02 x B210 L .+CH06 x A511 M .-CH05 x C412 N .+CH05 x B413 P .-CH04 x A414 R .-CH08 x C615 S .+CH08 x B616 T .-CH07 x A617 U .+CH07 x C518 V .-CH06 x B519 W .-CH10 x A820 X .+CH10 x C721 Y .-CH09 x B722 Z .+CH09 x A723 a .-CH12 x B924 b .+CH12 x A925 c .-CH11 x C826 d .+CH11 x B827 e .-CH13 x A1028 f .+CH13 x C929 h .-CH14 x C1030 j .+CH14 x B1031 k FP_A_00 A1232 l GND X X C1133 m .-CH15 x B1134 n .+CH15 x A1135 p GND X X B1336 r FP_A_03 A1337 s FP_A_02 C1238 t FP_A_01 B1239 u FP_A_06 A1540 v EXT_A_V+ X C1441 w EXT_A_V+ X B1442 x FP_A_05 A1443 y FP_A_04 C1344 z EXT_A_V- X B1645 AA FP_A_07 A1646 BB EXT_A_GND X C1547 CC EXT_A_GND X B1548 DD x A1849 EE GND X X C1750 FF B1751 HH x A1752 JJ EXT_A_V- X C1653 KK x C2054 LL x C1955 MM x A1956 NN x C18

Figure.55:.Signal.List.for.ELCO.56.pin.Connector.A



Elco Eq. # (female)

ELCO Pin name (female)

Signal Name in TestDrive-OP5130 with OP5340

Input Line

Output Line J2 DIN96 to ELCO56

1 A .-CH01 x A22 B .+CH00 x C13 C .-CH00 x B14 D .+CH01 x A15 E .+CH04 x C36 F .-CH03 x B37 H .+CH03 x A38 J .-CH02 x C29 K .+CH02 x B210 L .+CH06 x A511 M .-CH05 x C412 N .+CH05 x B413 P .-CH04 x A414 R .-CH08 x C615 S .+CH08 x B616 T .-CH07 x A617 U .+CH07 x C518 V .-CH06 x B519 W .-CH10 x A820 X .+CH10 x C721 Y .-CH09 x B722 Z .+CH09 x A723 a .-CH12 x B924 b .+CH12 x A925 c .-CH11 x C826 d .+CH11 x B827 e .-CH13 x A1028 f .+CH13 x C929 h .-CH14 x C1030 j .+CH14 x B1031 k FP_A_00 A1232 l GND x x C1133 m .-CH15 x B1134 n .+CH15 x A1135 p GND x x B1336 r FP_A_03 A1337 s FP_A_02 C1238 t FP_A_01 B1239 u FP_A_06 A1540 v EXT_A_V+ C1441 w EXT_A_V+ B1442 x FP_A_05 A1443 y FP_A_04 C1344 z EXT_A_V- B1645 AA FP_A_07 A1646 BB EXT_A_GND C1547 CC EXT_A_GND B1548 DD A1849 EE GND C1750 FF B1751 HH A1752 JJ EXT_A_V- C1653 KK C2054 LL C1955 MM A1956 NN C18

Figure.56:.Signal.List.for.ELCO.56.Pin.Connector.B



Pin-outs for OP5511

Below.are.the.pin-outs.for.the.high.current,.high.voltage.probe:.the.OP5511..The.different.pin-outs.are.for.the.J1.25-pin.connector.that.connects.the.probe.to.the.Current.Sensor.Module.through.the.ELCO.56-pin.connector.and.the.J2.4-pin.connector.which.can.be.used.to.supply.±15V.to.the.probe..

It.is.to.be.noted.that.probes.connected.to.the.ELCO.connector.A.of.the.Current.Sensor.Module.doesn’t.need.to.be.supplied.with.additional.power.since.it.is.included.in.the.ELCO..On.the.other.hand,.probes.connected.to.the.ELCO.connector.B.or.outside.the.TestDrive.chassis.need.to.be.provided.with.power.

Figure.57:.OP5511’s.front.panel.connectors

.

Figure.58:.J1,.25.Pin.Connector.(front.view)

Pin# Description Pin# Description Pin# Description

1 Ch.A.Current.Sensor.Output 9 ID0 18 GND

2 Ch.B.Current.Sensor.Output 10 ID2 19 GND

3 Ch.C.Current.Sensor.Output 11 N/C 20 GND

4 Ch.D.Current.Sensor.Output 12 -.15.volts.(reference) 21 GND

5 Ch.A.Voltage.Sensor.Output 13 +.15.volts.(reference) 22 ID1

6 Ch.B.Voltage.Sensor.Output 15 GND 23 N/C

7 Ch.C.Voltage.Sensor.Output 16 GND 24 ID_GND

8 Ch.D.Voltage.Sensor.Output 17 GND 25 GND

Table 26: Signal list for J1 25-pin connector.

Pin# Description

1 -15.volts

2 GND

3 +15.volts

J2.4-pin.connector.(Front.view) 4 GND

Table 27: Signal list for J2 4-pin connectorID values for the OP5511 probe

Below.is.the.table.containing.the.values.of.the.different.ID.that.the.probes.can.have..Each.probe.can.have.an.ID.which.represents.which.current.channels.were.built.in.at.the.factory..For.example,.a.decimal.



value.of.2.(or.10.in.binary).means.that.the.probe.has.four.channels.equipped.with.15.Amps.sensors.

ID2 ID1 ID0 Decimal Value

Represent

0 0 0 0 Invalid.(Default)

0 0 1 1 [email protected]




1 0 1 5 Mixed.Channels

1 = 3.3V on pin

Table 28: ID list with representative valuesChannel test output

The.Current.Solver.Module.supplies.a.way.to.test.its.acquiring.channels.in.the.form.of.an.output.that.generates.a.level.TTL.square.wave.with.a.frequency.of.5.Hz.and.peak.to.peak.amplitude.of.±.3.Volts..The.lower.limit.of.the.wave.should.be.between.0.Volts.and.0,2.Volts.and.the.upper.limit.should.be.over.2.9.Volts.but.not.more.than.3.5.Volts.

This.known.frequency.and.amplitude.square.wave.can.be.used.to.test.the.acquisition.of.the.different.channels..It.can.be.done.by.connecting.the.plus.pin.of.a.channel.(+CH00.for.example).directly.to.the.square.wave.emitting.pin.(SquareWave).and.the.minus.pin.(-CH00.for.example).to.a.grounding.pin.(GND)..

If,.for.any.reason,.the.square.wave.cannot.be.used,.a.frequency.generator.can.be.used.instead..Set.it.to.a.relatively.small.frequency.(5.Hz)..An.amplitude.of.around.2.volts.provides.a.good.sample.without.needing.too.much.zoom.

Connect.the.positive.connector.from.the.frequency.generator.to.the.positive.pin.of.a.channel.(ex.:.+CH00).and.connect.the.negative.end.to.the.negative.pin.of.the.same.channel.(ex.:.-CH00)..Arm.the.scope.and.you.should.see.your.wave.of.5.Hz.and.2.volts.of.amplitude..Use.the.Y-Autoscale.to.adjust.the.zoom,.if.necessary..Test.the.gain.and.offset.once.the.validity.of.the.wave.in.the.scope.is.confirmed..The.gain.multiplies.the.signal.and.the.offset.adds.a.value.to.the.signal.providing.a.vertical.translation..Use.positive.and.negative.values.to.thoroughly.test.each.channel..Repeat.for.each.channel.to.ensure.they.work.properly..

See.“Current.Solver.Module.Pin-outs”.for.details.


Current Sensor Module.GRAPHICAL.USER.INTERFACE.(GUI)

GRAPHICAL USER INTERFACE (GUI)Current Solver Module’s TestDrive GUI

Figure.59:.Current.Sensor.Module’s.TestDrive.GUI

This.is.the.Current.Sensor.Module.panel..It.works.similarly.to.an.oscilloscope..It.offers.the.ability.to.manipulate.data.from.fault.triggers,.to.define.the.fault.triggers.themselves,.and.to.visualize.the.ongoing.acquisition.or.review.saved.data..The.following.sections.will.address.these.abilities.and.their.controls.on.the.GUI.



File Management

.

Figure.60:.File.Management.GUI

This.panel.is.used.to.manage.triggered.data..Each.time.a.fault.trigger.occurs,.all.buffer.data.can.be.saved.into.a.MAT.file..The.default.format.used.is.V4...This.file.format.can.be.easily.opened.with.MatLab..Take.note.that.if.the.data.type.is.changed.to.U32.or.I8.in.the.Simulink.model.you.may.not.be.able.to.open.them.with.MatLab.because.it.does.not.support.these.file.types.

Enable Data Logging: If.checked,.the.data.will.be.saved.automatically.in.a.MAT.file.each.time.a.trigger.occurs...If.unchecked,.there.is.no.automatic.data.saving..

Save Current Data: Click.to.save.data.after.a.fault.trigger.

File progress: This.indicator.shows.the.MAT.file.write.operation’s.progress.on.the.target.

Base File Name:.. The.base.name.for.MAT.files.saved.on.the.target..The.name.will.be.applied.as.follows:.basename_XX.mat,.where.XX.is.the.Current.File.Index.

Max File Size (MB):.. A.size.limit,.in.megabytes,.can.be.given.to.the.generated.file.when.saving..This.size.limit.cuts.the.length.of.the.time.frame.of.the.scope.window.that.is.saved..For.example,.the.length.selected.is.one.second.but.the.file.size.is.limited,.the.resulting.saved.file.might.actually.be.of.0.5.second..It.is.most.useful.with.long-duration.simulations.

Max File Index: This.index.sets.the.maximum.number.of.files.that.will.be.written.with.the.current.base.file.name..Once.this.maximum.is.reached,.no.data.logging.is.performed,.not.even.if.the.Save.Current.Data.button.is.clicked.

Reset:... Use.the.Reset.button.to.restart.data.logging,.or.simply.to.reset.the.index.before.the.allowable.maximum.has.been.reached..If.the.base.name.has.not.been.changed.prior.to.a.reset.or.the.files.not.downloaded.to.the.host.computer,.the.existing.files.with.the.same.name.will.be.overwritten.

Auto Increment: Once.checked,.the.file.index.will.be.incremented.after.each.save..Left.unchecked,.the.file.with.the.current.index.number.will.be.overwritten.each.time.a.save.occurs..

Current File Index: It.indicates.the.index.of.the.last.file.written..A.value.of.-1.in.this.field.means.that.no.file.has.been.written.yet.or.that.the.file.index.has.just.been.reset.

File folder: It.is.the.folder.on.the.host.computer.in.which.to.download.the.saved.MAT.files.resident.on.the.target..By.default,.the.File.Folder.is.the.one.containing.the.current.model..



Target Files List:... Lists.all.the.saved.MAT.files.that.are.on.the.target,.for.the.current.simulation..The.Delete,.Download,.and.Abort.buttons.allow.for.list.management.(the.desired.files.can.be.deleted.or.downloaded)..There.is.a.confirmation.message.before.deleting.any.file..There.is.also.a.confirmation.message.if.a.file.might.be.overwritten.by.a.download..If.for.any.reason.a.download.is.too.long,.the.Abort.button.can.be.used.to.cancel.the.process..Press.the.F5.key.to.refresh.the.list.

NOTE: All MAT files generated by the scope on the target during a simulation are deleted the next time the model is loaded.

Host Files List:.. Shows.all.the.downloaded.MAT.files.in.the.current.folder.on.the.host,.for.the.current.simulation..Files.can.be.deleted.or.displayed.in.the.scope.by.selecting.the.desired.file(s).and.pressing.Delete.or.by.selecting.a.single.file.and.pressing.Display..There.is.a.confirmation.message.before.deleting.any.file...When.viewing.a.file,.the.scope.will.be.set.to.File.Mode.and.the.Display.button.will.be.renamed.to.Close;.click.it.to.close.the.currently.displayed.file.and.to.free.memory...To.rename.a.saved.file,.click.to.select.the.file.in.the.list.box.and.type.the.new.name..Press.the.F5.key.to.refresh.the.list.



System Information and Trigger Settings

Figure.61:.System.Information.and.Trigger.Settings.GUI

The.System.Information.and.Trigger.settings.panel.gives.the.user.an.overview.of.the.different.hardware.setup.and.connections..This.panel.also.lets.the.user.define.the.fault.trigger.parameters..Trigger.detection.is.done.by.the.model.and.is.used.to.detect.problems.during.simulation..Each.time.the.“Scope”.Simulink.block.receives.a.trigger.signal,.it.displays.triggered.data.in.the.scope.(except.if.the.Auto.Rearm.option.is.checked),.and.saves.it.to.a.MAT.file.if.Data.logging.is.enabled.

Mezzanine:. These.fields.let.the.user.know.what.types.of.mezzanines.are.connected.on.the.Current.Sensor.Module..The.factory.Current.Sensor.Module.has.an.ADC.in.section.A.and.none.in.section.B.

Bitstream:. These.fields.let.the.user.know.the.version.of.the.bitstream.loaded.on.the.Current.Sensor.Module..

Probe:. These.fields.let.the.user.know.what.types.of.probes.are.connected.on.the.Current.Sensor.Module..See.ID.for.OP5511.probes.for.more.details.on.probe.types.

Hardware Status:. This.LED.shows.if.the.system.is.running.properly.by.checking.that.the.mezzanine.in.section.A.is.an.ADC.(model.OP5340.–.Analog.to.Digital.Card)..If.another.card.is.present.in.section.A,.the.system.is.disabled..This.status.has.been.implemented.to.ensure.that.the.Current.Sensor.Module.runs.the.required.card.for.the.current.sensor.application..Green.indicates.that.everything.is.correct,.red.indicates.a.system.error.

Trigger Mode: There.are.two.possible.options.in.Trigger.Mode Edge:.This.trigger.mode.refers.to.the.Edge.Type.X.set.to.Rising.or.Falling.to.detect.the.fault..In.this.mode,.the.Second.Trigger.settings.are.ignored..Threshold:.This.trigger.mode.uses.the.Operator.and.Time.fields.to.restrict.the.time.range.in.which.the.edge.condition.and.value.of.a.signal.can.cause.a.fault.to.be.triggered..In.this.mode,.both.the.First.and.Second.triggers.are.always.used.

Operator, Time: Period.in.seconds.(Time).used.with.the.Operator.to.restrict.when.the.two.trigger.conditions.will.be.monitored..No.trigger.will.occur.outside.of.this.time.range..Both.settings.are.only.used.in.Threshold.trigger.mode.



First/Second Trigger:The.First.Trigger.and.Second.Trigger.section.offers.the.following.options:.EdgeXSelect:.Sets.the.channel.to.apply.the.trigger.detection.to..EdgeXType:.Sets.the.edge.type.that.the.trigger.should.look.for:.Rising:.The.trigger.will.be.activated.on.the.rising.edge.of.the.plot..Falling:.The.trigger.will.be.activated.on.the.falling.edge.of.the.plot..Either:.The.trigger.will.be.activated.on.either.a.rising.or.falling.edge.of.the.plot..EdgeXLevel:.Sets.the.value.of.the.trigger.

Arm Trigger:. Once.you.have.set.the.trigger.conditions,.use.this.switch.to.enable.trigger.detection.in.the.model..Left.position.is.OFF.and.right.position.is.ON.

Force Trigger: It.makes.a.trigger.occur.even.if.conditions.have.not.been.met..Most.useful.when.you.are.in.Acquisition.mode.and.you.see.something.happening.that.you.want.to.analyze.later.

PreTrigger: Sets.the.percentage.of.buffer.you.want.to.keep.in.memory.(and.file).before.trigger,.when.a.trigger.occurs.



Scope

Figure.62:.Scope.

The.scope.is.a.standard.LabVIEW.Waveform.Graph..In.such,.it.has.the.Cursor,.Zoom.Palette,.and.Hand.Tool.icons.that.can.be.seen.on.the.top.left.corner.of.the.scope.the.Plot.Legend.on.the.top,.the.user-definable.Y-scale.(Amplitude).minimum.and.maximum.on.the.left,.and.the.X-axis.(Time).with.its.scrollbar.on.the.bottom.

The.LabVIEW.Cursor.is.not.used.in.this.GUI,.but.it.can.be.easily.implemented.through.LabVIEW.by.modifying.the.GUI.by.adding.the.Cursor.Legend.

The.Zoom.Palette.gives.the.user.many.means.to.zoom.on.certain.areas.of.the.Waveform.Graph..Note.that.the.Y-Autoscale.affects.the.zoom.settings.on.the.scope.by.changing.them.to.best.fit.the.view.to.the.wave.being.displayed..

The.Hand.Tool.provides.the.user.with.the.ability.to.move.the.Waveform.graph.around.

The.Plot.Legend.can.be.used.to.define.all.the.graph’s.properties.

The.Y-axis.can.be.manually.set.by.double.clicking.on.the.top.most.and.the.bottom.end.values..You.can.enter.specific.values.this.way.

The.X-axis.represents.the.time..You.can.change.the.scale.with.the.X.Scale.selector..The.X-axis’.scrollbar.can.only.be.used.in.Trigger.and.File.mode.when.zoomed..This.way.the.user.can.scroll.through.the.buffered.or.saved.data,.however,.it.is.not.possible.to.scroll.outside.the.buffered.or.saved.data.



Display

Figure.63:.Display.GUI

Arm: ON.when.set.in.the.right.position.and.OFF.when.set.in.the.left.position...Start.the.acquisition.and.display.the.currently.acquired.data.in.the.scope..Disarm.to.pause.display.and.trigger.detection..When.a.fault.trigger.occurs,.the.trigger.is.automatically.disarmed,.and.triggered.data.is.displayed.in.the.scope.

Auto Re-arm: Use.this.option.with.the.Enable.Data.Logging.and.Auto.Increment.options.to.log.data.each.time.a.fault.trigger.occurs.(long-duration.simulations)..When.a.fault.trigger.occurs,.the.trigger.is.automatically.rearmed..With.this.option.enabled,.the.scope.is.constantly.updated.with.latest.acquired.data..

Mode: There.are.4.different.modes:.

Inactive:.Trigger.has.not.been.armed.yet..

Acquisition:.The.scope.is.displaying.currently.acquired.data..

Trigger:.A.fault.trigger.occurred.and.the.scope.is.displaying.triggered.data......(Trigger.is.disarmed)..

File:.The.scope.is.displaying.the.content.of.a.previously.saved.MAT.file.



Display Options: Lossless Mode OFF:.A.simple.decimation.is.applied.to.acquired.data..In.this.mode,.you.see.1.data.of.N,.and.the.value.of.N.depends.on.several.parameters.like.the.scope.width.and.duration..This.mode.uses.less.CPU.resources.than.the.‘lossless’.one,.but.you.miss.a.large.amount.of.data..ON:.A.more.complex.decimation.algorithm.is.applied.to.acquired.data..This.mode.takes.more.CPU.resources.than.the.‘simple’.one,.but.the.scope.displays.exactly.the.same.plot.as.if.all.data.were.acquired.

. Persistent:.The.scope.displays.data.progressively,.from.left.to.right..When.the.right.border.is.reached,.new.data.is.displayed.from.the.left.again..The.persistent.option.makes.new.data.overwrite.old.data;.otherwise.the.scope.is.cleared.between.frames..To.clarify.the.distinction.between.old.and.new.data,.enable.the.Show Mark.option.

. Synchro: This.option.makes.acquired.frames.fit.exactly.in.the.full.scope.width:.new.data.will.not.overwrite.old.data.before.a.complete.frame.has.been.displayed.(see.Persistent)..This.option.is.most.useful.when.the.scope.is.displaying.very.short.frames.(<.200.ms).This.function.is.disabled.

Y-Autoscale: ON:.The.Y-Autoscale.LabVIEW.function.is.applied.to.the.scope..OFF:.Previously.defined.Y.scale.is.used.

Show Mark: In.acquisition.mode,.a.vertical.line.indicates.the.separation.between.old.and.new.data.in.the.scope.(see.Persistent).In.file.and.trigger.mode.,.one.or.two.vertical.lines.(see.Trigger.Mode).are.displayed.to.show.the.trigger(s)..In.all.modes,.if.no.data.can.be.acquired.(for.example,.no.active.channel.is.selected),.a.horizontal.line.is.displayed..These lines are red by default. You can change this by changing the first plot’s properties in the plot legend.

Active Channels: Select.the.traces.you.want.to.be.displayed.in.the.scope..Make.sure.these.traces.are.enabled.(see.Enabled.Channels)..If.not,.they.will.be.set.to.zero.

Performance: FPS Limit:.Frames.per.second.limit..You.can.limit.the.refresh.rate.of.the.scope.to.diminish.CPU.usage..FPS:.Average.number.of.frames.displayed.per.second..The.maximum.value.is.the.FPS.limit.you.set..% CPU:.Percentage.of.the.target’s.CPU.used..This.functionality.is.not.related.to.the.Virtual.Scope,.and.is.implemented.in.the.GUI.

X Scale: Sets.the.window.duration,.i.e..the.duration.of.data.that.is.displayed.in.the.scope.



Display Trigger: Type:.You.can.set.a.‘display.trigger’..It.is.only.used.for.positioning.the.data.within.the.scope.with.respect.to.a.reference.point,.the.time.where.the.trigger.occurs..See.Fault.Trigger.for.more.information.on.triggers..There.are.five.different.triggers:.NONE:.Data.is.displayed.continuously..RISING:.The.reference.point.will.be.a.rising.edge.at.the.set.value..FALLING:.The.reference.point.will.be.a.falling.edge.at.the.set.value..EITHER:.The.reference.point.will.be.a.crossing.of.the.set.value..EXTERN:.Based.on.an.external.signal..See.‘External.Display.Trigger’...Value:.Sets.the.value.of.the.trigger...Channel:.Sets.the.channel.on.which.to.apply.the.trigger.detection.

Window offset: Sets.the.offset.of.displayed.data..You.can.use.the.‘Window.offset’.numeric.control.or.the.scrollbar.below.the.scope..Combined.with.X-.and.Y-scale,.it.allows.you.to.see.any.part.of.data.stored.in.memory.or.in.a.file..Note:.This.function.is.disabled.in.acquisition.mode.

Find trigger: In.Trigger.and.File.Modes.it.is.used.to.center.the.trigger.on.scope..This.button.automatically.sets.the.adapted.Window.offset.


Current Sensor Module.Current.Sensor.Module’s.Configuration.Panel

CURRENT SENSOR MODULE’S CONFIGURATION PANEL

Figure.64:.Current.Sensor.Module’s.Configuration.GUI

This.panel.is.used.to.enable.and.to.calibrate.the.different.acquisitioned.signals.

Enable: Disable.channels.to.reduce.the.target.CPU.consumption.and.the.size.of.the.MAT.files..The.MAT.file.size.is.affected.because.only.enabled.channels.are.stored..Any.disabled.channels.will.be.set.to.zero.if.they.are.displayed.in.the.scope.(see.Active.Channels).

Gain: The.gains.are.multipliers.that.are.used.to.calibrate.the.channels..They.are.usually.used.to.correct.the.probe.induced.deviation..For.example,.the.probe.used.is.a.10x,.the.gain.could.be.set.to.1/10.to.ensure.that.the.value.displayed.on.the.scope.is.the.real.value.

Offset (V):.. These.fields.are.used.to.induce.offset.to.the.channels.to.calibrate.them..It.can.also.be.used.to.superimpose.channels.to.compare.them..They.simply.add.a.set.value.to.the.signal,.hence.providing.a.vertical.translation.


Current Sensor Module.Current.Sensor.Module.SIMULINK.MODEL

CURRENT SENSOR MODULE SIMULINK MODELTD.mdl

‘TD.mdl’.is.a.standard.Simulink.model.provided.with.all.TestDrive.systems..The.model.is.used.to.simulate.ECU.automotive.functions..The.Current.Sensor.Module.is.a.component.of.the.overall.model..The.default.version.of.‘TD.mdl’.supports.one.Current.Sensor.Module.in.the.TestDrive.chassis.(Note:.the.model.may.be.modified.to.support.more.Current.Sensor.Modules).

Current Sensor block

Block.

vMask.

Description

This.block.contains.all.the.vital.systems.that.compose.the.working.Current.Sensor.Module.module..Two.main.blocks.are.used.to.manage.the.module’s.functionalities:

The.Op5130.Ctrl.block.accesses.the.Opal-RT.Active.FPGA.Carrier.Board.(OP5130)..The.on-board.FPGA.can.be.programmed.with.application.specific.bitstreams.to.interact.with.the.specific.card.mounted.onto.it..For.this.reason,.this.block.has.been.locked.to.prevent.any.changes.from.being.made.to.this.model..Changes.can.lead.the.model.to.malfunction..

This.block.controls.through.the.FPGA.the.acquisition.on.the.first.eight.channels.of.the.card,.the.triggering,.and.the.offsets.given.for.calibration..All.the.acquired.data.exits.this.block.as.a.signal.and.can.be.read.regardless.of.the.following.block’s.(the.OpVirtualScope).status,.if.need.be..

The.OpVirtualScope.is.a.functionality.block.that.performs.data.treatment..The.specific.character.of.this.block.enables.it.to.work.without.being.linked.to.a.controller.block.by.controller.name.as.the.other.traditional.functionality.blocks..This.block.functions.by.bypassing.the.RT-Lab.OpComm.acquisition.block..That.particular.way.to.function.permits.the.scope.to.display.more.accurate.data.by.limiting.the.time.spent.communicating.the.information.packages..This.block.also.controls.data.writing.processes.to.be.able.to.save.to.file.the.acquired.data..


Current Sensor Module.Current.Sensor.Module.SIMULINK.MODEL

Parameters

There.are.no.parameters.

Inputs

Current.SensorBus:.This.input.is.a.bus.of.multiple.control.signals..

Outputs

Current.Sensor.Display:.This.output.is.a.bus.of.multiple.signals..It.contains.the.triggers,.the.status,.the.errors,.and.IDs.of.the.different.components.of.the.block..Most.of.the.information.composing.this.signal.is.used.to.know.if.the.module.is.working.properly..

No.acquisitioned.data.can.be.accessed.through.this.signal..These.signals.are.available.under.the.mask.only.

Characteristics and LimitationsConnector Pin Assignments:

Refer.to.“Current.Solver.Module.Pin-outs”.for.pin.assignment.


Current Sensor Module.OpVirtualScope

OPVIRTUALSCOPE

Block.

Mask.

Description

This.function.block.holds.a.C.function..It.is.used.to.manage.multiple.signals.for.the.TestDrive.application.

It.also.links.the.LabVIEW.interface.to.the.RT-Lab.controller.without.the.OpComm.acquisition.tool.of.RT-Lab..This.results.in.many.of.the.controls.found.on.the.LabVIEW.graphical.user.interface.(GUI).not.being.signals.or.parameters.of.the.RT-Lab.simulation.model..This.has.an.impact.on.the.way.to.build.the.model.which.will.differ.considerably.from.other.TestDrive.module.models..

Parameters

ID:.The.id.uniquely.specified.in.the.LabVIEW.GUI.enables.the.binding.between.the.GUI.and.that.particular.block..If.two.acquisition.cards.are.present.on.a.carrier.board,.both.cards’.channels.can.have.their.own.GUI.for.the.user.to.easily.analyze.the.acquisitioned.data..For.this.to.be.possible,.you.will.need.to.have.two.scope.blocks.with.individual.IDs..

Another.possibility.is.to.link.more.than.one.card.to.one.OpVirtualScope.which.connects.to.one.GUI..The.limit.in.this.case.is.that.all.acquired.data.must.be.of.the.same.type.and.have.the.same.number.of.samples.per.step..

It.is.also.possible.to.link.more.than.one.OpVirtualScope.to.a.card..The.limit.in.this.case.is.the.same.as.above:.same.data.type.with.the.same.number.of.samples.per.step..

Note:.A.model.with.two.4-channel.cards.is.slower.than.one.with.a.single.8-channel.card...



Maximum Buffer Size (Seconds):.This.parameter.defines.the.duration.of.all.active.traces.that.are.constantly.buffered..This.is.the.maximum.observable.trace.length..When.in.triggered.mode.this.will.also.be.the.maximum.duration.that.can.be.shown.prior.to.the.trigger.occurrence.

The.buffer.size.can.be.as.big.as.the.system’s.RAM.can.allow.(and.CPU.speed).and.as.small.as.the.step.size..It.is.strongly.recommended.NOT.to.set.the.size.to.the.step.size..

Maximum Scope Width:.This.parameter.is.used.to.set.the.maximum.pixel-width.of.the.scope..

Number of Traces:.This.parameter.is.used.to.give.the.C.function.the.number.of.channels.so.that.the.code.can.demux.the.signals.correctly..

The.smaller.the.number.of.channels,.the.faster.the.communication.will.be.since.less.acquired.data.is.sent.through.the.network..This.gives.the.user.the.possibility.to.reduce.data.loss..It.is.to.be.noted.that.many.other.factors.such.as.the.data.type,.the.number.of.samples.per.step,.the.scope.width,.the.active.channels,.etc..influence.the.communication.speed..So.limiting.the.number.of.traces.might.not.change.the.communication.speed.dramatically.

NOTE: The maximum number of traces that one block can handle is 32, whatever the means of having 32 traces. For example, it could be 4 Current Sensor Modules with 8 traces each or 1 OP5130 with 32 traces.

Input Data Type:.This.option.makes.the.C.function.cast.the.incoming.channels’.data.to.any.Simulink.type..It.is.most.useful.when.the.acquired.data.is.encapsulated.while.being.transferred.from.the.acquisition.card.to.the.Simulink.model.(for.example,.two.16-bit.integers.into.one.32-bit.integer).

This.method.computes.faster.and.uses.less.memory.than.the.Simulink.“conversion”.block..

The.default.value.in.this.field.is.auto.which.means.it.takes.the.Simulink.type.and.does.not.cast.data..

Inputs

Channels:.This.input.is.a.concatenation.of.all.the.samples.of.all.the.traces.into.a.single.1-D.vector..The.data.is.ordered.as.shown.in.the.figure.below,.where.sij.represents.the.jth...sample.of.the.ith.trace.

S00 S01 ... S0N S10 S11 ... S1N SM0 SM1 ... SMN

It.must.be.noted.that.all.traces.must.be.of.the.same.data.type.and.have.the.same.number.of.samples..In.the.example.above,.there.are.N.samples.for.each.of.the.M.traces..

Enables:.. This.input.is.a.uint32..Each.bit.of.this.uint32.is.assigned.to.a.trace..This.input.tells.the.S-Function.which.traces.are.to.be.considered..If.a.trace.is.disabled,.it.will.not.be.considered.when.displaying.data.on.a.fault.trigger.or.when.saving.a..MAT.file...The.first.trace.is.the.first.bit.on.the.right..The.32nd.trace.is.the.first.bit.on.the.left..In.other.words,.the.first.trace.is.the.least.significant.bit.(LSB).and.the.32nd.trace.is.the.most.significant.bit.(MSB)..For.example,.if.the.Number.of.Traces.is.three.and.the.second.trace.is.to.be.disabled,.the.result.will.be.101.in.binary.or.5.in.decimal.numbers..

Arm:.. This.signal.refers.to.the.state.of.the.acquisition.system..If.the.system.is.armed,.this.signal.will.be.at.1.and.0.if.the.system.is.not.armed...When.the.system.is.armed,.it.processes.data.that.can.then.be.displayed.and.it.is.looking.for.a.fault.trigger..If.a.fault.trigger.is.found,.the.system.disarms.(the.user.can.also.manually.disarm.the.system).and.the.S-function.is.disabled..Data.is.no.longer.processed..This.means.that.no.new.data.can.be.displayed.and.no.trigger.can.be.detected.unless.the.system.is.rearmed..

Triggers:.. This.signal.is.a.1-D.vector.containing.the.level.of.the.2.triggers.and.the.number.



of.execution.steps.that.separate.the.two..

The.following.table.shows.the.possible.breakdown.of.the.signals.composing.the.Triggers.input:

First.Signal.Values Forced.Trigger.or.Trigger1.or.-1

Second.Signal.Values Number.of.frames.or.-1

Third.Signal.Values Trigger.2.or.-1

PreTrigger %:.. This.input.is.the.percentage.of.the.display.that.precedes.the.trigger.that.should.be.displayed.and/or.saved..It.gives.the.possibility.to.observe.the.waveform.before.the.fault.trigger.happened.to.improve.analyses..If.the.preTrigger.%.is.set.to.20%,.for.example,.20%.of.the.waveform.displayed.will.be.before.the.point.where.the.fault.trigger.happened.and.80%.after.the.trigger..

Scaling:.. This.is.a.1-D.vector.containing.4.elements:.[a.b.c.d]...The.scaling.function.(aX.+.b)./.(cX.+.d).is.applied.to.the.data.of.all.traces..The.scaling.information.is.also.written.in.the.saved.files..Files.opened.in.the.scope.automatically.use.the.scaling.information.included.in.the.file..It.is.to.be.noted.that.the.data.files.opened.in.MatLab.can’t.use.the.scaling..

External Disp Trigger:.You.can.use.your.own.trigger.detection.for.the.Display.Trigger..This.input.is.very.similar.to.the.first.element.of.the.Fault.Trigger.input:.negative.values.are.ignored;.positive.values.are.interpreted.as.the.index.of.trigger.in.the.input.data.vector.

Outputs

No.outputs


Current Sensor Module.FREQUENTLY.ASKED.QUESTIONS.

FREQUENTLY ASKED QUESTIONS Q: Is it necessary to have an OP5511 to analyze current with the Current Sensor Module?

A:.. Yes.since.the.Current.Sensor.Module.only.evaluates.voltage.differentials..The.OP5511.takes.the.current.in.and.routs.a.voltage.representing.the.current.to.the.Current.Sensor.Module.to.be.analyzed.

Q: Is it necessary to have an OP5511 to analyze voltage with the Current Sensor Module?

A:.. This.is.a.two.part.question:.If.the.voltage.you.need.to.analyze.is.smaller.than.±120V,.you.don’t.need.the.OP5511,.but.you.need.to.add.some.resistors.to.your.Current.Sensor.Module..Refer.to.the.OP5340.user.guide.to.help.in.the.product.modification..If.you.intend.to.input.more.than.the.±120V.possible.with.the.Current.Sensor.Module.for.a.maximum.of.600V,.you.will.need.the.external.module.

Q: Is it necessary to have an OP5511 to analyze current with the Current Sensor Module?

A:.. Yes,.since.the.Current.Sensor.Module.only.evaluates.voltage.differentials..The.OP5511.takes.the.current.in.and.routs.a.voltage.ratio.having.±10V.as.maximum.and.minimum.values.representing.the.current.to.the.Current.Sensor.Module.to.be.analyzed.

Q: Why does the amber LED always flash on Current Sensor Module?

A:.. The.amber.LED.is.an.indicator.that.the.FPGA.is.trying.to.acquire.data.through.the.connectors..Once.the.Current.Sensor.Module.is.powered.and.flashed.with.a.recent.bitstream,.it.tries.to.acquire.data..The.non.stop.flashing.is.a.normal.behavior.of.the.latest.bitstreams.

Q: Can I flash the FPGA on the Current Sensor Module with a new bitstream? If so, how?

A:.. First.step:.copy.the.bitstream.file.on.the.target:

.- Open.a.Windows.Explorer.window

.- In.the.address.box,.type:.ftp//Target_IP_Address/,.then.press.ENTER.

.- The.FTP.logon.window.opens..The.user.name.and..password.are:.ntuser..Fill.both.fields.then.click.the.Log.On.button.

.- Now.copy.the.bitstream.file.onto.the.target.



A:.. Second.step:.flash.the.FPGA:

.- In.the.start.menu,.click.Run…

.- Enter.the.following.text.line.in.the.textbox:.telnet.Target_IP_Address..Click.the.OK.button.

.- A.new.window.opens.asking.you.to.login..Type.root.then.press.ENTER...

You.are.now.logged.on.the.target...- Now.type:.cd./usr/opalrt/common/bin/.then.press.ENTER...

(The.#.character.is.a.default.from..QNX.to.indicate.the..

command.line..It.is.already.there.and.you.must.not.type.it.again!).- You.now.type:../flash_update.then.press.ENTER..You.are.now.in.the.flashing.utility.in.interactive.

mode..- Once.in.the.flashing.utility,.you.must.select.the.card.to.be.reprogrammed..In.this.case,.a.carrier.

board.so.type.3,.and.then.press.ENTER..

.- Now.the.program.asks.for.the.directory.to.look.for.the.new.bitstream..Type./home/ntuser/.followed.by.ENTER.

.-



.- A.bitstream.list.now.appears.on.the.screen..Select.the.desired.bitstream.by.typing.its.referencing.number,.and.press.ENTER..

.- .The.program.now.informs.you.which.card.ID.is.about.to.be.flashed.and.requests.confirmation.to.flash.it,.press.y.for.yes..

.- .The.program.is.now.flashing.the.card..Now.you.must.wait.for.the.process.to.end..Once.this.is.done,.the.card.has.been.flashed..You.may.close.the.window..


Current Sensor Module.Current.Sensor.Module.Applications

Q: What are the manufacturers and part numbers of the different connectors found in this document?

A:.. See.the.table.below:

Ref Manufacturer Man. Part number Description

J1.4-pin Switchcraft TA4FL Q-G.SERIES.CORD.PLUG

J2.25-pin Norcomp 171-025-103L001 CONNECTOR.DB25,.MALE

J2.25-pin Norcomp 970-025-030R121 CONNECTOR.DB25,.HOOD

ELCO.56-pin EDAC 516-056-000-301 CONNECTOR,.PLUG,.ELCO.56.POS

ELCO.56-pin EDAC 516-230-556 CONNECTOR.ELCO56,.METAL.HOOD

ELCO.56-pin EDAC 516-290-520 CONTACT,.SOLDER.EYELET

CURRENT SENSOR MODULE APPLICATIONS

The.Current.Sensor.Module.can.be.used.in.any.situation.where.the.current.or.the.voltage.of.a.system.needs.to.be.monitored..Situations.such.as.signal.stabilizing.issues,.peaks.at.startups,.system.consumption,.etc.,.can.be.easily.observed,.analyzed,.and.stored.for.later.analysis.or.review..The.high.current.and.high.voltage.unit.lets.the.user.analyze.and.monitor.any.circuits.operating.with.600.volts.or.50.amps.as.well.as.small.voltage.circuits.

With.multiple.signal.capacity,.it.is.a.reliable.tool.to.analyze.more.than.one.interacting.system,.for.example,.the.crankshaft’s.position.with.the.injector.pulses.and.other.sensor.values.(ex.:.oxygen.sensor.value).to.calibrate.engines..

.


Current Sensor Module.APPENDIX.I.-.CUSTOMIZING.THE.GUI

APPENDIX I - CUSTOMIZING THE GUI

The.Current.Sensor.Module.GUI.offers.a.particular.and.useful.option:.customizability..Your.own.GUI.can.be.easily.created.with.LabVIEW..This.section.deals.with.the.Virtual.Scope.Manager.VI..This.VI.is.used.in.conjunction.with.the.OpVirtualScope.Simulink.block.

To.see.how.the.Virtual.Scope.Manager’s.VI.can.be.used,.open.a.GUI.in.<TestDriveX.Y.root>\Panels\VirtualScope\GUI\<GUI>.vi..You.need.only.put.the.‘Virtual.Scope.Manager’.in.the.block.diagram.of.your.GUI.and.set.its.I/O.as.follows:

Input: ID

This.ID.is.a.string.that.must.correspond.to.the.‘ID’.parameter.of.the.Simulink.block.

Input: Scope Elements•. Cluster.(typedef).of.references.to.controls.and.indicators.that.are.part.of.the.Display.options.•. Named.typedefs.make.it.easy.to.link.the.correct.control.to.the.correct.input.•. If.you.do.not.link.a.reference,.the.corresponding.functionality.will.not.be.available..See.the.list.of.

Required.Controls.Input: File Management•. Cluster.(typedef).of.references.to.controls.and.indicators.that.are.part.of.the.data.logging.options.•. Named.typedefs.make.it.easy.to.link.the.correct.control.to.the.correct.input.•. If.you.do.not.link.a.reference,.the.corresponding.functionality.will.not.be.available..See.the.list.of.

Required.Controls.Output: WaveForm Graph

Before.you.can.use.your.brand.new.GUI.in.TestDrive,.you.must.first.initialize.your.Waveform.Graph..This.will.allow.the.Virtual.Scope.Manager.to.send.data.to.it..Simply.wire.the.output.of.the.‘VirtualScopeManager’.VI.to.your.Waveform.Graph..Once.connected.(the.graph.icon.should.be.brown),.feel.free.to.remove.the.wire..Do.not.forget.to.save.your.VI.

Required Controls

There.are.a.few.required.controls:

•. A.Waveform.Graph;•. The.Arm.switch.to.enable.data.acquisition;•. An.array.of.Booleans.corresponding.to.the.Active.Channels.


Current Sensor Module.APPENDIX.II.–.BITSTREAM.HISTORY

APPENDIX II – BITSTREAM HISTORY

Here.you.can.find.a.short.history.of.the.bitstreams.used..Each.bitstream.is.paired.with.the.corrections.it.bears.

Bitstream name Related corrections

S17-0024-AC-18-25-21.bin Resolution.of.mezzanine.A.issues.

S17-0024-AC-18-26-21.bin Resolution.of.mezzanine.B.issues.

S17-0024-AC-18-27-21.bin More.resolution.of.mezz..B.issues.plus.the.addition.of.the.flashing.amber.LED..It.flashes.on.a.time.interval.whatever.the.action.done.by.the.card.

S17-0024-AC-18-28-21.bin Added.code.concerning.the.2.mezzanines..Different.code.concerning.the.amber.flashing.LED..The.LED.is.supposed.to.stop.flashing.when.not.acquiring..Added.the.offsets.for.calibration.

S17-0024-AC-18-29-21.bin Other.correction.concerning.the.amber.flashing.LED.and.the.red.LED.which.is.always.a.little.lit.

S17-0024-AC-18-30-21.bin Square.wave.output.added.as.well.as.probe.ID.detection,.all.on.connector.A.

S17-0024-AC-18-31-21.bin Added.the.gains.

S17-0024-AC-18-32-21.bin Removed.square.wave..Added.a.third.digit.to.the.probe.IDs.

S17-0024-AC-18-33-21.bin Recovered.the.square.wave..Changed.the.probe.IDs.to.channels.10.to.15.of.the.ADC..Probe.1.ID.is.channel.10,.11.and.12..(bit.2,.bit.1,.bit.0.respectively).Probe.2.ID.is.channel.13,.14.and.15.(bit.2,.bit.1,.bit.0.respectively)

S17-0024-AC-18-02-21.bin Possibility.of.adjusting.the.simulation.time.step;.the.orange.led.is.now.controlled.inside.the.simulink.model

S17-0024-AC-18-03-21.bin Same.as.S17-0024-AC-18-33-21.bin,.but.the.orange.led.is.now.controlled.inside.the.simulink.model

Table 29: Bitstreams history

.


Current Sensor Module.APPENDIX.III.–.MEZZANINES.AND.CONNECTORS

APPENDIX III – MEZZANINES AND CONNECTORS

Each.mezzanine.placed.on.the.OP6228.has.a.particular.ID.depending.on.its.model..In.the.OP6228.for.current.sensor.applications.the.mezzanine.that.should.be.used.is.an.OP5340.(part.number:.126-0112).and.it.should.be.placed.on.the.section.A..In.Simulink,.the.mezzanine.ID.should.be.1,.which.is.the.ID.hardcoded.in.the.OP5340..For.example.the.card.OP5330.has.the.ID.3.

.

Figure.65:.Current.Sensor.Module.with.OP5340.on.section.A

Below.is.the.picture.of.the.OP6228.with.the.two.DIN.96-pin.connectors.labeled..Each.connector’s.letter.refers.to.the.section.where.the.mezzanine.is.located..(For.the.complete.pin-outs)

.

Connector 1

Connector 1

Figure.66:.Current.Sensor.Module.with.DIN.96-pin.connectors.labeled


Current Sensor Module.APPENDIX.II.–.BITSTREAM.HISTORY

CONTACT

Opal-RT Corporate Headquarters

1751 Richardson, Suite 2525 Montréal, Québec, Canada H3K 1G6 Tel.: 514-935-2323 Toll free: 1-877-935-2323

Technical Services www.opal-rt.com/support

Note:

While every effort has been made to ensure accuracy in this publication, no responsibility can be accepted for errors or omissions. Data may change, as well as legislation, and you are strongly advised to obtain copies of the most recently issued regulations, standards, and guidelines.This publication is not intended to form the basis of a contract.

UG10-31208-TD1

04/2016© Opal-RT Technologies Inc.

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