Abstract

Voltage Controlled Crystal Oscillators (VCXOs) are widely used and well known frequency control products. VCXOs are typically characterized by having wide frequency pulling ranges (greater than ±50ppm). These oscillators are also uncompensated for temperature performance. This means temperature performance of ±20ppm or more is typical over the industrial range of -40 to 85 °C. Trim effect is a skewing of the frequency versus temperature performance of a crystal oscillator as the frequency is pulled (trimmed) away from the oscillator's nominal frequency. Even though unwanted, the degradation of performance from trim effect is something generally accepted as a characteristic of VCXOs. This paper focuses on a method of compensating crystal oscillator temperature and trim effect using a multi-dimensional segmented polynomial array. The inherent trim effect has been reduced from approximately ±11ppm down to ±0.5ppm. This is a 22-fold improvement over the inherent performance. The theory of this compensation method will be discussed, and data showing the results of temperature and trim effect compensation on actual oscillators will be presented.

M-SAC TECHNOLOGY HIGHLIGHTS (MULTI-DIMENSIONAL SEGMENTED ARRAY COMPENSATION )

• Very High Compensation Ratio Capability:

Figure 1: Greater Than 100X Improvement in Temp Stability

• Deterministic Solutions: User-specified curve fit error tolerance

• Adaptable for Multiple Effects Can be used to compensate any effect that can be sensed.

INTRODUCTION

Trim effect is a term given to describe the changes in an oscillator’s frequency versus temperature characteristic resulting from an adjustment to the oscillator’s nominal frequency. It has been observed to degrade temperature stability performance in excess of 10X at adjustment extremes, and can result in non-compliant performance after adjustment for normal crystal aging. It is the result of the non-linear characteristics of the resonator and the variable capacitance diode used to adjust the resonator frequency and exists to varying degrees on all crystal oscillators.

The method presented in this paper describes a novel approach for compensating a wide pull VCXO (>±150 ppm) for temperature stability and stability degradation due to trim effect, as wide pull VCXO’s inherently suffer from these problems. The device utilized for this work was a generic 20 MHz, off-the-shelf VCXO, readily available through distribution.

METHODOLOGY AND OVERVIEW OF M-SAC TECHNOLOGY

The compensation of trim effect requires first that frequency versus temperature slopes at the nominal electrical frequency control (EFC) voltage be reduced as much as possible. This permits accurate characterization of temperature stability across the EFC voltage spectrum, thus optimizing the compensation results achieved.

Figure 1 illustrates the predictions and measured performance for the compensation of temperature stability on the VCXO. The compensation was performed at the nominal EFC voltage with a specified error tolerance of ±100 ppb. The solution achieved a 100X improvement in stability using a seven segment solution incorporating 42 storage elements which was comprised of 2nd, 3rd, and 4th order polynomial functions as indicated in the legend area of the chart.

As demonstrated in Figure 1, the M-SAC method can curve fit virtually any

data set with a very high degree of precision. It works by segmenting a large

number of data points into smaller subsets of contiguous points that can be

curve fit to a user-specified degree of precision using polynomial functions

selected for the order that provides the greatest storage density (the ratio of

the number of data points fit to the number of mathematical elements in the

solution).

Equation (1) illustrates the general form of a polynomial of order n,

where T is the temperature, and the remaining a terms are the coefficients

which are solved using regression techniques.

Figure 2 illustrates the VCXO’s temperature stability performance as

measured over the entire EFC voltage range after compensation at the

nominal EFC voltage. Some stability degradation due to trim effect is evident.

Figure 3 is the same data, only normalized to +25°C so that the stability

degradation is more obvious.

Figure 2: Freq vs Temp vs EFC Voltage (Raw Data)

Figure 3: Freq vs Temp vs EFV Voltage [Normalized]

Equation (2) is a multi-dimensional function designed specifically to fit the complex solution space resulting from the interdependent relationship between EFC voltage and temperature as illustrated in Figure 3,

where v is the EFC voltage, and for every order of (2), a unique temperature-

dependent function, h(T) of the form (3) is included as an additional

coefficient of (2),

where T is temperature. Note: The order of n for equation (3) does not

necessarily have to match the order of n for equation (2), it only has to be of

sufficient order to provide an adequate fit of the data.

The user defined criteria was initially chosen to be 20ppb. This returned a

single segment solution comprising 58 storage elements with a predicted

error of 14 ppb. With 4 segments a solution was achieved using 232

elements which yielded a predicted error of less than 1 ppb. The actual

measured performance resulting from the implementation of the solution is

shown in Figure 4, where the initial peak to peak deviation of 21.08 ppm was

reduced to 0.992 ppm, representing a more than 20X improvement in trim

effect performance.

Figure 4: Freq vs Temp vs EFC—Measured Performance

The differences between the prototype’s actual and predicted

temperature stability performance were ultimately identified as a sensitivity

to variations in thermal rate, or “rate effect”. This sensitivity to thermal rate

results from a lack of co-location and/or thermal coupling between the

resonator and temperature sensor used for compensation. Both of these

factors are simply a consequence of the use of a discrete temperature sensor

in the prototype construction as shown in Figure 5 below and can be

mitigated with either an integrated solution, such as an ASIC or through the

use of chip-scale components assembled on a thermally conductive medium.

Figure 5: VCXO Prototype Board

-15.0

-12.5

-10.0

-7.5

-5.0

-2.5

0.0

2.5

5.0

7.5

10.0

-55 -40 -25 -10 5 20 35 50 65 80 95

dF

(pp

m)

Temp °C

Frequency vs EFC Voltage vs TemperatureCompensated at EFC=1.65V Only [Normalized]

EFC=0.00V

EFC=0.33V

EFC=0.66V

EFC=0.99V

EFC=1.32V

EFC=1.65V

EFC=1.98V

EFC=2.31V

EFC=2.64V

EFC=2.97V

EFC=3.30V

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

-55 -40 -25 -10 5 20 35 50 65 80 95

dF

(pp

m)

Temp °C

Frequency vs EFC Voltage vs TemperatureAfter Compensation for Trim Effect

EFC=0.000V

EFC=0.165V

EFC=0.330V

EFC=0.495V

EFC=0.660V

EFC=0.825V

EFC=0.990V

EFC=1.155V

EFC=1.320V

EFC=1.485V

EFC=1.650V

EFC=1.815V

EFC=1.980

EFC=2.145V

EFC=2.310V

EFC=2.475V

EFC=2.640V

EFC=2.805V

EFC=2.970V

EFC=3.135V

EFC=3.300V

M-SAC IMPLEMENTATION

A block diagram of the hardware configuration used on the M-SAC prototype is shown in Figure 6 below. The “Osc” can be any voltage controlled oscillator, but as previously stated, a 20 MHz, off-the-shelf, wide pull VCXO was used for the work outlined in this document.

Functionally, the microprocessor calculates a digital correction value which is converted to a DC voltage by the DAC and applied to the EFC input of the VCXO. New correction values are calculated and implemented at a rate of about 14 Hz and are derived using real-time measurements of temperature and ADC sampling of the user-supplied EFC voltage. Although not employed on this prototype, software and/or hardware filtering can minimize the phase noise degradation resulting from the application of EFC voltage updates.

The external Memory contains the M-SAC solutions and the program to implement them. It also has sufficient capacity to hold up to 2000 unique storage elements for the M-SAC solutions. Looking forward, the planned reduction to the physical size of the microprocessor and memory needed to support miniaturization will limit the number of storage elements to 500. However, one can see that this is more than adequate, as only 100 elements were needed to achieve the performance presented here where both temperature stability and trim effect were compensated.

CONCLUSIONS

• The M-SAC technology provides a novel approach for compensating electronic oscillators for temperature stability as well as stability degradation resulting from trim effect.

• When used as a curve fitting method, the segmenting nature of this technology has broad application as it permits the curve fit of any data set to a user-defined level of error, up to and including the noise level of the data itself.

• Whether integrated into an ASIC or simply assembled from the individual building blocks, the M-SAC technology is well-suited and easily adaptable for incorporation into systems, or any product or device requiring compensation for environment effects or other measureable stimuli.

Additional R & D Opportunities for Advancing M-SAC Technology:

• Investigate how to improve performance related to thermal rate effect. This could include the use of an integrated temperature sensor or involve the development of a method to compensate the effect entirely.

REFERENCES

[1] Raymond L. Filler et al., “Specification and Measurement of the Frequency Versus Temperature Characteristics of Crystal Oscillators,” 43rd Annual Symposium on Frequency Control, 1989

[2] Esterline, J.C.; , "Trim Effect Compensation using an Artificial Neural Network”, European Frequency and Time Forum & International Frequency Control Symposium (EFTF/IFC), 2013 Joint, Prague, 2013, pp. 963-966.

[3] Ward, K.R.; , "A novel approach to improving the stability of TCVCXO temperature performance," Frequency Control Symposium and PDA Exhibition Jointly with the 17th European Frequency and Time Forum, 2003. Proceedings of the 2003 IEEE International , vol., no., pp. 473- 477, 4-8 May 2003

Figure 6: Hardware Implementation

Temperature and Trim Effect Compensation of a VCXO Using a Multidimensional Segmented Polynomial Array

John Esterline and Alan Snavely

Esterline Research and Design, LLC Shiremanstown, PA USA

•

Temp

Sensor

VCXO