Technical Explanations Revision: 11 SKYPER 42 LJ … · 4.1.1 prim_erroff_select = low ..... 15 4.1.2 prim_erroff_select = high

© by SEMIKRON / 2017-10-17 / Technical Explanation / SKYPER® 42 LJ

PROMGT.1023/ Rev.4/ Template Technical Explanation

Page 1/26

Table of Contents

1. Introduction ............................................................................................................................... 2

2. Application and handling instructions ............................................................................................ 3 2.1 Application example .............................................................................................................. 3 2.2 Mechanical and handling instructions ....................................................................................... 4 2.3 Plug in connection ................................................................................................................. 5 2.4 Solder connection .................................................................................................................. 5

3. Driver interface .......................................................................................................................... 7 3.1 Controller interface – primary side pinning ............................................................................... 7 3.2 Module interface – secondary side pinning ................................................................................ 8 3.3 Power supply – primary ......................................................................................................... 9 3.4 Gate driver signals – primary .................................................................................................. 9 3.5 Error output – primary ......................................................................................................... 10 3.6 Error input – primary ........................................................................................................... 11 3.7 PRIM ERROROFF SELECT mode ............................................................................................. 12 3.8 External error input – secondary ........................................................................................... 13 3.9 Gate resistors - secondary .................................................................................................... 14 3.10 External boost capacitors secondary ...................................................................................... 15

4. Protection features ................................................................................................................... 15 4.1 Failure management ............................................................................................................ 15

4.1.1 PRIM_ERROFF_SELECT = low ......................................................................................... 15 4.1.2 PRIM_ERROFF_SELECT = high ........................................................................................ 17

4.2 Dead time generation (Interlock TOP / BOT ) adjustable .......................................................... 18 4.3 Short pulse suppression ....................................................................................................... 18 4.4 Under voltage protection ...................................................................................................... 19 4.5 Dynamic short circuit protection by VCEsat monitoring ( DSCP ) ............................................... 19 4.6 Active gate clamping ........................................................................................................... 21 4.7 Soft Off .............................................................................................................................. 22

5. Electrical characteristic .............................................................................................................. 22

6. Product Qualification ................................................................................................................. 23

7. Environmental conditions .......................................................................................................... 24

8. Marking ................................................................................................................................... 25

9. Change history ......................................................................................................................... 25

10. Figures, tables and disclaimer .................................................................................................... 26

Technical Explanations

SKYPER®

42 LJ

Revision: 11

Issue date: 2017-10-17

Prepared by: Johannes Krapp

Approved by:

Keyword: Keywords

© by SEMIKRON / 2017-10-17 / Technical Explanation / SKYPER® 42 LJ Page 2/26

1. Introduction

The SKYPER 42 LJ core constitutes an interface between IGBT modules and the controller. This core has

two driver channels which can be used for half bridges or as two independent driver channels. Driving, insulation and protection functions are integrated in the driver. The primary and secondary side circuits are integrated in SEMIKRON’s new ASIC chipset for high reliability. SKYPER 42 LJ R is developed for systems up to 400kW.

• Two output channels

• Fast error management with separated signal/error transformers

• Robust rectangle signal transmission

• Configurable failure management for use in two /three-level inverters

• Adjustable failure and filter management

• Low jitter +/- 2,5ns

• Highest noise immunity with short pulse suppression, EMC cage and robust interface

• Under voltage protection (UVP) primary and secondary

• Dynamic Short Circuit Protection (DSCP) by VCE monitoring and direct switch off

• Secondary failure input for over temperature shut down

• Expandable by external boost capacitors (BC)

• Integrated isolated power supply for the secondary side

• DC bus voltage up to 1200V

• 2,75W output power per channel

• Up to 20 µC gate charge

• MTBF rate > 5 Million hours at full load and 40°C

Figure 1: SKYPER® 42 LJ R

Figure 2: Block diagram of SKYPER® 42 LJ R

Output

Stage

Signal Processing TOP

Error Processing TOP

Error Processing BOT

Signal Processing BOT

Output

Stage

Signal

Buffer

DC/DC

control

Failure

manag.

Primary side

ASIC

Secondary side

ASIC


2. Application and handling instructions

2.1 Application example

X10:10 PWR_15P

X10:09 PWR_15P

X10:03 nERROR_OUT

X10:04 nERROR_IN

X10:05 ERROFF_SLCT

X10:06 FILTER_SLCT

X10:07 TOP_IN

X10:08 BOT_IN

X10:01 PWR_GND

X10:02 INTERLOCK_SLCT

TOP_VCE_IN X100:02

TOP_ON X100:05

TOP_SOFTOFF X100:09

TOP_nERR_IN X100:04

TOP_15P X100:03

TOP_VCE_CFG X100:01

TOP_GND X100:08

TOP_CLAMP X100:07

TOP_8N X100:10

TOP_OFF X100:06

BOT_VCE_IN X200:02

BOT_ON X200:05

BOT_SOFTOFF X200:09

BOT_nERR_IN X200:04

BOT_15P X200:03

BOT_VCE_CFG X200:01

BOT_GND X200:08

BOT_CLAMP X200:07

BOT_8N X200:10

BOT_OFF X200:06

SKYPER42LJAdapter Board

4,7

5kΩ

+15V

10

kΩ

10

kΩ

RG

E

511

RON

ROFF

RSOFF

DC+

DVCE

10

kR

1

CC

FG

RG

E

511

RON

ROFF

RSOFF

DC-

DVCE

10

kR

1

CC

FG

Setting in application example:Primary sideX10:02-GND: 2µs interlockX10:03-X10:04: Bidirectional HaltX10:05-GND: Driver switches both

channels of (no MLI mode)X10:06-High: Digital filter

Secondary sideX100:04-High: Deactivated error input, can be

used for over temperature

X100:07-GND: Deactivated active clamping


2.2 Mechanical and handling instructions

Figure 3: Dimensions – 46 x 55,5 x 19 + Holes – bottom view

Please consider higher tolerances of connector position according to IPC A 610. STEP file on request.

Important

When handling the driver, do not pick up the driver on the long edge side with the transformers (see figure

1). The driver MUST be handled on the PCB side with the short edges (see figure 2).

• For integrating the SKYPER 42 LJ R driver core into an inverter system an adaptor board has to be built. The adapter board builds the interface between the driver core and the IGBT module. The driver can be soldered on the adapter board or plugged into connectors.

• For customer specific adaptor boards please contact your responsible sales for further information. For details please refer to the adapter boards data sheets


Adapter board with DC link measurement and temperature shutdown feature. The adapter board connects three SKYPER 42 LJ R with one SKiM63/93 GD module. SEMIKRON’s adapter boards are sent out without gate resistors or VCE components. These can be modified according to

application requirements. For higher volumes SEMIKRON offers a standard population service of these components. Other adapter board reference designs for SEMiX or SEMITRANS are available on request

Figure 4: Adapter board for SKIM 93

SEMIKRON’s adapter boards for SKYPER 42LJ:

• SKiM 63 GD adapter board: L5063201 (qualified)

• SKiM 93 GD adapter board: L5063901 (qualified)

• SEMIX5 (T)MLI parallel adapter board 45130601 (reference design, not qualified), required contact boards are 45130401 (MLI-1200V), 45125701 (TMLI-1200V), 45128501 (TMLI-1700V)

• SKiM4 (T)MLI adapter board, 45121301-TMLI 1200V, 45120701-MLI 1200V (reference design, not qualified).

2.3 Plug in connection

Using plug connectors for SKYPER 42 LJ R means optimized board layout for spring modules. SEMIKRON recommends using following female connectors:

Description Shape Manufacturer Art. no.

(female) RM2.54 10p SMD 2ROW Suyin 254100GA

When using plug connectors the driver core has to be fixed by a support post:

Figure 5: Support post

Hole for support post


Nylon support post Dual lock Richco DLMSPM-8-01 (>12mm)

2.4 Solder connection

SKYPER 42 LJ R can easily be soldered onto an adaptor board without additional support posts.


Soldering Hints

• The temperature of the solder must not exceed 260°C, and solder time must not exceed 10 seconds.

• The ambient temperature must not exceed the specified maximum storage temperature of the driver.

• The solder joints should be in accordance to IPC A 610 Revision D (or later) - Class 3 (Acceptability of Electronic Assemblies) to ensure an optimal connection between driver core and printed circuit board.

• The driver is not suited for hot air reflow or infrared reflow processes.


3. Driver interface

Figure 6: Pinning of SKYPER 42 LJ Bottom View

3.1 Controller interface – primary side pinning

Table 1: Controller Interface

PIN Signal Function Specification

X10:01 PRIM_PWR_GND Ground To be connected to ground

X10:02 PRIM_ITLCK_SELECT Interlock set up HIGH (VP) = No interlock LOW (GND) = Interlock 2µs

X10:03 PRIM_nERROR_OUT ERROR output LOW = ERR; open collector, RDSON max 30Ω max. 18V / 10mA; reset 30µs

X10:04 PRIM_nERROR_IN ERROR input LOW (GND) = External error

HIGH (VP) = No error

150kΩ impedance/ 15V

X10:05 PRIM_ERROFF_SELEC

T Failure set up LOW (GND) = switch off by driver

HIGH (VP) = error message, no switch off

X10:06 PRIM_FILTER_SELECT Filter time set up LOW (GND) = analog filter HIGH (VP) = digital filter

X10:07 PRIM_TOP_IN Switching signal input (TOP switch)

Digital 15 V/ 0V

LOW = TOP switch off

HIGH = TOP switch on

33kΩ impedance/ 15V

X10:08 PRIM_BOT_IN Switching signal input (BOT switch)

Digital 15 V/ 0V

LOW = BOT switch off

HIGH = BOT switch on

33kΩ impedance/15V

X10:09 PRIM_PWR_15P Drive core power supply Stabilized +15V ±4%

X10:10 PRIM_PWR_15P Drive core power supply Stabilized +15V ±4%


3.2 Module interface – secondary side pinning

Table 2: Module interface

PIN Signal Function Specification

X100:01 SEC_TOP_VCE_CFG Vce reference Input reference voltage adjustment

X100:02 SEC_TOP_VCE_IN Input VCE monitoring External blocking diode necessary

X100:03 SEC_TOP_15P Output power supply Stabilised +15V / max. 10mA External buffer caps can be connected

X100:04 SEC_TOP_ERR_IN External error input 15V logic input; 150kOhm impedance/15V; LOW = ERROR

X100:05 SEC_TOP_IGBT_ON Switch on signal TOP IGBT

X100:06 SEC_TOP_IGBT_OFF Switch off signal TOP IGBT

X100:07 SEC_CLMP_TOP Over voltage TOP High (VP) = active clamp Low (GND) = deactivated

150kOhm impedance/15V

X100:08 SEC_TOP_GND GND for ps and digital signals

Emitter Potential

X100:09 SEC_TOP_IGBT_SOFTOFF

Output of SoftOff output stage

Connection of RSoftOff

X100:10 SEC_TOP_8N Output power supply Stabilised -8V / max. 10mA External buffer caps can be connected

X200:01 SEC_BOT_VCE_CFG Vce reference Input reference voltage adjustment

X200:02 SEC_BOT_VCE_IN Input VCE monitoring External blocking diode necessary

X200:03 SEC_ BOT_15P Output power supply Stabilised +15V / max. 10mA

External buffer caps can be connected

X200:04 SEC_BOT_ERR_IN External error input 15V logic input; 150kOhm impedance/15V; LOW = ERROR

X200:05 SEC_BOT_IGBT_ON Switch on signal BOT IGBT

X200:06 SEC_BOT_IGBT_OFF Switch off signal BOT IGBT

X200:07 SEC_CLMP_BOT Over voltage BOT High (VP) = active clamp Low (GND) = deactivated 150kOhm impedance/15V

X200:08 SEC_ BOT_GND GND for ps and digital signals

Emitter Potential

X200:09 SEC_BOT_IGBT_SOFTOFF

Output of SoftOff output stage

Connection of RSoftOff

X200:10 SEC_BOT_8N Output power supply Stabilised -8V / max. 10mA

External buffer caps can be connected


3.3 Power supply – primary

Requirements of the auxiliary power supply

Power rating of external power supply >15W

The same power supply can be used for SKYPER 32 and SKYPER 42. Do not apply switching signals during

power on reset, otherwise the driver will not leave error state. Buffer for primary side power supply. Please consider that the buffer capacitors on the primary side power supply have to be calculated according to the secondary side buffer capacitors. I.e. 10µF (=2,5µC) as secondary side buffer capacitors requires 10µF buffer capacitance on the 15V supply input.

Figure 7: External buffer capacitors on primary and secondary side

X10:10 PWR_15P

X10:09 PWR_15P

SKYPER42LJAdapter Board

+15V

3.4 Gate driver signals – primary

The inputs are low active and have schmitt trigger characteristic (HIGH = IGBT on; LOW = IGBT off). It is mandatory to use circuits which switch active to +15V and 0V. The duty cycle of the driver can be adjusted between 0 – 100%. It is forbidden to apply switching pulses shorter than 1µs. Depending on the filter setting, shorter pulses will not be transmitted safely.

Figure 8: TOP / BOT Input

A capacitor should be connected to the inputs to obtain high noise immunity. For current limited line drivers this capacitor can cause a neglectable delay of a few ns. The capacitors have to be placed as

close as possible to the driver interface. In addition a series resistor can be added for even higher robustness with the consequence of a longer delay time.

X10:07 TOP_IN

X10:08 BOT_IN

SKYPER42LJ

10

kΩ

10

kΩ


Parameter Min Typ Max

Threshold high - - 10V

Threshold low 5V - -

3.5 Error output – primary

The error output nERROR_OUT is low active and any error will force it into low state. The error state will be active for at least 30µs. For detailed error management please see chapter 4.1.

The pin is an open collector output, that requires an external pull-up-resistor. This gives the opportunity that, when error in- and outputs are connected together, multiple drivers can share one error line. In this case one driver, that enters error mode, directly switches of the parallel drivers (see Figure 10: Example for bidirectional error with two drivers).

Figure 9: Failure output

• The pull up resistor has to be in the range of VP / Imax < Rpull_up < 10kΩ.

• The output is reset when TOP/BOT signals are

set to low for tpERRRESET > 9µs

• nERROR_OUT can operate to maximum 18V and can switch a maximum of 10mA.

• Important: A pull up resistor must be used!

X10:03 nERROR_OUTR SKYPER42LJ

X10:01 PWR_GND

HALT

C1nF

VS


Sink Current - - 10mA

Voltage @10mA and error active - - 0,3V


3.6 Error input – primary

The nERROR_IN pin allows external deactivation of the driver i.e. by connecting a monitoring circuit. The pin can also be connected to nERROR_OUT to have a bidirectional error (=HALT).

Figure 10: Example for bidirectional error with two drivers


Threshold high - - 11 V

Threshold low 7,5 V - -


3.7 PRIM ERROROFF SELECT mode

The error behavior of the driver can be changed via pin MLI_SLCT.

PRIM_ERROROFF_SELECT = low (default) The driver switches off on any error and indicates the error state at nERROR_OUT. PRIM_ERROROFF_SELECT = high (MLI mode) In case of an external error or short circuit the driver will not switch off. In that cases the error state is

only indicated at nERROR_OUT and the customer has to switch off the driver. Nevertheless if an under voltage condition happens on the primary side the driver switches off. If MLI mode is detected, the other switch cannot be switched on again.



Threshold low 7,5 V - -

When switching MLI the drivers have to be set the following way: - One driver for T1 and T4 (two outer switches) - One driver for T2 and T3 (two inner switches) - VCE monitoring of T2 and T3 deactivated - Active clamping for T1 and T4

Other possibilities is to have the active clamping on all switches and using one driver for T1/2 and one

driver for T2 and T3

Figure 11: Concept for MLI applications

DC+

DC-

T1

T2

T3

T4

Load

+15V

SKYPER42LJ - 1

511

RON

ROFF

RSOFF

RON

ROFF

RSOFF

RCLMP

511

RCLMP

SKYPER42LJ - 2

DVCE

DVCE

RON

ROFF

RSOFF

X10:05 ERROFF_SLCT X10:05 ERROFF_SLCT

511DVCE

RON

ROFF

RSOFF

511DVCE


3.8 External error input – secondary

Each secondary side of the driver can handle an external error event like over temperature or overcurrent that is signalized via the TOP_nERR_In/ BOT_nERR_IN inputs. The error events are evaluated and isolated

transmitted to the primary side.

Figure 12: External failure input on secondary side

• The inputs are active low

• The error inputs can be disabled by connecting them to VP

SKYPER42LJ

VP

TOP_nERR_IN X100:04

TOP_15P X100:03

TOP_8N X100:10

30

,1k

15,0k

VN

VP

TOP_GND X100:08

-

+3

0,1

k

30

,1k

VP VP

1,0nF

100nF 33

2R

VNVN

1,0µF

VN

NTC

Threshold modification

Example for a NTC overtemperature circuit, on the TOP secondary side, using the external error input



Threshold low 2 V - -


3.9 Gate resistors - secondary

The turn-on and turn-off speed of each IGBT can be set by the external resistors RON and ROFF. Gate resistors should be surge proof. The MELF and Mini-MELF resistors in the table below are

recommended.


MELF resistors MELF / MiniMELF SMD Vishay Beyschlag, Vishay Draloric, Vitrohm

PRO MELF resistors, SMM0207, SMM 0204, ZC series

The values of the gate resistors depends on the IGBT chip. To specify the optimum value the maximum overvoltage during switch off has to be checked regarding DC link voltage and the dI/dt during switch on.

Figure 13: Gate Resistor

• By increasing RGon the turn-on speed will decrease. The reverse peak current of the free-wheeling diode will diminish.

• By increasing RGoff the turn-off speed of the

IGBT will decrease. The inductive peak over voltage during turn-off will diminish.

• In order to ensure locking of the IGBT even when the driver supply voltage is turned off, a resistance (RGE) between gate and emitter has to be integrated.

• The value of gate resistors will be between the

value indicated in the IGBT data sheet and roughly twice this value.

User Side

SEC_BOT_IGBT_ON

SEC_TOP_IGBT_ON

SEC_TOP_GND

SEC_TOP_GND

SEC_BOT_GND

SEC_BOT_GND

SEC_TOP_IGBT_OFF

SEC_BOT_IGBT_OFF

RGon

RGoff

RGE

RGon

RGoff

RGE

Load

TOP

BOT

10K

10K


3.10 External boost capacitors secondary

The rated gate charge of the driver can be increased by adding boost capacitors to the supply rails to drive IGBTs with a large gate capacitance.

Figure 14: Boost capacitors

Connection External Boost Capacitors Dimensioning of Cboost

• SKYPER 42 LJ R has internal capacitors to charge gate capacitance up to 2,5 µC

• External capacitors can be calculated the

following way:

𝐶𝑏𝑜𝑜𝑠𝑡 = 4µ𝐹

µ𝐶∙ 𝑄𝑂𝑢𝑡 − 10µ𝐹

• The maximum rating for output charge per

pulse of the gate driver has to be considered.

• The boost capacitors have to be mirrored to the primary side. Further all boost capacitors should have the same value: 𝐶𝑏𝑜𝑜𝑠𝑡𝑃𝑟𝑖𝑚 = 𝐶𝑏𝑜𝑜𝑠𝑡15𝑃 = 𝐶𝑏𝑜𝑜𝑠𝑡8𝑁

• The external boost capacitors should be connected as close as possible to the gate driver to achieve low inductance.

Examples for boost capacitors:

AVX 12103C106K_Z2A

TOP_15P X100:03

TOP_GND X100:08

Adaptor board

TOP_8N X100:10

Cboost15P

Cboost8N

BOT_15P X200:03

BOT_GND X200:08

BOT_8N X200:10

Cboost15P

Cboost8N

X10:10 PWR_15P

X10:09 PWR_15P

X10:01 PWR_GND

CboostPrim

4. Protection features

4.1 Failure management

The SKYPER 42 LJ detects undervoltage on primary and secondary side, short circuit of the IGBTs and overtemperature conditions. Any error detected will force the output nERROR_OUT to low state and has to be reset by the customer controller. The following failures are indicated at the error output:

• Undervoltage of primary side supply voltage • Undervoltage of secondary side voltages • Short circuit of the IGBTs • External errors (e.g. overtemperature, overvoltage …)

4.1.1 PRIM_ERROFF_SELECT = low

When entering error state the IGBTs will be switched off (IGBT driving signals are set to VN). Active switching signals at the inputs of the driver will be ignored. Nonetheless the input signals have to be set to low for 9µs to confirm the error. The driver is reset after 30µs with the following conditions:

No error root cause for 30µs (Reaction on customer side has to be done within that time)

Switching inputs low for 9µs


•

Figure 15: Behavior on error event in default mode -> PRIM_ERROFF_SELECT = low

t

t

Any error(not nERROR_IN)

30 µs

t

TOP_IN

BOT_IN

9 µs

t

nERROR_OUT

t

TOP_OFF

t

BOT_OFF

On error event the driver switches off=> VGE is negative

Error state is over:- No error for more than 30µs- No switching signals for at least 9µs

Switching signals are accepted again

Error indication example 1


4.1.2 PRIM_ERROFF_SELECT = high

The driver detects a short circuit, indicates the error on nERROR_OUT but does not switch off by itself. The

next external Off-pulse will be done via the SoftOff output stage, so the driver will switch off with the SoftOff resistor and the driver will lock until reset. After reset like in 4.1.1, the driver can be switched again. Connection of primary side error input and output has no influence. When the error output is connected to another driver with PRIM_ERROFF_SELECT = low, the other driver is switched off, not reverse.

Figure 16: Behavior on error event in MLI-mode -> MLI_SLCT = high

t

t

Any error(not nERROR_IN)

30 µs

t

TOP_IN

BOT_IN

9 µs

t

nERROR_OUT

t

TOP_OFF

t

BOT_OFF

On error event the driver only indicates the error

Error state is over:- No error for more than 30µs- No switching signals for at least 9µs

Switching signals are accepted again

Driver switches off when customer switching

signals get low

Further switching pulses are ignored

Error indication example 2


4.2 Dead time generation (Interlock TOP / BOT ) adjustable

The internal dead time of SKYPER 42LJ can be adjusted between 2µs and deactivated mode.

Deadtime activated: The deadtime function prevents in two level mode, that TOP- and BOT-IGBT of one

half bridge are switched on at the same time (shoot through). The dead time is not added to a dead time given by the controller. It is possible to control the driver with one switching signal and its inverted signal. No error signal will be generated when signals are overlapped.

Controller dead time SKYPER dead time Total dead time

Controller > driver 4µs 2µs 4µs

Controller < driver 1µs 2µs 2µs

Controller no dead time No dead time 2µs 2µs

Driver no dead time 2µs No dead time 2µs

Deadtime deactivated: When deadtime is deactivated the two IGBTs can be switched independent from each other. In this mode the two channels even can be switched on at the same time. Further the routing to TOP and BOT-IGBT is no longer relevant and can be interchanged. Important: When deadtime function is deactivated a shoot through is not prevented reliably.

4.3 Short pulse suppression

This driver functionality suppresses short on- and off-pulses on the switching signal inputs. This way the IGBTs are protected against electromagnetic noise. The filter time can be set by the customer via the FILTER_SLCT pin. When using the digital filter the tolerances are very low over the full temperature range. The analogue setting can be chosen for ambitious applications, like magnetic resonance imaging, which require very low jitter values below 2ns. The propagation delay times depend on the filter setting.

Figure 17: Pulse pattern - SPS

Signal Function Specification

FILTER_SELECT = HIGH Digital filter Filter time: 375ns Delay time: 800ns Jitter: 30ns

FILTER_SELECT = LOW Analog filter Filter time: 200ns Delay time: 600ns

Jitter: 2,5ns



Threshold low 1 V - -


4.4 Under voltage protection

If the power supply drops below a negative threshold level the driver switches the IGBTs off and indicates an error on Pin X10:03. After passing the positive threshold, the driver can operate again.


Threshold negative 12,6V - -

Threshold positive - - 13,7V

The driver monitors the primary side and the secondary side under voltage condition.

4.5 Dynamic short circuit protection by VCEsat monitoring ( DSCP )

The dynamic short circuit monitor supervises the collector-emitter voltage VCE of the IGBT during its on-state. The protection circuit is called dynamic, because immediately after turn-on of the IGBT, a higher value is effective than in steady state. When an error is detected the affected IGBT will be turned off via

soft turn off. When MLI mode is deactivated this will happen immediately after error is reported, if MLI mode is activated this will happen with the next switch off command soft on the input interface.

Figure 18: Application design for the VCE monitoring (example for TOP secondary side)

VCE

VCE-Error

Skyper 42 LJ

IGBT-On

E

C

TOP_VCE_IN X100:02

TOP_15P X100:03

TOP_VCE_CFG X100:01

VP VP

R1

R2 CCFG

RV

CV

-

+

10

k5

k

VP


In off-state the pin VCE_CFG is pulled to VP=> The external capacitor CCFG is charged and has the same

potential as VP.

After switch on the internal pull-up transistor is deactivated and the reference voltage (VCEref) at the input VCE_CFG is defined by the external voltage divider (R1 and R2). The capacitor ensures that the reference voltage does not sink below the VCE

voltage (VCE_IN) during a standard switch on process.

The maximum reference voltage is 9,5V which is related to the VCE comparator.

The blanking time tBlank describes the duration from start of the switch on process to the point of time when VCE_CFG crosses the 10V threshold.

After tBlank has passed, the VCE monitoring will be triggered as soon as VCE_IN > VCE_CFG and will turn off the IGBT.

The voltage on VCE_IN is equal to the VCE voltage in addition to the breakdown voltage of the high voltage diode DVCE. The voltage at VCE_IN is limited to 10V, by the internal voltage divider. As long as the

VCE voltage is higher than 10V the diode blocks it.

The voltage drop of the high voltage diode is not considered in the formula. Application hints: CConfig <1nF

R1+RCONF >10 kΩ For disabling the DSCP SEC_TOP/BOT_VCE_IN must

be connected with SEC_TOP/BOT_GND.

𝑉𝐶𝐸𝑆𝑡𝑎𝑡 = 𝑉𝑃

𝑅2

𝑅1 + 𝑅2

𝑡𝐵𝑙𝑎𝑛𝑘 = −𝐶𝐶𝐹𝐺 ∙𝑅1 ∙ 𝑅2

𝑅1 + 𝑅2∙ ln (

10𝑉𝑉𝑃

(𝑅1 + 𝑅2) − 𝑅2

𝑅1)

Due to tolerances of the formula please cross check the final VCE setting with the measured values below:

R1 Rconf CConf RV VCEthreshold (V) tpulse_gate (µs)*

30,1 KΩ 10 330 511 1,6 V 2,6 µs

15 330 511 3,1 V 3,7 µs

22,1 330 511 4,6 V 5,3 µs

33,2 330 511 6,5 V 8,6 µs

47,5 330 511 8,0 V 15,6 µs

10 220 511 1,6 1,9 µs

10 330 511 1,6 2,5 µs

10 470 511 1,6 3,1 µs

10 560 511 1,6 3,5 µs

10 680 511 1,6 3,9 µs

10 820 511 1,6 4,8 µs

10 1000 511 1,6 5,8 µs

10 1200 511 1,6 6,6 µs

* tpulse_gate= tblank + delay time and tolerances

5

10

15

V

t

VCEstat

VCEsat

VCEref

VCE

turn on instant

0

tbl


4.6 Active gate clamping

Figure 19: Application example for active clamping

VCE

Skyper 12 R

DV

RV

E

C

RCLMP

ROFF

VZener

DClmp

IGBT-Off&

VClmp

TOP_8N X100:10

TOP_GND X100:08

TOP_OFF X100:06

TOP_CLMP X100:07

The driver offers the possibility of reducing over voltages during switching. The voltage level where the clamping starts is set by the breakdown voltage of the component with zener characteristic e.g.

DClmp. If, during a switch off Vce raises beyond VZener the clamping diodes get conductive. This current switches the gate on again until the VCE voltage is

reduced below the VZener reference. Important: During the clamping process the

IGBT is working in linear mode and is producing additional losses coming from the energy stored in the stray inductance. So active clamping must not work during standard switching to avoid thermal overstress and reduced IGBT lifetime. It should only be used

in case of error. The CLMP input indicates the driver that the clamping is active so the driver output stage can be deactivated and losses on the driver can be reduced. The resistors RCLMP and RV have to be set, so that the input voltage on the clamping input raises above

the threshold (13V) during active clamping. Also

consider the internal pull-down resistor for the dimensioning.

VP

t

VGate

GND

VN

VCE

VZENER

VDCLink


Threshold high CLMP-input - - 13 V

Threshold low CLMP-input 2 V - -

SKYPER42LJ


4.7 Soft Off

In the event of short circuit, the SoftOff feature increases the resistance in series with RGoff and slows down the turn-off speed of the IGBT. The reduced di/dt reduces the voltage spike above the collector emitter in

the short circuit case. The soft turn-off time can be adjusted by connection of an external resistor RSoftOff.

Connection SEC_TOP_IGBT_SOFTOFF

Usually the SoftOff resistor are 10 times as high as the standard off resistor but the right value has to be evaluated in the system. Target is to stay within the short circuit proofed time of the IGBT but at the same time reduce the overvoltage below the maximum collector emitter voltage of the IGBT.

5. Electrical characteristic

Figure 20: Maximum switching frequency @ different gate charges @ Tamb=25°C

GE

AV

Q

Ioutf max

max

fmax: Maximum switching frequency * IoutAVmax: Maximum output average current QGE: Gate charge of the driven IGBT

* @ Tamb=25°C


6. Product Qualification

For drive applications, the following tables and diagrams can be used as a first indication (Fig. 3.1 – Fig.

3.11).

Routine Tests

test test category test description Standard

AOI Automated

Opt. Inspection

Control of accurate placement of

components/ of solder joints, 100%

SEMIKRON

ICT In-Circuit Test Test of the populated PCB, checking the correctly fabrication, 100%

SEMIKRON

FAT Function Test Supply current, gate on/off, UVP, error, 100%

SEMIKRON

Approval Tests

test test category test description1 Standard

EP Electrical Parameters amb = -40°C / +85°C SEMIKRON

ST STEP Test 20x 10µs to 2s interruption EN61000-4-29

ISO Isolation 5,0 kV AC rms, 60s EN50178

TC Thermal Cycling 1000 cycles a 1h, Tstgmax – Tstgmin IEC60068-2-14

TH Temperature Humidity 85°C, 85% RH, 1000h IEC 60068-2-67

TS High/Low Temp Storage 105°C/1000h; -40°C/1000h IEC 60068-2-2/1

BST Burst Power terminals: 4kV; Control terminals: 4kV EN61000-4-4

CC Climate Change -15°C to 85°C; 10% to 85%; 10 cycles a 8h EN 60068-2-30

HT High Temp Operation 95°C, 500h, full load SEMIKRON

ESD ESD Contact discharge: 6kV; Air discharge: 8kV EN61000-4-2

RFF Radio Frequency 80 MHz – 2,7GHz, 30 V/m, 80% AM 1kHz EN61000-4-3

RFD RF Conducted Disturbance 150 kHz - 80 MHz, 20 V/m, v+h, 80 % AM 1kHz

EN61000-4-6

VB Vibration Sinus 20/2000Hz Random 10/2000Hz, 5g, 26 per x,y,z

IEC 60068-2-6

SH Shock Half-sinus pulse, 30g, 6000 shocks, 6ms, ±x, ± y, ± z

IEC 60068-2-27

1 The test conditions are not the maximum applicable conditions for the products. The characteristics of the products are indicated in the

data sheet


7. Environmental conditions

Table 3: Conditions

Insulation parameters Rating

Grid voltage (grounded delta) 690V

Climatic Classification Pollution Degree (PD) PD2

Maximum altitude (above sea level) 2000 meter above sea

Overvoltage category (according to EN50178) OVC 3

Isolation resistance test, Prim-Sec 4000 V AC rms,60s

Rated insulation voltage (EN60664-1) 8 kV Cat. III

Creepage/clearance distance primary/secondary side 12,2mm

Creepage/clearance distance secondary secondary 6,1mm

Climate class 3K3 – IEC 60721-3-3

Environmental Condition Norm / Standard

Operating/storage temperature -40.. +85 °C

High humidity 85 °C, 85%

Flammability UL94 V0 Heavy flammable materials only

RoHS / WEEE / China RoHS

EMC Condition Norm / Standard Parameter

ESD DIN EN 61000-4-2

DIN EN 61800-3

6 kV contact discharge /

8 kV air discharge

Burst DIN EN 61000-4-4 DIN EN 61800-3

≥ 2kV on adaptor board for signal lines

Immunity against external interference

DIN EN 61000-4-3 DIN EN 61800-3

≥ 30V/m 30MHz – 1000 MHz

Immunity against conducted interference

DIN EN 61000-4-3 DIN EN 61800-3

≥ 20V 150kHz – 80MHz

Shock Vibration

Vibration Sinusoidal 20Hz … 500Hz, 5g, 2h per axis (x, y, z) Random 20Hz … 2000Hz, 5g, 2 h per axis (x, y, z)

Shock 1000 Shocks (6 axis; +-x, +-y, +-z, 1000 shocks per axis), 30g, 18ms Connection between driver and PCB has to be reinforced by support

post


8. Marking

Figure 21: Label

Every driver core is marked with a data matrix label. The marking contains the following items.

9. Change history

Revision Date Changes

00-01 2011-10-11 Initial draft

02 2012-03-15 Update data sheet, application hints

03 2012-05-15 Differences sample to series

04 2012-09-21 Removal cover, update data sheet, details sample/series

05 2013-09-30 Update primary side ASIC features

06 2014-04-02 Update error management, label

07 2014-07-28 Timing error management

08 2014-09-17 Change to status series release

09 2017-03-07 Update error diagram, Vce values, clamping

10 2017-09-13 Update creepage/ clearance

11 2017-10-17 Update handling instruction


10. Figures, tables and disclaimer

Figure 1: SKYPER® 42 LJ R .............................................................................................................. 2 Figure 2: Block diagram of SKYPER® 42 LJ R ....................................................................................... 2 Figure 3: Dimensions – 46 x 55,5 x 19 + Holes – bottom view .............................................................. 4 Figure 4: Adapter board for SKIM 93 .................................................................................................. 5 Figure 5: Support post ..................................................................................................................... 5 Figure 6: Pinning of SKYPER 42 LJ Bottom View ................................................................................... 7 Figure 7: External buffer capacitors on primary and secondary side ....................................................... 9 Figure 8: TOP / BOT Input ................................................................................................................ 9 Figure 9: Failure output .................................................................................................................. 10 Figure 10: Example for bidirectional error with two drivers.................................................................. 11 Figure 11: Concept for MLI applications ............................................................................................ 12 Figure 12: External failure input on secondary side ............................................................................ 13 Figure 13: Gate Resistor ................................................................................................................. 14 Figure 14: Boost capacitors ............................................................................................................. 15 Figure 15: Behavior on error event in default mode -> PRIM_ERROFF_SELECT = low ............................. 16 Figure 16: Behavior on error event in MLI-mode -> MLI_SLCT = high ................................................. 17 Figure 17: Pulse pattern - SPS ........................................................................................................ 18 Figure 18: Application design for the VCE monitoring (example for TOP secondary side) .......................... 19 Figure 19: Application example for active clamping ............................................................................ 21 Figure 20: Maximum switching frequency @ different gate charges @ Tamb=25°C ................................ 22 Figure 21: Label ............................................................................................................................ 25 Table 1: Controller Interface ............................................................................................................. 7 Table 2: Module interface ................................................................................................................. 8 Table 3: Conditions ........................................................................................................................ 24

REFERENCES

[1] www.SEMIKRON.com [2] A. Wintrich, U. Nicolai, W. Tursky, T. Reimann, “Application Manual Power Semiconductors”,

ISLE Verlag 2011, ISBN 978-3-938843-666

HISTORY

SEMIKRON reserves the right to make changes without further notice herein

DISCLAIMER

SEMIKRON reserves the right to make changes without further notice herein to improve reliability, function

or design. Information furnished in this document is believed to be accurate and reliable. However, no representation or warranty is given and no liability is assumed with respect to the accuracy or use of such information, including without limitation, warranties of non-infringement of intellectual property rights of any third party. SEMIKRON does not assume any liability arising out of the application or use of any product or circuit described herein. Furthermore, this technical information may not be considered as an assurance of component characteristics. No warranty or guarantee expressed or implied is made regarding delivery, performance or suitability. This document supersedes and replaces all information previously

supplied and may be superseded by updates without further notice. SEMIKRON products are not authorized for use in life support appliances and systems without the express written approval by SEMIKRON.

SEMIKRON INTERNATIONAL GmbH P.O. Box 820251 • 90253 Nuremberg • Germany

Tel: +49 911-65 59-234 • Fax: +49 911-65 59-262 [email protected] • www.semikron.com

Documents

Technical Explanations Revision: 11 SKYPER 42 LJ … · 4.1.1 prim_erroff_select = low ..... 15 4.1.2 prim_erroff_select = high