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TDMA Harmonization Agreements
EADS, EF Johnson, & M/A-COM Report to the Project 25 Steering Committee, APIC, and User
Needs
April 27, 2007Dallas, TX
Executive Summary• Development of detailed harmonized
TDMA solution completed• The proposed solution does not require
linear hardware in the SUs• The harmonization supporters agree this is
a viable design that meets all Phase 1 requirements
• The harmonization supporters are ready to proceed contingent upon approval
TDMA 12 kb/s HARMONIZED DESIGN
2
Steering Committee Actions
• In 2006, the P25 Steering Committee took several actions to facilitate the development of TDMA standards for Project 25 “Phase 2”
• Two important motions have been passed by the Steering Committee– Half-Rate Vocoder Motion January 2006– Phase 2 TDMA Motion October 2006
TDMA 12 kb/s HARMONIZED DESIGN
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Vocoder Motion Review• Half-rate Vocoder Motion• The Steering Committee hereby states that it is
willing to support use of the enhanced half-rate IMBE vocoder as outlined in the Vocoder Task Group report when it is part of a harmonized 2-slot TDMA in 12.5 kHz bandwidth and/or 4-slot TDMA in 25 kHz bandwidth proposal for Phase II that is capable of providing voice quality, radio coverage, and other performance that is comparable to that provided by a Project 25 Phase I system
TDMA 12 kb/s HARMONIZED DESIGN
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Steering Committee MotionMinneapolis – Oct 2006
• Motion:• The Steering Committee will not consider any action on
Steering Committee acceptance of a Phase 2, TDMA solution at this meeting. This reflects the progress that has been made on a preliminary design through the TDMA working group.
• The Steering Committee expects, however, a design agreement, a technical design solution, a documentation plan, and proposed schedule to be presented at the January 2007 meeting in Mesa, Arizona. The Steering Committee will not consider further extensions to acceptance of a Phase 2, TDMA direction from the TDMA Working Group past the January 2007 meeting.
TDMA 12 kb/s HARMONIZED DESIGN
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Steering Committee MotionMesa – Jan 2007
– RESOLVED, that the Project 25 Steering Committee supports, accepts, and approves the harmonized TDMA “preliminary harmonized 2-slot TDMA design –technical solution.” completed to date, and be it further
– RESOLVED, that the Project 25 Steering Committee will carefully consider all new submissions regarding outstanding Phase 2, TDMA Task Group and “preliminary harmonized 2-slot TDMA design – technical solution.” issues as may be outstanding with DVSI, the TDMA Task Group or the Vocoder Task Group, and be it further
– RESOLVED, that the Project 25 Steering Committee is expecting all outstanding “preliminary harmonized 2-slot TDMA design – technical solution.” issues to be resolved by April 27, 2007, be it further…
The harmonization supporters note the TDMA TG was unable to reach full consensus as evidenced in the polls taken on April 19 (conf call) and April 24 (Dallas Meeting) and thus understand the issue is referred to the P25 Steering Committee.
07-012 - TDMA - (SC) Phase 2 Motion to Proceed
TDMA 12 kb/s HARMONIZED DESIGN
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Motions Summary• The issue of proposal selection (9.6 vs 12 kb/s)
is now referred to the Steering Committee
• For the 12 kb/s harmonization supporters to be able to proceed on a Phase 2 TDMA solution, the Steering Committee must consider the adoption of the enhanced ½ rate IMBE vocoderto support the TDMA Phase 2 effort.– Gating item to design and documentation start
• The harmonization supporters respectfully ask APIC, UNS, and the Steering Committee to approve the proposed harmonized design that follows in this presentation.
TDMA 12 kb/s HARMONIZED DESIGN
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Harmonized Design Overview
TDMA 12 kb/s HARMONIZED DESIGN
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High Level Design Agreements (1)• 12 kbps air link rate for 2 slot TDMA• Modulation
– H-DQPSK for downlink (outbound)– H-CPM for uplink (inbound)
• Dual Rate Vocoder• 30 msec slot size• Concentrated signaling
– Dedicated signaling burst per superframe– Inverted (position) to allow SU’s to switch and listen
when transmitting (bidirectional)TDMA 12 kb/s HARMONIZED
DESIGN9
High Level Design Agreements (2)
• FDMA Control Channel– With TDMA extensions
• TDMA Voice Channels– TDMA Voice Channels not synchronized to
FDMA Control Channel
TDMA 12 kb/s HARMONIZED DESIGN
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High Level Design Agreements (3)• ISCH – Interslot Signaling Channel
– Located on Downlink only between each slot (burst) to convey critical info to SUs
– Used for sync– Used for signaling
• 6 bits for signaling with very robust FEC• TDMA channel # - 1, 2 (proposal allows for 4 slot
channels 3 & 4)• Signal for SU to access next signaling slot TBD• Access control for channel busy, available, etc.
TDMA 12 kb/s HARMONIZED DESIGN
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High Level Design Agreements (4)
• Frame Structure (but not ISCH)– 4V 4V 2V+s 4V 4V S– 4v = 4 voice frames– 2V+s = 2 voice frames + in-channel signaling– S = inverted signaling slot for bi-directional
signaling• Interleaving over 1 voice frame
– Per recommendation from DVSI
TDMA 12 kb/s HARMONIZED DESIGN
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High Level Design Agreements (5)• Synchronization Summary
– Location of sync in IB sync bursts – Big S slot
– Location of sync in OB bursts• center of certain Big S bursts• ISCH sync (assists late entry)
IB Sync
Proposed 44 bits (includes 8 pilot bits)
TDMA 12 kb/s HARMONIZED DESIGN
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Important Options
Address critical performance questions if necessary
Delay Spread Option• The proposal accommodates optional
modulation mode to address long delay spread requirements
• Phy Layer Option: H-D8PSK modulation at 12 kbps. – symbol time increases, and the simulcast
delay spread increases– exceeds the simulcast stretch goal
• 170 us for 5% BER (goal is 95 us)
TDMA 12 kb/s HARMONIZED DESIGN
15Ref: 07-050 - TDMA - (MA-COM) Harmonized Simulcast Option v05
Delay Spread Option (con’t)
• Bit rate is unchanged. – Average energy per bit is unchanged.
• Receiver bandwidth remains narrow for best adjacent channel protection.
• Adjacent channel rejection spec for C4FM interference remains unchanged.
• Increased BER to make the same DAQ
TDMA 12 kb/s HARMONIZED DESIGN
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Vocoder Options• The 12 kb/s harmonized proposal can
accommodate the baseline and enhanced FR vocoders– Standard - 3.6 EHR vocoder with strong MAC layer
performance– 4.4 EHR vocoder option with stronger FEC and
reduced MAC layer– 4.4 EFR e2e interop mode with a compatible vocoder
with some FEC and the reduced MAC layer• Provides fundamental migration support with Phase 1
TDMA 12 kb/s HARMONIZED DESIGN
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Options Summary
• The harmonized 12 kb/s proposal has the capabilities to allow viable options to provide:– Significantly improve delay spread over
Phase 1 with LSM with optional H-D8PSK modulation
– Basic e2e interoperability with Phase 1 with use of baseline FR or EFR vocoders
TDMA 12 kb/s HARMONIZED DESIGN
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Preliminary Harmonized 2-Slot TDMA Design
Technical Solution
Phase 1 Comparisons Considerations for 4-Slot
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA ATTRIBUTES
• Chart Legend
AGREEMENT *
IN PROGRESS
NO AGREEMENT
* Reflects agreement of the harmonized 12 kb/s proposal supporters
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - ModulationModulation Technique
H-CPM - 12 kbpsNon-linear ULw/o equalizer
H-DQPSK - 12 kbpsLinear DL
Designed to meet 700 MHz requirements
Comments
Perf #
Advantage
Disadvantage
Apply to 4-Slot?
See PHY table description
See PHY table description Adj channel pwr& FCC specs
are being examined
Does not require linear amplifiers
Easy demodulation in the radios; exceeds the spec; close to the design goal
Meets 700 MHz requirements per current analyses
Requires more complex base station
demodulation
Requires linear amplifiersbase stations only
Adj channel performance
related to amplifier
linearization
Yes24 kb/s
Yes Technique applies but perf
is reduced
TDMA 12 kb/s HARMONIZED DESIGN
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Initial 9.6 kbps FDMA CC• C4FM (Uplink/Downlink for initial FDMA Phase 2 control channels)
– Raised Cosine transmit frequency pulse filter with BW=4.8 kHz, α=.2 cascaded with a 1/sinc(πf/4800) shaping filter, h=1/4
– IF filter ENBW = 6 +/- .5 kHz– Differential phase detection receiver with equalizer possible
• DQPSK (Proposed modulations used for simulcast downlink for initial FDMA Phase 2 control channels and Phase 1)– IQ Filter
• 1– Gaussian transmit pulse shape filter with 3dB corner at
2040Hz, cascaded with a low pass filter with 3dB corner at 6200Hz
– IF filter ENBW = 6 +/- .5 kHz• 2
– RC filter BW=3.6 kHz α=1– IF filter ENBW = 6 +/- .5 kHz
– Differential phase detection receiver with equalizer possible
Initial control channels are 9.6 kbps FDMA with future migration to 12 kbps TDMATDMA 12 kb/s HARMONIZED
DESIGN22
Phase 2 12 kbps TDMA Modulation Descriptions (CC & TC)
• 2-slot H-CPM (Proposed uplink modulation)– H-CPM transmit frequency pulse filter, λ=.75, h=1/3– IF filter ENBW = 6 +/- .5 kHz– Viterbi MLSE based coherent receiver
• H-DQPSK (Proposed downlink modulation)– Raised Cosine Transmit pulse shape filter with
BW=3.6 kHz , α=1– IF filter ENBW = 6 +/- .5 kHz– Differential phase detection receiver possibly with
equalizer
TDMA 12 kb/s HARMONIZED DESIGN
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Simulation/Measured Estimates for Phase 2 PHY SummaryPHY Characteristic 9.6 kbps C4FM
CC9.6 kbps DQPSK
Downlink CC12 kbps 2-slot H-CPM
Uplink TC or CC12 kbps H-DQPSKDownlink TC or CC
9.6
0
-118.3+/-.5
-113 +/- .5
- 113 +/- .5
6+/-.5
63 +/- 3
-41 +/- .5
-69.5 +/-.5
55 +/- 5
1212
0
-119.2 +/- .5
5% Faded Sensitivity (dBm) ~10 Hz Doppler NF=10 dB -114 +/- .5 -112.5 +/- .5 -113.7 +/- .5
5% Faded Sensitivity (dBm) ~80 Hz Doppler NF=10 dB -114 +/- .5 -111.2 +/- .5 -113.5 +/- .5
IF ENBW (kHz) 6+/-.5 6+/-.5 6+/-.5
ACRR (dB) Using standard INT PAT
63 +/- 3 63 +/- 3 63 +/- 3
ACP (dB) Per 700 MHz Rules w/PN511 -41 +/- .5 -41.5 +/- .5 -41 +/- .5
ACP (dB) 12.5 kHz Offsetw/PN511 (No Phase Noise)
-70 +/- 3 -70 +/-.5 -70 +/- 3
Delay Spread (µsec –5%BER) 95 +/- 5 60 +/- 5
2.5 +/- .5
-119.1 +/- .5
95 +/- 15
Bit Rate (kbps) 9.6
P/A Ratio (dB) 3 +/- .5
5% Static Sensitivity (dBm)NF=10 dB
- 119.5+/-.5
TDMA 12 kb/s HARMONIZED DESIGN
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• Radio sensitivity specs remain same as Phase 1• -116 dB 5% BER static -108 dBm 5% BER faded
TDMA Attribute - VocoderVocoder Phase 2 - Harmonized Phase 1
Standard Half Rate IMBE Full Rate IMBE
Performance
Comments
Apply to 4-Slot?
Equivalent or better than Enhanced Half Rate (EHR) tested in ’03/’04
• Statistically equivalent to the Full Rate IMBE
• Enables constant envelope modulation for Phase 2 uplink
• Dual rate capability for Phase 1 interoperability
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute – Frame & SlotSuperframe &
Slot SizePhase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
30 ms Slots360 ms Superframe
360 ms Superframe
• Bi-Directional signaling capability
• Inverted slot 1 and slot 2 Big S to allow bi-directional signaling
Yes – does not require inverted signaling slot; 360 ms superframe
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - CCHControl Channel
Phase 2 - Harmonized Phase 1
Perf #
AdvantageDisadvantage
Apply to 4-Slot?
FDMAEquivalent and compatible to
Phase 1
FDMA
Building block for migration to Phase 2 systems and enables
operation of mixed systems
Yes – proposal capable
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute – CCH ModeControl
Channel ModePhase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
Single slot control channel mode to allow single frequency sites
Composite mode
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute – Data & OTARDATA & OTAR Phase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
FDMAEquivalent and compatible with
Phase 1
FDMA
• Data not included in “Scope 1” of Phase 2 development
• Protocol capable of single slot data and OTAR
Yes – proposal capable
TDMA 12 kb/s HARMONIZED DESIGN
29
TDMA Attribute – NAC EquivNAC Equivalent (Co-
ChannelInterference Protection)
Scrambling Phase 112 Bit NAC
Perf #
Comments
Apply to 4-Slot?
• Continuous protection• All bits except sync, ISCH, DUID, & some parts of CCH
Every 180 ms IB & OB
protects against co-channel interference and unintended reception without requiring
additional bits
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - DUIDDUID Phase 2 - Harmonized Phase 1
4 bits + scheduling (e.g. PD, LDU1, LDU2,
etc.)
Perf #
Comments
Apply to 4-Slot?
60 msIn each slot (slot 1 or slot 2)
180 ms
• 8 bits total• 2 or 3 bits + FEC• burst scheduling (4V, 2V+s, S
with and without scrambling• 1/4 rate protection proposed
• 4 bits included in NAC field
• 1/4 rate protection
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - SyncSync Phase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
Outbound – 2 sets of 40 bits every 120 msec
Inbound – 44 bits every 360 msec
48 bits every 180 ms
IB & OB
As compared to Phase 1:More frequent sync on OBLess frequent sync on IB
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - Signaling
TDMA 12 kb/s HARMONIZED DESIGN
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Signaling Phase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
Concentrated signaling slots• S contains LC signaling info• Interslot signaling (ISCH)• 2V+s contains ESW
Distributed over superframe
• Entire burst dedicated to signaling
• One burst per superframe that shares voice and e-sync (2V+s)
Yes
TDMA Attribute – Link ControlLC Information Phase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
• OB – 316 bits available every 360 msec for LC and FEC
• IB – 290 bits every 360 msec for LC and FEC when the radio is allowed to Tx in “S”
72 bits every 360 msFEC 168 bits
rate 0.3IB & OB
• Room for more bits (FEC); possibly double the rate by using both “S”
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - ISCHISCH
Inter-Slot ChannelPhase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
OB only – 40 bits every 30 ms2 out of 4 are sync proposed
Two sets of 40 bits every 120 ms available for signaling
(6 info bits + protection)
N/A
Two types – one for sync and one for slot assignment info
Yes(Bits allotted to allow 4-slot
assignment)
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute - ESWESW Phase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
• IB and OB – 96 bits every 360 msec (“s”)
• Progressive error correction decoding up to 264 bits
96 bits Every 360 msFEC 144 bits
rate 0.4IB & OB
• Improved performance vs Phase 1
Yes
TDMA 12 kb/s HARMONIZED DESIGN
36
TDMA Attribute – Interleave DepthInterleave
DepthPhase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
Interleave depth of 1 or 2 voice frames
½ rate IMBE6 or 12 ms
1 voice frame full rate IMBE
15 ms
The TDMA TG has contacted DVSI and the TG has agreed to
await the recommendation of interleave depth per DVSI
Yes(Bits allotted to allow 4-slot
assignment)
TDMA 12 kb/s HARMONIZED DESIGN
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TDMA Attribute – Ramp & GuardRAMP &
GUARD TIMEPhase 2 - Harmonized Phase 1
Perf #
Comments
Apply to 4-Slot?
Investigating 2 ms(1.2 ms ramp; 0.8 ms guard)
Ramp and guard of 4.58
ms for 37.5 ms slots
• Designed for ease of subscriber unit burst acquisition (hardware issue)
• Design for longer propagation times for coverage (system design issue)
Allocation for Phase 1 CCH
bursts
Yes
TDMA 12 kb/s HARMONIZED DESIGN
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Documentation Plan
TDMA 12 kb/s HARMONIZED DESIGN
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Documentation• (1) Scope of TDMA documents (TDMA TG)• (2) TDMA Overview• (3) Trunking additions
– Trunking Procedures – changes?• Note: Message trunking linked to phy layer
– Trunking Messages – changes?• Encryption – new docs or mods (ETG)• (1) Vocoder (VTG & DVSI)
– Half Rate annex to enable dual rate capability– Conformance test impacts?
• ISSI impacts ?
TDMA 12 kb/s HARMONIZED DESIGN
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Documentation• (2) Common Air Interface Physical Layer
– (2a) Logical Channel Structure– (2b) MAC– (2c) LLC (for data)– (2d) CAI Application Layer (LCW formats – edits to Ph
1 trunking formats STG/TR8.10)• (3) CAI Measurement Methods• (4) CAI Performance Recommendations• (5) CAI Conformance• (6) CAI Interoperability (CAPPTG)
TDMA 12 kb/s HARMONIZED DESIGN
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Proposed Schedule
TDMA 12 kb/s HARMONIZED DESIGN
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Resources
• Available• No foreseen impact to ISSI efforts• No foreseen impact to Phase 1 Compliance and
Performance work• No foreseen impact to ETG and TR8.3 work
(FPIC Key Management Recommendations)• No foreseen impact to SoR or 102 Cleanup work• SoR new features work will have impact
TDMA 12 kb/s HARMONIZED DESIGN
43
Schedule (1)
Document1 2 3 4 5 6 7 8 9 10 11 12
TDMA Phase 2 ScopeTDMA OverviewCAI Physical LayerTrunking AdditionsCAI Measurement MethodsCAI Performance RecommendationsCAI ConformanceCAI InteroperabilityVocoder (dual rate)Encryption updates
MONTHS
NOTE1: milestones are predicated on consensus
NOTE2: Schedule item end points denote anticipated submission toAPIC, Steering Committee, UNS, and TR8
NOTE3: TR8 to consider publication
TDMA 12 kb/s HARMONIZED DESIGN
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Schedule (2)
Document13 14 15 16 17 18 19 20 21 22 23 24
TDMA Phase 2 ScopeTDMA OverviewCAI Physical LayerTrunking AdditionsCAI Measurement MethodsCAI Performance RecommendationsCAI ConformanceCAI InteroperabilityVocoder (dual rate)Encryption updates
MONTHS
NOTE1: milestones are predicated on consensus
NOTE2: Schedule item end points denote anticipated submission toAPIC, Steering Committee, UNS, and TR8
NOTE3: TR8 to consider publication
TDMA 12 kb/s HARMONIZED DESIGN
45
Summary• Development of detailed framework for a
harmonized TDMA solution completed
• Harmonization supporters agree the proposed design and options are viable
• The stakeholders have the resources and are ready to proceed pending approval of the proposed preliminary design by APIC, UNS, and the Project 25 Steering Committee.
TDMA 12 kb/s HARMONIZED DESIGN
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Summary - Options
• The harmonized 12 kb/s proposal has the capability to allow viable options to provide:
– Significantly improved delay spread over Phase 1 with LSM with optional H-D8PSK modulation
– Basic e2e interoperability with Phase 1 with use of baseline FR or EFR vocoders
TDMA 12 kb/s HARMONIZED DESIGN
47
Steering Committee Request
• A harmonized TDMA Design is presented
• The supporters ask APIC, UNS, and the Steering Committee for approval of the proposed harmonized design
• The TDMA TG asks the Steering Committee to enable the use of the Half Rate Vocoder
TDMA 12 kb/s HARMONIZED DESIGN
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Thank You!
Questions?
TDMA 12 kb/s HARMONIZED DESIGN
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