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7/22/2019 Tabel Lengkap Mikrokontroler AT89 ATMEl
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Nama
Andy Sardyanto 0 s/d 24 00 H s/d 18 H
Alvian Guntur 25 s/d 50 19 H s/d 32 H
Dendy B 51 s/d 76 33 H s/d 4C H
Febry N.H 77 s/d 102 4D H s/d 66 H
Irmawan P 103 s/d 127 67 H s/d 7F H
Akhwan 128 s/d 152 80 H s/d 98 HAngga Setiawan 153 s/d 178 99 H s/d B2 H
P. Butar 179 s/d 204 B3 H s/d CC H
Abdul Azis 205 s/d 230 CD H s/d E6 H
Novel 231 s/d 255 E7 H s/d FF H
Desimal Hexadesimal
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
0 0000 0000 00 NOP - - --- 1
1 0000 0001 01 AJMP Addr11 Code addr (PC)(PC)+2
(PC10-0)page address2
2 0000 0010 02 LJMP Addr16 Code addr (PC)addr 15-0 3
3 0000 0011 03 RR A A
(An)(An + 1) n=0-6
(A7)(A0) 1
4 0000 0100 04 INC A A (A)(A)+1 1
5 0000 '0101 05 INC direct Data addr (direct)(direct)+1 2
6 0000 0110 06 INC @Ri @R0 ((R0))((R0))+1 1
7 0000 0111 07 INC @Ri @R1 ((Ri))((Ri))+1 1
8 0000 1000 08 INC Rn R0 (R0)(R0)+1 1
9 0000 1001 09 INC Rn R1 (R1)(R1)+1 1
(OPCODE-nya)
(OPERAND-nya)OPERATION CODE
M'NEMONIC CODE
OPERASI
(simbolik) BYTES
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10 0000 1010 0A INC Rn R2 (R2)(R2)+1 1
11 0000 1011 0B INC Rn R3 (R3)(R3)+1 1
12 0000 1100 0C INC Rn R4 (R4)(R4)+1 1
13 0000 1101 0D INC Rn R5 (R5)(R5)+1 1
14 0000 1110 0E INC Rn R6 (R6)(R6)+1 1
15 0000 1111 0F INC Rn R7 (R7)(R7)+1 1
16 0001 0000 10 JBC bit,relBit addr,code
addr
(PC)(PC)+3
If (bit)=1
then
(bit)0
(PC)(PC)+rel
3
17 0001 0001 11 ACALL Addr11 Code addr
(PC)(PC)+2
(SP)(SP)+1
((SP))(PC7-0)
(SP)(SP)+1
((Sp))(PC15-8)
(PC10-0)page address
2
18 0001 0010 12 LCALL Addr16 Code addr
(PC)(PC)+3
(SP)(SP)+1
((SP))(PC7-0)
(SP)(SP)+1
((Sp))(PC15-8)
(PC)addr15-0
3
19 0001 0011 13 RRC A A
(An)(An+1) n=0-6
(A7)( C )(C)(A0)1
20 0001 0100 14 DEC Rn A (A)(A)-1 1
21 0001 0101 15 DEC Rn data addr (direct)(direct)-1 2
22 0001 0110 16 DEC Rn code addr [(R0)][(R0)]-1 1
23 0001 0111 17 DEC Rn code addr [(R1)][(R1)]-1 1
24 0001 1000 18 DEC Rn code addr (R0)(R0)-1 1
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
R
C OV AC (Operand-1) (Operand-2) (Operand-3)
1 ---Program
branchingNo operation
12 addr 11Program
branching
Absolut jump
addr 11
132 addr 16Program
branching
Long jump
addr 16
1 Register Logical
operation
Rotate
accumulatorRight
1 X X X Register Arithmetic
operationIncrement acc
12 X X X directArithmetic
operation
Increment
direct byte
1 X X Xindirect-
register
Arithmetic
operation
Increment
direct RAM
1 X X Xindirect-
register
Arithmetic
operation
Increment
direct RAM
1 X X X register Arithmetic
operation
Increment
register 0
1 X X X register Arithmetic
operation
Increment
register 1
ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS
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1 X X X register Arithmetic
operation
Increment
register 2
1 X X X register Arithmetic
operation
Increment
register 3
1 X X X register Arithmetic
operation
Increment
register 4
1 X X X register Arithmetic
operation
Increment
register 5
1 X X X register Arithmetic
operation
Increment
register 6
1 X X X register Arithmetic
operation
Increment
register 7
123 bit rellative
Bolean
variable
manipulation
Jump if direct
Bit is set &
clear bit
12 addr 11Program
branching
Absolute
Subroutin Call
123 addr 16Program
branching
Long
Subroutine Call
1 X register
Logical
operation
Rotate
Accumulator
Right Throughthe carry
1 X X X register Arithmetic
operation
Decrement
Accumulator
12 X X X directArithmetic
operation
Decrement
direct
1 X X XIndirect-
register
Arithmetic
operation
Decrement
indirect RAM
1 X X XIndirect-
register
Arithmetic
operation
Decrement
indirect RAM
1 X X X register Arithmetic
operation
Decrement
register 0
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
0000 0000 12 1 No operation
a10 a9 a8 0 0 0 0 1
a7 a6 a5 a4 a3 a2 a1 a024 2 Absolut jump
0 0 0 0 0 0 1 0
addr15-addr8 addr7-addr024 12 Long jump
0 0 0 0 0 0 1 1 12 1Rotate
accumulator Right
0 0 0 0 0 1 0 0 12 1 Increment
0 0 0 0 0 1 0 1 12 1 Increment
0 0 0 0 0 1 1 0 12 1 Increment
0 0 0 0 0 1 1 1 12 1 Increment
0 0 0 0 1 0 0 0 12 1 Increment
0 0 0 0 1 0 0 1 12 1 Increment
FUNGSIENCODING OSC. CYCLES
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0 0 0 0 1 0 1 0 12 1 Increment
0 0 0 0 1 0 1 1 12 1 Increment
0 0 0 0 1 1 0 0 12 1 Increment
0 0 0 0 1 1 0 1 12 1 Increment
0 0 0 0 1 1 1 0 12 1 Increment
0 0 0 0 1 1 1 1 12 1 Increment
0 0 0 1 0 0 0 0
bit address rel address24 2
Jump if direct Bit is
set & clear bit
a10 a9 a8 1 0001
a7 a6 a5 a4 a3 a2 a1 a0 24 2Absolute Call
subroutin
0 0 0 1 0 0 1 0
addr15-addr8 addr7-addr024 2
Long Subroutine
Call
0 0 0 1 0 0 1 1 12 1
Rotate
Accumulator RightThrough the carry
0 0 0 1 0 1 0 0 12 1 Decrement
0 0 0 1 0 1 0 1 12 1 Decrement
0 0 0 1 0 1 1 0 12 1 Decrement
0 0 0 1 1 1 1 1 12 1 Decrement
0 0 0 1 1 0 0 0 12 1 Decrement
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
Execution continuous at the following instrucsion.Other than PC no register
and flag are affected.
AJMP transfer progaram execution to indicated address,wich is formed at
run-time by concatenating the high order five bits of the PC(after
incrementing The PC twice)
Long Jump causes unconditional branch to the indicated address,by loading
the high order and low order bytes of the PC(respectively)with the second
snd third instrucsion bytes.The destination may therefore be anywhere in the
full 64K program memory address space.
The eight bits in the Accumultor are rotated one bit to the right.Bit 0 is rotated
into the bit 7 position.No flag are affected
Increment Accumulator by 1
Direct increment Accumulator by 1
Indirect increment register RAM 0 by 1
Indirect increment register RAM 1 by 1
Increment register 0 by 1
Increment register 1 by 1
CATATAN
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Increment register 2 by 1
Increment register 3 by 1
Increment register 4 by 1
Increment register 5 by 1
Increment register 6 by 1
Increment register 7 by 1
If the indicated bit is one,JBC branches to the address indicated,otherwise,it
proceeds with the next instrucsion.The bit will not be cleared if it is already a
zero.
ACALL unconditionally calls a subroutine located at the indicated address
LCALL calls a subroutin located at the indicated address.The instrucsion
adds three to the program counter to generate the address of the nex
instrucsion and then pushes the 16 bit result onto the stack(low byte
first)incrementing the stack pointer by two.
The eight bits in the Accumultor and the carry flag are together rotated one
bit to the right.
Decrement register Accumulator by 1
Direct decrement the variable indicated by 1
Indirect decrement RAM 0 by 1
Indirect decrement RAM 1 by 1
Indirect decrement RAM 0 by 1
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
25 0001 1001 19 DEC Rn R1 (R1)(R1)-1 1
26 0001 1010 1A DEC Rn R2 (R2)(R2)-1 1
27 0001 1011 1B DEC Rn R3 (R3)(R3)-1 1
28 0001 1100 1C DEC Rn R4 (R4)(R4)-1 1
29 0001 1101 1D DEC Rn R5 (R5)(R5)-1 1
30 0001 1110 1E DEC Rn R6 (R6)(R6)-1 1
31 0001 1111 1F DEC Rn R7 (R6)(R7)-1 1
32 0010 0000 20 JB bit,relbit addr,code
addr
(PC)(PC)+3
if (bit)=1 then
(PC)(PC)+rel
3
33 0010 0001 21 AJMP addr11 code addr
(PC)(PC)+2
(PC10-0)page aaddress 2
34 0010 0010 22 RET --- ---
(PC15-8)((SP))
(SP)(SP)-1
(PC7-0)((SP))
(SP)(SP)-1
1
OPERATION CODEM'NEMONIC CODE
OPERASI
(simbolik) BYTES(OPCODE-nya)
(OPERAND-nya)
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35 0010 0011 23 RL A A(An+1)(An) n = 0-6
(A0)(A7)1
36 0010 0100 24 ADD A,#data A,#data (A)(A)+#data 2
37 0010 0101 25 ADD A,direct A,data addr (A)(A)+(direct) 2
38 0010 0110 26 ADD A,@Ri A,@R0 (A)(A)+((R0)) 1
39 0010 0111 27 ADD A,@Ri A,@R1 (A)(A)+((R1)) 1
40 0010 1000 28 ADD A,Rn A,R0 (A)(A)+(R0) 1
41 0010 1001 29 ADD A,Rn A,R1 (A)(A)+(R1) 1
42 0010 1010 2A ADD A,Rn A,R2 (A)(A)+(R2) 1
43 0010 1011 2B ADD A,Rn A,R3 (A)(A)+(R3) 1
44 0010 1100 2C ADD A,Rn A,R4 (A)(A)+(R4) 1
45 0010 1101 2D ADD A,Rn A,R5 (A)(A)+(R5) 1
46 0010 1110 2E ADD A,Rn A,R6 (A)(A)+(R6) 1
47 0010 1111 2F ADD A,Rn A,R7 (A)(A)+(R7) 1
48 0011 0000 30 JNB bit,relbit addr,code
addr
(PC)(PC)+3
if (bit)=0 then
(PC)(PC)+rel
3
49 0011 0001 31 ACALL addr11 code addr
(PC)(PC)+2
(SP)(SP)+1
((SP))(PC7-0)
(SP)(SP)+1
((SP))(PC15-8)
(PC10-0)page address
2
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50 0011 0010 32 RETI --- ---
(PC15-8)((SP))
(SP)(SP)-1
(PC7-0)((SP))
(SP)(SP)-1
1
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
R
C OV AC (Operand-1) (Operand-2) (Operand-3)
1 X X X register Arithmetic
Operations
Decrement
Register 1
1 X X X register Arithmetic
Operations
Decrement
Register 2
1 X X X register Arithmetic
Operations
Decrement
Register 3
1 X X X register Arithmetic
Operations
Decrement
Register 4
1 X X X register Arithmetic
Operations
Decrement
Register 5
1 X X X register ArithmeticOperations
DecrementRegister 6
1 X X X register Arithmetic
Operations
Decrement
Register 7
132 X X X bit relative
Boolean
Variable
Manipulation
Jump if direct
Bit is set
12 X X X addr
Program
Branching Absolute Jump
1 X X X ---Program
Branching
Return from
Subroutine
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
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1 X X X register Logical
Operation
Rotate
Accumulator
Left
12 X X X register immediateArithmetic
Operations
Add immediate
data to
Accumulator
12 X X X register direct ArithmeticOperations
Add direct byteto Accumulator
1 X X X register indirect-
register
Arithmetic
Operations
Add indirect
RAM to
Accumulator
1 X X X register indirect-
register
Arithmetic
Operations
Add indirect
RAM to
Accumulator
1 X X X register register Arithmetic
Operations
Add Register 0
to Accumulator
1 X X X register register ArithmeticOperations Add Register 1to Accumulator
1 X X X register register Arithmetic
Operations
Add Register 2
to Accumulator
1 X X X register register Arithmetic
Operations
Add Register 3
to Accumulator
1 X X X register register Arithmetic
Operations
Add Register 4
to Accumulator
1 X X X register register
Arithmetic
Operations
Add Register 5
to Accumulator
1 X X X register register Arithmetic
Operations
Add Register 6
to Accumulator
1 X X X register register Arithmetic
Operations
Add Register 7
to Accumulator
132 X X X bit relative
Boolean
Variable
Manipulation
Jump if direct
Bit is Not set
12 X X Xlong-
address
Program
Branching
Absolute
Subroutine Call
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1 X X X ---Program
Branching
Return from
interrupt
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
0 0 0 1 1 0 0 1 12 1 Decrement
0 0 0 1 1 0 1 0 12 1 Decrement
0 0 0 1 1 0 1 1 12 1 Decrement
0 0 0 1 1 1 0 0 12 1 Decrement
0 0 0 1 1 1 0 1 12 1 Decrement
0 0 0 1 1 1 1 0 12 1 Decrement
0 0 0 1 1 1 1 1 12 1 Decrement
0 0 1 0 0 0 0 0 , bit addr , rel addr 24 2 Jump if Bit set
a10 a9 a8 0 0 0 0 1 , a7 a6 a5 a4 a3 a2 a1 a0 24 2 Absolute Jump
0 0 1 0 0 0 1 0 24 2Return from
Subroutine
FUNGSIENCODING OSC. CYCLES
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0 0 1 0 0 0 1 1 12 1Rotate
Accumulator left
0 0 1 0 0 1 0 0 , immediate data 12 1 Add
0 0 1 0 0 1 0 1 , direct address 12 1 Add
0 0 1 0 0 1 1 0 12 1 Add
0 0 1 0 0 1 1 1 12 1 Add
0 0 1 0 1 0 0 0 12 1 Add
0 0 1 0 1 0 0 1 12 1 Add
0 0 1 0 1 0 1 0 12 1 Add
0 0 1 0 1 0 1 1 12 1 Add
0 0 1 0 1 1 0 0 12 1 Add
0 0 1 0 1 1 0 1 12 1 Add
0 0 1 0 1 1 1 0 12 1 Add
0 0 1 0 1 1 1 1 12 1 Add
0 0 1 1 0 0 0 0 , bit addr , rel addr 24 2 Jump if Bit Not set
a10 a9 a8 1 0 0 0 1 , a7 a6 a5 a4 a3 a2 a1 a0 24 2 Absolute Call
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0 0 1 1 0 0 1 0 24 2Return from
interrupt
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
Substracts one from Register 1
Substracts one from Register 2
Substracts one from Register 3
Substracts one from Register 4
Substracts one from Register 5
Substracts one from Register 6
Substracts one from Register 7
If the indicated bit is one, JB jump to the addres indicated; otherwise, it
proceeds with the next instruction. The branch destination is computed by
adding the signed relative-displacement in the third instruction byte to the
PC, after incrementing the PC to the first byte of the next instruction. The bit
tested is not modified.
AJMP transfers program execution to the indicated address, which is formed
at run time by concatenating the high-order five bits of the PC (after
incrementing the PC twice), opcode bits 7 through 5, and the second byte ofthe instruction. The destination must threfore be within the same 2 K block of
program memory as the first byte of the instruction following AJMP
RET pops the high and low-order of the PC successively from the stack,
decrementing the Stack Pointer by two. Program execution continues at the
resulting address, generally the instruction immediately following an ACALL
or LCALL
CATATAN
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The eight bits in the Accumulator are rotated one bit to the left. Bit 7 is
rotated into the bit 0 position
The value of Immediate data is added to Accumulator
The value of Direct byte is added to Accumulator
The value of Indirect Register 0 is added to Accumulator
The value of Indirect Register 1 is added to Accumulator
The value of Register 0 is added to Accumulator
The value of Register 1 is added to Accumulator
The value of Register 2 is added to Accumulator
The value of Register 3 is added to Accumulator
The value of Register 4 is added to Accumulator
The value of Register 5 is added to Accumulator
The value of Register 6 is added to Accumulator
The value of Register 7 is added to Accumulator
If the indicated bit is a 0, JNB branches to the indicated address; otherwise,
it proceeds with the next instruction. The branch destination is computed by
adding the signed relative-displacement in the third instruction byte to the
PC, after incrementing the PC to the first byte of the next instruction. The bit
tested is not modified
ACALL unconditionally calls a subroutine located at the indicated address.
The instruction increments the PC twice to obtain the address of the
followong instruction, then pushes the 16-bit result onto the stack (low-order
byte first) and increments the Stack Pointer twice. The destination address is
obtained by successively concatenating the five high-order bits of the
incremented PC,opcode bits 7 through 5, and the second byte of the
instruction. The subroutine called must therefore start within the same 2 K
block of the program memory as the first byte of the instruction following
ACALL
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RETI pops the high and low-order bytes of the PC successively from the
stack and restores the interrupt logic to accept additional interrupts at the
same priority level as the one just processed. The SP is left decremented by
two
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-
nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
51 0011 0011 33 RLC A A
(An+1)(An)n=0-6
(A0)(C)
(C)(A7)
1
52 0011 0100 34 ADDC A,#DATA A,#DATA (A)(A)+(C)+#DATA 2
53 0011 0101 35 ADDC A,direct A,DATA ADDR (A)(A)+(C)+(DATAADDR)
2
(OPCODE-nya)
(OPERAND-nya)OPERATION CODE
M'NEMONIC CODE
OPERASI
(simbolik) BYTES
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54 0011 0110 36 ADDC A,@Ri A,@R0 (A)(A)+(C)+((R0)) 1
55 0011 0111 37 ADDC A,@Ri A,@R1 (A)(A)+(C)+((R1)) 1
56 0011 1000 38 ADDC A,Rn A,R0 (A)(A)+(C)+(R0) 1
57 0011 1001 39 ADDC A,Rn A,R1 (A)(A)+(C)+(R1) 1
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58 0011 1010 3A ADDC A,Rn A,R2 (A)(A)+(C)+(R2) 1
59 0011 1011 3B ADDC A,Rn A,R3 (A)(A)+(C)+(R3) 1
60 0011 1100 3C ADDC A,Rn A,R4 (A)(A)+(C)+(R4) 1
61 0011 1101 3D ADDC A,Rn A,R5 (A)(A)+(C)+(R5) 1
62 0011 1110 3E ADDC A,Rn A,R6 (A)(A)+(C)+(R6) 1
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63 0011 1111 3F ADDC A,Rn A,R7 (A)(A)+(C)+(R7) 1
64 0100 0000 40 JC rel code addr
(PC)(PC)+2
IF (C)=1
THEN
(PC) (PC) + code addr
2
65 0100 0001 41 AJMP addr11 code addr (PC)(PC)+2
(PC10-0) page address2
66 0100 0010 42 ORL direct,A data addr,A (direct)(direct)V(A) 2
67 0100 0011 43 ORL direct,#datadata
addr,#data(direct)(direct)V #data 3
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68 0100 0100 44 ORL A,#data A,#data (A) (A) V #data 2
69 0100 0101 45 ORL A,direct A,data addr (A)(A) V (direct) 2
70 0100 0110 46 ORL A,@Ri A,@R0 (A)(A) V ((R0)) 1
71 0100 0111 47 ORL A,@Ri A,@R1 (A)(A) V ((R1)) 1
72 0100 1000 48 ORL A,Rn A,R0 (A) (A) V (R0) 1
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73 0100 1001 49 ORL A,Rn A,R1 (A) (A) V (R1) 1
74 0100 1010 4A ORL A,Rn A,R2 (A) (A) V (R2) 1
75 0100 1011 4B ORL A,Rn A,R3 (A) (A) V (R3) 1
76 0100 1100 4C ORL A,Rn A,R4 (A) (A) V (R4) 1
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
R
C OV AC (Operand-1) (Operand-2) (Operand-3)
1 X - -Logical
operation
Rotate
Accumulator
Left through
the Carry
12 X X X immediateAritmatik
operation
Add immediate
data to Accwith Carry
12 X X X direct Aritmatikoperation
Add direct byte
to Accumulator
with Carry
ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS
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1 X X Xindirect-
register
Aritmatik
operation
Add inderect
RAM to
Accumulator
with Carry
1 X X Xindirect-
register
Aritmatik
operation
Add inderect
RAM to
Accumulatorwith Carry
1 X X X register
Aritmatik
operation
Add register
R0 to
Accumulator
with Carry
1 X X X register Aritmatikoperation
Add register
R1 toAccumulator
with Carry
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1 X X X register Aritmatik
operation
Add register
R2 to
Accumulator
with Carry
1 X X X register Aritmatik
operation
Add register
R3 to
Accumulator
with Carry
1 X X X register Aritmatik
operation
Add register
R4 to
Accumulator
with Carry
1 X X X register Aritmatik
operation
Add register
R5 to
Accumulator
with Carry
1 X X X register Aritmatik
operation
Add register
R6 to
Accumulatorwith Carry
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1 X X X register Aritmatik
operation
Add register
R7 to
Accumulator
with Carry
12
Boolean
variable
manipulation
Jump if Carry
is set
12Program
branchingAbsolute Jump
12Logical
operation
OR
Accumulator to
direct byte
123Logical
operation
OR immediate
to direct byte
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12Logical
operation
OR imadiate
data to
Accumulator
12Logical
operation
OR direct byte
to Accumulator
1Logical
operation
OR indirect
RAM to
Accumulator
1Logical
operation
OR indirect
RAM to
Accumulator
1Logical
operation
OR register R0
to Accumulator
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1Logical
operation
OR register R1
to Accumulator
1Logical
operation
OR register R2
to Accumulator
1Logical
operation
OR register R3
to Accumulator
1Logical
operation
OR register R4
to Accumulator
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
0 0 1 1 0 0 1 1 12 1
Rotate
Accumulator Left
through the Carry
flag
0 0 1 0 0 1 0 0 12 1 Add with Carry
0 0 1 1 0 1 0 1 12 1 Add with Carry
FUNGSIENCODING OSC. CYCLES
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0 0 1 1 0 1 1 i 12 1 Add with Carry
0 0 1 1 0 1 1 i 12 1 Add with Carry
1 0 1 1 1 r r r 12 1 Add with Carry
0 0 1 1 1 r r r 12 1 Add with Carry
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0 0 1 1 1 r r r 12 1 Add with Carry
0 0 1 1 1 r r r 12 1 Add with Carry
0 0 1 1 1 r r r 12 1 Add with Carry
0 0 1 1 1 r r r 12 1 Add with Carry
0 0 1 1 1 r r r 12 2 Add with Carry
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0 0 1 1 1 r r r 12 1 Add with Carry
0 1 0 0 0 0 0 0 24 2Jump if Carry is
set
a10 a9 a8 0 0 0 0 1 24 2 Absolute jump
0 1 0 0 0 0 1 0 12 1Logical-OR for
byte variables
0 1 0 0 0 0 1 1 24 2Logical-OR for
byte variables
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0 1 0 0 0 1 0 0 12 1Logical-OR for
byte variables
0 1 0 0 0 1 0 1 12 1Logical-OR for
byte variables
0 1 0 0 0 1 1 0 12 1Logical-OR for
byte variables
0 1 0 0 0 1 1 1 12 1Logical-OR for
byte variables
0 1 0 0 1 r r r 12 1Logical-OR for
byte variables
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0 1 0 0 1 r r r 12 1Logical-OR for
byte variables
0 1 0 0 1 r r r 12 1Logical-OR for
byte variables
0 1 0 0 1 r r r 12 1Logical-OR for
byte variables
0 1 0 0 1 r r r 12 1Logical-OR for
byte variables
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
The eight bits in the Accumulator and the carry flag are together rotated one
bit to the left. Bit 7 moves into the
carry flag; the original state of the carry flag moves into the bit 0 position. No
other flags are affected.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
CATATAN
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ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OVis cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
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ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
fla indicates an overflow occurred. ,
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are setrespectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
- -ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative numberproduced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OVis cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
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ADDC simultaneously adds the byte variable indicated, the carry flag and the
Accumulator contents, leaving the
result in the Accumulator. The carry and auxiliary-carry flags are set
respectively, if there is a carry-out from bit 7
or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit
7 but not out of bit 6; otherwise OV
is cleared. When adding signed integers, OV indicates a negative number
produced as the sum of two positive
operands or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register-
indirect, or immediate.
If the carry flag is set, JC branches to the address indicated; otherwise, it
proceeds with the next instruction. The
branch destination is computed by adding the signed relative-displacement
in the second instruction byte to the
PC, after incrementing the PC twice. No flags are affected.
AJMP transfers program execution to the indicated address, which is formed
at run-time by concatenating the
high-order five bits of the PC (after incrementing the PC twice), opcode bits 7through 5, and the second byte of
the instruction. The destination must therfore be within the same 2 K block of
program memory as the first byte of
the instruction following AJMP.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
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ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read fromthe output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
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ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read fromthe output data latch, not the input pins.
ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.ORL performs the bitwise logical-OR operation between the indicated
variables, storing the results in the
destination byte. No flags are affected.
The two operands allow six addressing mode combinations. When the
destination is the Accumulator, the source
can use register, direct, register-indirect, or immediate addressing; when the
destination is a direct address, the
source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used
as the original port data is read from
the output data latch, not the input pins.
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
77 01001101 4D ORL Rn A,R5 (A )(A) V (Rn) 1
78 01001110 4E ORL Rn A,R6 (A )(A) V (Rn) 1
79 01001111 4F ORL Rn A,R7 (A )(A) V (Rn) 1
80 01010000 50 JNC addr11 code addr
(PC) (PC) + 2
IF (C) = 0THEN (PC) (PC) + rel
1
81 01010001 51 ACALL addr11 code addr
(PC) (PC) + 2
(SP) (SP) + 1
((SP)) (PC7-0)
(SP) (SP) + 1
((SP)) (PC15-8)
(PC10-0) page address
1
82 01010010 52 ANL direct,A code addr,A A) (A) ^ (direct) 2
83 01010011 53 ANL direct,#datadata
addr,#data(direct) (direct) ^ #data 3
84 01010100 54 ANL A,#data A,#data (A) (A) ^ #data 2
(OPCODE-nya)
(OPERAND-nya)OPERATION CODE
M'NEMONIC CODE
OPERASI
(simbolik) BYTES
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85 01010101 55 ANL A,direct A,data addr (direct) (direct) ^ (A) 2
86 01010110 56 ANL A,@Ri A,@R0 (A) (A) ^ ((R0)) 1
87 01010111 57 ANL A,@Ri A,@R1 (A) (A) ^ ((R1)) 1
88 01011000 58 ANL Rn A,R0 (A) (A) ^ (R0) 1
89 01011001 59 ANL Rn A,R1 (A) (A) ^ (R1) 1
90 01011010 5A ANL Rn A,R2 (A) (A) ^ (R2) 1
91 01011011 5B ANL Rn A,R3 (A) (A) ^ (R3) 1
92 01011100 5C ANL Rn A,R4 (A) (A) ^ (R4) 1
93 01011101 5D ANL Rn A,R5 (A) (A) ^ (R5) 1
94 01011110 5E ANL Rn A,R6 (A) (A) ^ (R6) 1
95 01011111 5F ANL Rn A,R7 (A) (A) ^ (R7) 1
96 01100000 60 JZ addr11 code addr (PC) (PC) + 2
IF (A) = 0
THEN (PC) (PC) + rel2
97 01100001 61 AJMP addr11 code addr (PC) (PC) + 2
(PC10-0) page address2
98 01100010 62 XRL direct,A code addr,A (direct) (direct) V (A) 2
99 01100011 63 XRLdata
addr,#data
data
addr,#data(direct) (direct) V #data 3
100 01100100 64 XRL A,#data A,#data (A) (A) V #data 2
101 01100101 65 XRL A,direct A,data addr (A) (A) V (direct) 2
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102 01100110 66 XRL A,@Ri A,@R0 (A) (A) V ((R0)) 1
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
R
C OV AC (Operand-1) (Operand-2) (Operand-3)
1Logical
operation
OR Register 5
ke
Accumulator
1Logical
operation
OR Register 6
ke
Accumulator
1Logical
operation
OR Register 7
ke
Accumulator
1
Boolean
variablemanipulation
Jump jika
Carry not SetC = 0
1Program
branchingAbsolute Call
12Logical
operation
AND
accumulator ke
byte direct
132Logical
operation
OR data
immediate ke
byte direct
12Logical
operation
OR data
immediate ke
Accumulator
ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS
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12Logical
operation
OR byte direct
ke
Accumulator
1
Logical
operation
OR indirect
RAM0 keAccumulator
1Logical
operation
OR indirect
RAM1 ke
Accumulator
1Logical
operation
AND Register
0ke
Accumulator
1Logical
operation
AND Register
1 ke
Accumulator
1Logical
operation
AND Register
2ke
Accumulator
1Logical
operation
AND Register
3 ke
Accumulator
1Logical
operation
AND Register
4 ke
Accumulator
1Logical
operation
AND Register
5 ke
Accumulator
1Logical
operation
AND Register
6 ke
Accumulator
1Logical
operation
AND Register
7 ke
Accumulator
12Program
branching
Jump If
Accumulator
Zerro
12Program
branchingAbsolute Jump
12Logical
operation
Exclusive-OR
accumulator ke
byte direct
123Logical
operation
Exclusive-ORdata
immediate ke
byte direct
12Logical
operation
Exclusive-OR
data
immediate ke
Accumulator
12Logical
operation
Exclusive-OR
byte direct ke
Accumulator
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1Logical
operation
Exclusive-OR
indirect RAM 0
ke
Accumulator
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
01001101 12 1Logical OR level
byte
01001110 12 1Logical OR level
byte
01001111 12 1Logical OR level
byte
01010000 12 1Jump if Carry not
set
01010001 12 1Return from sub
routine
01010010 12 1Logical AND level
byte
01010011 24 2Logical AND level
byte
01010100 12 1Logical AND level
byte
FUNGSIENCODING OSC. CYCLES
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01010101 12 1Logical AND level
byte
01010110 12 1
Logical AND level
byte
01010111 12 1Logical AND level
byte
01011000 12 1Logical AND level
byte
01011001 12 1Logical AND level
byte
01011010 12 1Logical AND level
byte
01011011 12 1Logical AND level
byte
01011100 12 1Logical AND level
byte
01011101 12 1Logical AND level
byte
01011110 12 1Logical AND level
byte
01011111 12 1Logical AND level
byte
01100000 24 2Jump if
accumulator Zero
01100001 24 2 Absolute Jump
01100010 12 1Logical Exclusive-
OR level byte
01100011 24 2Logical Exclusive-
OR level byte
01100100 12 1Logical Exclusive-
OR level byte
01100101 12 1Logical Exclusive-
OR level byte
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01100110 12 1Logical Exclusive-
OR level byte
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
OR Register 5 ke Accumulator
OR Register 6 ke Accumulator
OR Register 7 ke Accumulator
Jump jika Carry not Set C = 0
Absolute Call
AND accumulator ke byte direct
OR data immediate ke byte direct
OR data immediate ke Accumulator
CATATAN
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OR byte direct ke Accumulator
OR indirect RAM0 ke Accumulator
OR indirect RAM1 ke Accumulator
AND Register 0ke Accumulator
AND Register 1 ke Accumulator
AND Register 2ke Accumulator
AND Register 3 ke Accumulator
AND Register 4 ke Accumulator
AND Register 5 ke Accumulator
AND Register 6 ke Accumulator
AND Register 7 ke Accumulator
Jump If Accumulator Zerro
Absolute Jump
Exclusive-OR accumulator ke byte direct
Exclusive-OR data immediate ke byte direct
Exclusive-OR data immediate ke
Accumulator
Exclusive-OR byte direct ke Accumulator
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Exclusive-OR indirect RAM 0 ke Accumulator
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Form
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu EN
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
103 0110 0111 67 XRL A,@Ri A,@R1 (A) (A) ((Ri)) 1
104 0110 1000 68 XRL A,Rn A,R0 (A) (A) ( Rn) 1
105 0110 1001 69 XRL A,Rn A,R1 (A) (A) ( Rn) 1
106 0110 1010 6A XRL A,Rn A,R2 (A) (A) ( Rn) 1
107 0110 1011 6B XRL A,Rn A,R3 (A) (A) ( Rn) 1
108 0110 1100 6C XRL A,Rn A,R4 (A) (A) ( Rn) 1
109 0110 1101 6D XRL A,Rn A,R5 (A) (A) ( Rn) 1
110 0110 1110 6E XRL A,Rn A,R6 (A) (A) ( Rn) 1
(OPCODE-nya)
(OPERAND-nya)OPERATION CODE
M'NEMONIC CODE
OPERASI
(simbolik) BYTES
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111 0110 1111 6F XRL A,Rn A,R7 (A) (A) ( Rn) 1
112 0111 0000 70 JNZ rel code addr
(PC) (PC) + 2 IF (A) 0 THEN
(PC) (PC) + rel 1
113 0111 0001 71 ACALL addr11 code addr
(PC) (PC) + 2
(SP) (SP) + 1
((SP)) (PC7-0)
(SP) (SP) + 1
((SP)) (PC15-8)
(PC10-0) page address
2
114 0111 0010 72 ORL C,bit c,bit addr (C) (C) ( bit) 2
115 0111 0011 73 JMP @A+DPTR @A+DPTR (PC) (A) + (DPTR) 1
116 0111 0100 74 MOV A,#data A,#data (A) #data 2
117 0111 0101 75 MOV direct,#datadata
addr,#data(A)(A)+((R1)) 2
118 0111 0110 76 MOV @Ri,#data @R0,#data ((Ri))#data 2
119 0111 0111 77 MOV @Ri,#data @R1,#data ((Ri))#data 2
120 0111 1000 78 MOV Rn,#data R0,#data ((Ri))#data 2
121 0111 1001 79 MOV Rn,#data R1,#data ((Ri))#data 2
122 0111 1010 7A MOV Rn,#data R2,#data ((Ri))#data 2
123 0111 1011 7B MOV Rn,#data R3,#data ((Ri))#data 2
124 0111 1100 7C MOV Rn,#data R4,#data ((Ri))#data 2
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125 0111 1101 7D MOV Rn,#data R5,#data ((Ri))#data 2
126 0111 1110 7E MOV Rn,#data R6,#data ((Ri))#data 2
127 0111 1111 7F MOV Rn,#data R7,#data ((Ri))#data 2
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
ER
C OV AC (Operand-1) (Operand-2) (Operand-3)
1 Register Indirect
register
Logical
operations
Exclusive-OR
indirect
RAM to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 register register Logical
operations
Exclusive-ORregister to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 register register Logical
operations
Exclusive-OR
register to
Accumulator
ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS
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1 register register Logical
operations
Exclusive-OR
register to
Accumulator
1 relative
Program
branching
Jump if
AccumulatorNot Zero
12Long
Addresscode addr
Program
branching
Absolute
Subroutine Call
12 X Register bitLogical
operations
OR direct bit to
Carry
1Long
Address
Program
branching
Jump indirect
relative to
the DPTR
12 X Register Immediate Data Transfer Move
immediate
data to
Accumulator
12 X direct Immediate Data Transfer
Move
immediate
data to
direct byte
12 X Register Immediate Data Transfer
Move
immediate
data to indirect
RAM
12 X Register Immediate Data Transfer
Move direct
byte to
indirect RAM
12 X Register Immediate Data Transfer
Move
immediate
data to
register
12 X Register Immediate Data Transfer
Move
immediate
data to
register
12 X Register Immediate Data Transfer
Move
immediate
data toregister
12 X Register Immediate Data Transfer
Move
immediate
data to
register
12 X Register Immediate Data Transfer
Move
immediate
data to
register
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12 X Register Immediate Data Transfer
Move
immediate
data to
register
12 X Register Immediate Data Transfer
Move
immediate
data to
register
12 X Register Immediate Data Transfer
Move
immediate
data to
register
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
0 1 1 0 0 1 1 i 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 1
Logical Exclusive-
OR for byte
variables
0 1 1 0 1 r r r 12 2
Logical Exclusive-
OR for byte
variables
FUNGSIENCODING OSC. CYCLES
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0 1 1 0 1 r r r 12 2
Logical Exclusive-
OR for byte
variables
0 1 1 1 0 0 0 0 24 2
Jump if
Accumulator NotZero
a10 a9 a8 1 0 0 0 1 , a7 a6 a5 a4 a3 a2 a1 a0 24 2 Absolute Call
0 1 1 1 0 0 1 0 bit address 12 2Logical-OR for bit
variables
0 1 1 1 0 0 1 1 24 2 Jump indirect
0 1 1 1 0 1 0 0 immediate data 12 1 Move
0 1 1 1 0 1 0 1 direct address immediate data 24 2 Move
0 1 1 1 0 1 1 1 immediate data 12 1 Move
1 1 1 1 0 1 1 1 immediate data 12 1 Move
0 1 1 1 1 r r r immediate data 12 1 Move
1 1 1 1 1 r r r immediate data 12 1 Move
2 1 1 1 1 r r r immediate data 12 1 Move
3 1 1 1 1 r r r immediate data 12 1 Move
4 1 1 1 1 r r r immediate data 12 1 Move
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5 1 1 1 1 r r r immediate data 12 1 Move
6 1 1 1 1 r r r immediate data 12 2 Move
7 1 1 1 1 r r r immediate data 12 2 Move
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destiination
CATATAN
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XRL performs the bitwise logical Exclusive-OR operation between the
indicated variables, storing the results in the destination
If any bit of the Accumulator is a one, JNZ branches to the indicated
address; otherwise, it proceeds with the nextinstruction.
ACALL unconditionally calls a subroutine located at the indicated address
Set the carry flag if the Boolean value is a logical 1; leave the carry in its
current state otherwise.
JMP @A+DPTR adds the eight-bit unsigned contents of the Accumulator
with the 16-bit data pointer and loads
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the locationspecified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
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The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
The byte variable indicated by the second operand is copied into the location
specified by the first operand.
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
128 1000 0000 80 SJMP rel code addr (PC)(PC)+2,(PC)(PC)
+rel2
129 1000 0001 81 AJMP addr11 code addr (PC) (PC) + 2
(PC10-0) page address2
130 1000 0010 82 ANL A,#data c,bit addr ( C )( C ) (bit) 2
131 1000 0011 83 MOVC A,@A+PC A,@A+PC(PC) (PC) + 1
((A) ((A) + (PC))1
132 1000 0100 84 DIV AB AB(A)15-8(A)/(B) (B)7-
0
1
(OPCODE-nya)
(OPERAND-nya)OPERATION CODE
M'NEMONIC CODE
OPERASI
(simbolik) BYTES
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133 1000 0101 85 MOV direct,directdata addr,data
addr(direct)(direct) 3
134 1000 0110 86 MOV direct,@Ri data addr,@R0 (direct)((R0)) 2
135 1000 0111 87 MOV direct,@Ri data addr,@R1 (direct)((R1)) 2
136 1000 1000 88 MOV direct,Rn data addr,R0 (direct)((R0)) 2
137 1000 1001 89 MOV direct,Rn data addr,R1 (direct)((R1)) 2
138 1000 1010 8A MOV direct,Rn data addr,R2 (direct)((R2)) 2
139 1000 1011 8B MOV direct,Rn data addr,R3 (direct)((R3)) 2
140 1000 1100 8C MOV direct,Rn data addr,R4 (direct)((R4)) 2
141 1000 1101 8D MOV direct,Rn data addr,R5 (direct)((R5)) 2
142 1000 1110 8E MOV direct,Rn data addr,R6 (direct)((R6)) 2
143 1000 1111 8F MOV direct,Rn data addr,R7 (direct)((R7)) 2
144 1001 0000 90 MOVDPTR,#data
16DPTR,#data (DPTR) # data 15-0 3
145 1001 0001 91 ACALL addr11 code addr
(PC)(PC)+2(SP)(SP)+1
((SP))(PC7-0)
(SP)(SP)+1
((SP))(PC15-8)
(PC10-0)page address
2
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146 1001 0010 92 MOV C,bit bit addr,C (C)(bit) 2
147 1001 0011 93 MOVCA,@A+DPT
R A,@A+DPTR (A) ((A) + (DPTR)) 1
148 1001 0100 94 SUBB A,#data A,#data (A)(A) - (C) - #data 2
149 1001 0101 95 SUBB A,direct A,data addr (A)(A) - C - (addr) 2
150 1001 0110 96 SUBB A,@Ri A,@R0 (A)(A) - C - (R0) 1
151 1001 0111 97 SUBB A,@Ri A,@R1 (A)(A) - (C) -((Ri)) 1
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152 1001 1000 98 SUBB A,Rn A,R0 (A )(A) - (C) - (R0) 1
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7 9 10 11 12 13
Format
bytes
( 123 / 132 )
Addressing
Mode
utk Operand-1
(register, direct,
indirect-
register,
immediate,immediate-16,
long-address,
absolut,
rellative bit
Addressing
Mode
utk Operand-2
Addressing
Mode
utk Operand-3
Kategori
(Arith, Log, Transf,
Bool, Branch )
Deskripsi ( singkat
)
1) Format 1) Diisi X, atau 0(1) Yg mema 1) Yg mema 1) Yg memang TIDAK ADA ISINYA, diisi ---la
2) Konsist 2) Tanpa awalan atau akhiran spasi
3) Isinya 13) Yg memang TIDAK BERPENGARUH, diisi ---lalu ENTER
4) Yg 132di-bold!
R
C OV AC (Operand-1) (Operand-2) (Operand-3)
12 absolutProgram
branching
short jump
(rellative
address)
12 - addr Program
branchingAbsolute jump
12 X register bit
Boolean
Variable
manipulation
And direct bit
to carry
1 X register register Data transfer
Move code
byte relative to
PC to ACC
1 O X register register Arithmetic
operationsDivide A by B
ADDRESSING MODE
KATEGORI
DESKRIPSI
SINGKAT
8
Flags
( C,OV,AC, dsb = X /
0 / 1)
FORMAT
BYTES
FLAGS
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132 X X X direct direct Data transfer Move direct
byte to direct
12 X X X directindirect
registerData transfer
move indirect
R0 to direct
byte
12 X X X directindirect
registerData transfer
move indirectR1 to direct
byte
12 X X X direct register Data transfer move R0 to
direct byte
12 X X X direct register Data transfer move R1 to
direct byte
12 X X X direct register Data transfer move R2 to
direct byte
12 X X X direct register Data transfer move R3 to
direct byte
12 X X X direct register Data transfer move R4 to
direct byte
12 X X X direct register Data transfer move R5 to
direct byte
12 X X X direct register Data transfer move R6 to
direct byte
12 X X X direct register Data transfer move R7 to
direct byte
132 X X Xlong-
address
Immediate -
16Data transfer
load data
pointer with a
16-bit constant
12 X X Xlong-
address
Program
branching
Absolute
Subroutine Call
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12 X bit register
Boolean
variable
manipulation
move carry to
direct bit
1 register long
Address Data transfer
move code
byte relative toDPTR to ACC
12 X X X register immediateArithmatic
Operations
Subtract
immediate
data from Acc
with borrow
12 X X X register directArithmatic
Operations
subtract direct
byte from Acc
with borrow
1 X X X register indirect
register
Arithmatic
Operations
Subtractindirect R0
from Acc with
borrow
1 X X X register indirect
register
Arithmatic
Operations
Subtract
indirect R1
from ACC with
borrow
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1 X X X register register Arithmatic
Operations
Subtract R0
from ACC with
borrow
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14 15 16 17
Encoding Osc. Cycles Fungsi
1) Format Text 1) Form 1) Format Number
2) Antar bit tanpa spasi
3) 1-spasi hanya antar nibble
4) Tiap byte barisnya beda, tapi tetap dalam sel yg sama
5) Subscript
1 0 0 0 0 0 0 0 24 2 short jump
a10 a9 a8 0 0 0 0 1 , a7 a6 a5 a4 a3 a2 a1 a0 24 2 Absolute Jump
1 0 0 0 0 0 1 0 24 2Logical-AND for bit
variables
1 0 0 1 0 0 1 1 24 2 Move Code byte
1 0 0 0 0 1 0 0 48 1 Divide
FUNGSIENCODING OSC. CYCLES
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1 0 0 0 0 1 0 1 24 2 Move byte variable
1 0 0 0 0 1 1 0 24 2 Move byte variable
1 0 0 0 0 1 1 i 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 r r r 24 2 Move byte variable
1 0 0 0 1 0 0 0 0 24 2 Move byte variable
a10 a9 a8 1 0 0 0 1 a7 a6 a5 a4 a3 a2 a1 a0 24 2 Absolute Call
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a10 a9 a8 1 0 0 0 1a7 a6 a5 a4 a3 a2 a1 a0 24 2 Move bit data
1 0 0 1 0 0 1 1 24 2 Move Code byte
1 0 0 1 0 1 0 0 12 2Subtract with
borrow
1 0 0 1 0 1 0 0 12 1Subtract with
borrow
1 0 0 1 0 1 0 1 12 1Subtract with
borrow
1 0 0 1 0 1 1 i 12 1Subtract with
borrow
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1 0 0 1 1 r r r 12 1Subtract with
borrow
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18
Catatan
( berisi a.l: alternatif penamaan operand, dan sisa info penting dari Description )
Program control branches unconditionally to the address indicated. The
branch destination is computed by
adding the signed displacement in the second instruction byte to the PC,
after incrementing the PC twice.
Therefore, the range of destinations allowed is from 128 bytes preceding this
instruction 127 bytes following it.
AJMP transfers program execution to the indicated address, which is
formed at run time by concatenating the high-order five bits of the PC
(after incrementing the PC twice), opcode bits 7 through 5, and the second
byte of the instructions.
If the Boolean value of the source bit is a logical 0, then ANL C clears the
carry flag; otherwise, this instruction leaves the carry flag in its current state.
A slash ( / ) preceding the operand in the assembly language indicates that
the logical complement of the addressed bit is used as the source value, but
the source bit itself is not affected. No other flags are affected.
The MOVC instructions load the Accumulator with a code byte or constant
from program memory. The address of the byte fetched is the sum of the
original unsigned 8-bit Accumulator contents and the contents of a 16-bit
base register, which may be either the Data Pointer or the PC. In the latter
case, the PC is incremented to the address of the following instruction before
being added with the Accumulator; otherwise the base register is not altered.Sixteen-bit addition is performed so a carry-out from the low-order eight bits
may propagate through higher-order bits. No flags are affected.
DIV AB divides the unsigned eight-bit integer in the Accumulator by the
unsigned eight-bit integer in register B.
The Accumulator receives the integer part of the quotient; register B receives
the integer remainder. The carry
and OV flags are cleared.
CATATAN
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The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the locationspecified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
The byte variable indicated by the second operand is copied into the location
specified by the first operand. The source byte is not affected. No other
register or flag is affected.
ACALL unconditionally calls a subroutine located at the indicated address.
The instruction increments the PC twice to obtain the address of thefollowing instruction, then pushes the 16-bit result onto the stack (low-order
byte first) and increments the Stack Pointer twice. The destination address is
obtained by successively concatenating the five high-order bits of the
incremented PC, opcode bits 7 through 5, and the second byte of the
instruction. The subroutine called must therefore start within the same 2 K
block of the program memory as the first byte of the instruction following
ACALL. No flags are affected.
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MOV , copies the Boolean variable indicated by the
second operand into the location specified by the first operand. One of the
operands must be the carry flag; the other may be any directly addressable
bit. No other register or flag is affected.
The MOVC instructions load the Accumulator with a code byte or constant
from program memory. The address of the byte fetched is the sum of the
original unsigned 8-bit Accumulator contents and the contents of a 16-bit
base register, which may be either the address of the following instructionbefore being added with the Accumulator; otherwise the base register is not
altered. Sixteen-bit addition is performed so a carry-out from the low-order
eight bits may propagate through higher-order bits. No flags are affected.
SUBB subtracts the indicated variable and the carry flag together from the
Accumulator, leaving the result in the Accumulator. SUBB sets the carry
(borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was
set before executing a SUBB instruction, this indicates that a borrow was
needed for the previous step in a multiple-precision subtraction, so the carry
is subtracted from the Accumulator along with the source operand.)AC is set
if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is
needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.
SUBB subtracts the indicated variable and the carry flag together from the
Accumulator, leaving the result in the Accumulator. SUBB sets the carry
(borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was
set before executing a SUBB instruction, this indicates that a borrow was
needed for the previous step in a multiple-precision subtraction, so the carry
is subtracted from the Accumulator along with the source operand.)AC is set
if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is
needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.
SUBB subtracts the indicated variable and the carry flag together from the
Accumulator, leaving the result in the Accumulator. SUBB sets the carry
(borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C wasset before executing a SUBB instruction, this indicates that a borrow was
needed for the previous step in a multiple-precision subtraction, so the carry
is subtracted from the Accumulator along with the source operand.)AC is set
if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is
needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.
SUBB subtracts the indicated variable and the carry flag together from the
Accumulator, leaving the result in the Accumulator. SUBB sets the carry
(borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was
set before executing a SUBB instruction, this indicates that a borrow was
needed for the previous step in a multiple-precision subtraction, so the carry
is subtracted from the Accumulator along with the source operand.)AC is setif a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is
needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.
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SUBB subtracts the indicated variable and the carry flag together from the
Accumulator, leaving the result in the Accumulator. SUBB sets the carry
(borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was
set before executing a SUBB instruction, this indicates that a borrow was
needed for the previous step in a multiple-precision subtraction, so the carry
is subtracted from the Accumulator along with the source operand.)AC is set
if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is
needed into bit 6, but not into bit 7, or into bit 7, but not bit 6.
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1a 1b 1c 2 3 4 5 6
Opcode
(Des)
Opcode
(Biner)
Opcode
(Hex)
Mnemonic
(Opcode-nya)
Mnemonic
(Operand-nya
berdasarkan
kategori)
Mnemonic
(Operand-nya
berdasarkan
spesifik instruksi)
Operasi (simbolik)Bytes
(1/2/3)
1) For 1) Format Te 1) For 1) Semua Ca 1) Format Te 1) Format Text 1) Forma
2) 8 bit 2) Spasi (ada2) Spasi (ada/tidak)
3) 1-spasi antar nibble 3) Huruf (cap 3) Huruf (capital/tidak)
4) Subscript 4) Subscript 4) Subscript
5) Yg mema 5) Yg memang TIDAK ADA ISINYA, diisi ---lalu ENT
(Des) (Biner) (Hex)(per-
kategori)
(spesifik
instruksi)
153