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© 2015 IBM Corporation
IBM Research - Zurich
System and Device-level Integration Trends of
Optical Interconnects in Data Centers
Bert Jan Offrein
4th Symposium for Optical Interconnect in Data Centres, ECOC 2016
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Interconnect trends in DC architectures
2
• Bandwidth scaling
• Bridge longer distances
• Increase bandwidth density
• Improve power efficiency
• Increase switch port count
• Improve system flexibility
• While massively reducing cost
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
How can optics help?
• Bandwidth scaling
• Bridge longer distances
• Increase bandwidth density
• Improve power efficiency
• Increase switch port count
• Improve system flexibility
• While massively reducing cost
3
• Reduce the electrical signal
path length
• High density optics
• Scale bandwidth per fiber
• Single mode technology
• Standardized interfaces
• Integration
• Reduce assembly overhead
• Standardization
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein4
Outline
• Photonics integration roadmap
• The need for integration at component and system level
• CMOS Silicon photonics
• Scalable silicon photonics packaging
• Summary
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
High-Level Server System Architecture
5
Courtesy Dr. Martin Schmatz
© 2015 IBM Corporation
CPU CPU
PCI extension
(Accelerators!)
Server node
DR
AM
&
NV
M
DR
AM
&
NV
M
NICBridge BMC
Intra DC
Network
Se
rve
r n
od
e
Se
rve
r n
od
e
Storage node
Sto
rage
no
de
Sto
rage
no
de
Backup node
Storage
controller
NIC
Internet
(Tape) library
controller
NIC
Ma
na
ge
ment
Inter DC
Network
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
High-Level Server System Architecture
6
Courtesy Dr. Martin Schmatz
© 2015 IBM Corporation
CPU CPU
PCI extension
(Accelerators!)
Server node
DR
AM
&
NV
M
DR
AM
&
NV
M
NICBridge BMC
Intra DC
Network
Se
rve
r n
od
e
Se
rve
r n
od
e
Storage node
Sto
rage
no
de
Sto
rage
no
de
Backup node
Storage
controller
NIC
Internet
(Tape) library
controller
NIC
Ma
na
ge
ment
Inter DC
Network
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
High-Level Server System Architecture
7
Courtesy Dr. Martin Schmatz
© 2015 IBM Corporation
CPU CPU
PCI extension
(Accelerators!)
Server node
DR
AM
&
NV
M
DR
AM
&
NV
M
NICBridge BMC
Intra DC
Network
Se
rve
r n
od
e
Se
rve
r n
od
e
Storage node
Sto
rage
no
de
Sto
rage
no
de
Backup node
Storage
controller
NIC
Internet
(Tape) library
controller
NIC
Ma
na
ge
ment
Inter DC
Network
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
High-Level Server System Architecture
8
Courtesy Dr. Martin Schmatz
© 2015 IBM Corporation
CPU CPU
PCI extension
(Accelerators!)
Server node
DR
AM
&
NV
M
DR
AM
&
NV
M
NICBridge BMC
Intra DC
Network
Se
rve
r n
od
e
Se
rve
r n
od
e
Storage node
Sto
rage
no
de
Sto
rage
no
de
Backup node
Storage
controller
NIC
Internet
(Tape) library
controller
NIC
Ma
na
ge
ment
Inter DC
Network
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein9
Ba
ckp
lan
e
Processor Processor
Memory
2008
2011
Electrical system, optical fibers at card edge only
opticalelectrical
IBM Roadrunner
IBM Power 775
Fibers
Fibers
Optical fibers across the boards
Fibers
Photonics integration roadmap (1 of 2)
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Why integration? Looking back, electronics
10
EAI 580 patch panel, Electronic Associates, 1968Whirlwind, MIT, 1952
Today’s state of computing is based on:
- Integration and scaling of the logic functions (CMOS electronics)
- Integration and scaling of the interconnects (PCB technology & assembly)
For optical interconnects, this resembles:
- Electro-optical integration and scaling of transceiver technology
- Integration of optical connectivity and signal distribution
Pictures taken at:
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Photonics technologies for system-level integration
System-level: Optical Printed circuit board technology
Chip-level: CMOS silicon photonics
Si photonics provides all required buliding blocks (except lasers) on chip-level:
- Modulators
- Drivers
- Detectors
- Amplifiers
- WDM filters
+ CMOS electronics
2
1
Provide electrical and optical signal routing capability
Enable a simultaneous interfacing of electrical and optical connections
One step mating of numerous optical interfaces
Avoid fiber cable handling at board or carrier level
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein12
Opto-electronic chip
Optical waveguides on carrier
Flexible optical waveguides or fibers
Fibers
Chip-level integration
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein13
CMOS Silicon photonics
Silicon photonics
– Modulators
– Drivers
– Detectors
– Amplifiers
– WDM filters
– Dense integration
– + CMOS electronics
Provides the integration of optical and electrical functions
Modulator DetectorWDM filterCMOS chip cross-section
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
4 λ x 25 Gb/s optical transceiver demonstration
14
Demonstration of a flip chip mounted 100G transceiver with
four wavelength multiplexing at 25 G each.
as transmitted from Tx0 as measured on Rx3
Tx3
Tx2
Tx1
Tx0Rx3
Rx2
Rx1
Rx0
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Integrating the light source
15
Silicon photonics:
Versatile and cost-efficient
Si: Indirect bandgap Additional material for laser sources required.
Today: External laser source must be coupled.
Already demonstrated: Hybrid III-V–on–silicon integration (on-chip).
Grating coupling Device bonding
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
CMOS embedded III-V–on–silicon platform
16
Integration
Hybrid
State-of-the-art
Semi-Hybrid
demonstrated
Monolithic
Our research focus
Requirements:
• Thin III-V layer
(< 500 nm).
• High modal overlap with
active material (low-power
consumption, high-speed
modulation).
Yet, III-V–on–silicon devices
cannot be fully integrated
(device thickness ~ 3…4 µm)
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
CMOS embedded III-V–on–silicon platform
17
CMOS embedded III-V cross section
Si wafer
SiO2
Si
FE
OL
Front-end
BE
OL
SiO2
Electrical
contacts
III-V
• Monolithically integrated functionalities
• Directly modulated lasers
• Tunable lasers
• Laser arrays
• Wavelength/power stabilization
• …
• Cost advantages
• Lasers at the cost of silicon
• Reduced packaging overhead
III-V on silicon chip
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
H2020 EU project DIMENSION
18
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein19
Opto-electronic chip
Optical waveguides on carrier
Flexible optical waveguides or fibers
Fibers
System-level integration
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein20
From Si photonics transceivers to chip-level assembly
Treat Si photonics chip as a Si ASIC Need optical interface at carrier-level
– Less components and assembly steps
– Improved electrical signal path, reduce number of interfaces and signal distance
– High density, scalable optical IO
– Minimum overhead, lowest cost
Similar technology applicable for Si photonics subassemblies for transceivers
Molex/Luxtera Blazar QSFP Active Optical Cable
CMOS photonicsprocessor
carri
er su
bstra
te
wave
guide
s
Chip-level Si Photonics assembly
Today Research Focus
optics optics
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Adiabatic optical coupling using polymer waveguides
• Contact between the silicon waveguide taper and the polymer waveguide (PWG),
achieved by flip-chip bonding, enables adiabatic optical coupling
Complete confinement in Si waveguide
Complete confinement in PWG
Confined in both Si and PWG structure
Schematic view of assembled Si photonics chip by flip-chip bonding
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein22
Optical printed circuit board technology
Polymer deposition
Waveguide patterning
Waveguide
processing:
- Use of liquid, UV-sensitive, low-loss polymers with high environmental stability
- Large-panel processing with short processing time
- PCB-fabrication compatibilty
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein23
Single-mode polymer waveguide technology
SM polymer waveguides on
wafer-size flexible substrates
SM
wa
ve
gu
ide
50 mm
SM polymer waveguides on panel-size flexible substratesSM polymer waveguides on
chips (e.g. Si photonics chips)
Ch
ip-s
ize
Wafe
r-s
ize
Pan
el-
siz
e
R. Dangel, et al. Optics Express, 2015
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Optical characterization scheme
10 μm
Reference
Reference
Non transferred
Transferred (2X)
• Light coupled to PWGs by SM optical fiber
• Optical loss per coupler
• Variation of total taper length and wavelength sweep
Microscope picture through the glass substrate
I1
I4
O1
O4
I2 O2
O3
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Adiabatic couplers PWG direct processing
• New design and processing
• Larger silicon waveguide bending radius
• Higher resolution e-beam writing
TE TM
• For a taper length >1.6 mm:
• Coupling loss TE
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Operation across the O and the C band
• The adiabatic couplers operate across the O and C band
– The TM mode is leaking to the silicon substrate in the C band
26
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Waveguide to fiber connection through a Si V-groove array
27
• Different assemblies were realized with Si-
adapter glued to transparent substrates
• Coupling loss to fibers below 0.5 dB
demonstrated
Silicon photonics chip
Carrier substrate
Polymer waveguide flex
Waveguide to
fiber connection
Silicon V-groove adapter
V-groovesPolymer waveguide
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein28
Vision: E-O integration on chip level
TODAY: Current research focus: E-O integration on carrier level
Optical waveguides in/on boards
Optical transceiver integrated
with the processor
Photonics integration roadmap (2 of 2)
Fibers
Opto-electronic chip
Fibers
Optical waveguides on carrier
Flexible optical waveguides or fibers
Processor
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein29
Acknowledgements
• Photonics Event 2016 Organization Committee
• Collaborators in IBM
– J. Weiss, D. Jubin, N. Meier, R. Dangel, J. Hofrichter, M. Seifried, F. Horst, A. La
Porta, J. Weiss, L. Czornomaz, J. Fompeyrine, D. Caimi, U. Drechsler, H. Riel
– D. Gill, C. Xiong, J. E. Proesel, J. C. Rosenberg, J. Orcutt, J. Ellis-Monaghan, W.
Green, T. Barwicz, W. Haensch
– And many others
• Dow Corning
• European Union co-funded projects
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein
Summary
• Chip level integration of silicon photonics onto the processor package
– Offers a path to high bandwidth and low cost optical IO
– A supply chain ecosystem has to be established
• CMOS Silicon photonics and integration path for III-V materials
• Multimode and single mode polymer waveguide technology demonstrated
– Based on silicone materials from Dow Corning
• Adiabatic optical coupling enables efficient, broadband and polarization independent chip
to polymer waveguide interfacing
– Compatible with existing electrical assembly processing steps
• Polymer waveguide to fiber interface based on a Si V-groove adapter
30
Path towards high level of electro-optical integration & scalability
© 2016 IBM Corporation
IBM Research - Zurich
Bert Jan Offrein31
Thank you for your attention
• Bert Jan Offrein