SYNTHESIS of RECIPROCAL CIRCUITS

JAN C. WILLEMSK.U. Leuven, Flanders, Belgium

Second Workshop on Mathematical Aspects of Network Synthesis

Cambridge University, UK September 27, 2011

Circuits

Electrical circuits

circuit

Electrical

1

2N

k

An N-terminal circuit

Electrical circuits

Electrical

circuit

k1

k2

k3

Ik3

Vk1,k2

Variables: terminal currents and voltages

Electrical circuits

Assume KVL: Vk1,k2 +Vk2,k3 +Vk3,k1 = 0.

Electrical

circuit

1

2N

k

I1I2

IN

Ik

P1

P2PN

Pk

Variables: terminal currents and potentials

Vk1,k2 = Pk1 −Pk2.

Terminal connection

Electrical Electrical

circuit 1 circuit 2

1

2

N-1

N

1′

2′

N′-1

N′

Imposes: IN + IN′ = 0, PN = PN′.

Extendable to more than 2 terminals, than 2 circuits.

Circuit architecture

Digraph with leaves

����

����

����

����

ℓ1ℓ2

ℓ3 ℓ4

e1

e2

e5

e4e3

v1 v2

v3

v4

vertices: subcircuits, ‘building blocks’,

edges: connections,

leaves: external terminals.

The terminal behavior

The current/potential behavior

BIP ⊆ (RN ×RN)R.

BIP = all possible(I1,P1, I2,P2, . . . , IN ,PN) : R→ RN ×R

N .

Electrical

circuit

1

2N

k

I1I2

IN

Ik

P1

P2PN

Pk

KCL: I1+ I2+ · · ·+ IN = 0.

Analysis & synthesis

Analysis:

Given circuit architecture and element laws,

find BIP.

Synthesis:

Given BIP and building blocks,

find circuit architecture.

Which BIP’s can be synthesized?

Building blocks

Resistor, inductor, capacitor, connector

1111

2

2 22 N

Element laws, e.g. inductor

I1+ I2 = 0, P1−P2 = Lddt

I1.

L = inductance.

Transformer

1

2

3

4

n

I1+ I2 = 0, I3+ I4 = 0,

I3 =−n I1, (P1−P2) = n (P3−P4).

n = ‘turns ratio’.

Gyrator

1

2

3

4

ρ

I1+ I2 = 0, I3+ I4 = 0,

(P1−P2) = ρ I3, (P3−P4) =−ρ I1.

ρ = ‘gyrator resistance’.

Tellegen B.D.H. : ‘The gyrator, a new electric network element’,Philips Research Reports, 3, pp. 81-101, 1948.

RLCTG Synthesis

Terminal synthesis

Determine the terminal behaviors BIP that are

achievable by interconnecting a finite number of

positive resistors,

positivecapacitors,

positive inductors,

transformers,

and gyrators.

Ports

The port behavior

circuit

Electrical

1 23

4

2k-12k

2N-12N

Electrical

circuit

V1

I1

V2I2

Vk

Ik

VN

IN

Port behavior:

BIV = {(I1,V1, I2,V2, . . . ,VN , IN) | ∃ P1,P3, . . . ,P2N−1 :

(I1,P1,−I1,P1−V1, . . . , IN ,P2N−1,−IN,P2N−1−VN) ∈ BIP}

Unit transformer termination

Electrical

circuit

1

2

Port behavior ⇔ unit transformer termination.

4-terminal circuit or 2-port circuit?

1

2

3

4

1

2

3

4

1

2

3

4

loadsource

2-terminal case

1

2

Electrical Electricalcircuitcircuit

P1

P2

I1

I2

V

I

A 2-terminal circuit is a 1-port,

(assuming KCL and KVL).

Port = WLOG in 2-terminal case.

Port synthesis

Determine the port behaviors BIV that are

achievable by interconnecting a finite number of

positive resistors,

positivecapacitors,

positive inductors,

transformers,

and gyrators.

Synthesis conditions

Properties of the port behavior

The port behavior BIV ⊆ (RN ×RN)R of an

interconnection of RLCTG’s is

◮ linear,

◮ time-invariant ,

◮ finite-dimensional,

◮ hybrid ,

◮ passive.

Properties of the port behavior

‘Hybrid’ : ⇔ Each port is either current driven or

voltage driven, meaning∃ an input/output partition

input

I1...

IN′

VN′+1

...

VN

7→

V1

...

VN′

IN′+1

...

IN

output

LTIFD ; rational transfer f’n G ∈ R(ξ )N×N.

E.g. ‘impedance’ V = ZI , ‘admittance’ I = YV .

Properties of the port behavior

‘Passive’ :⇔

[[(I,V ) ∈ BIV ]] ⇒ [[∫ 0

−∞I⊤(t)V (t)dt ≥ 0 ]].

⇔ G is ‘positive real’

i.e. [[s ∈ C, real part(s)> 0]]⇒

[[G(s)+G(s̄)Hermitian conjugate� 0]].

Basic synthesis result

A hybrid transfer function

G ∈ R(ξ )N×N

is synthesizable as the

N-port behavior of an RLCTG circuit

if and only if G is

positive real.

V. Belevitch, Classical Network Theory, Holden-Day, 1968.

B.D.O. Anderson, S. Vongpanitlerd,Network Analysis and Synthesis.A Modern Systems Approach, Prentice Hall, 1972.

Other synthesis questions

Of interest:

◮ RLCTG,

◮ RLCT,

◮ RLC,

◮ LC, RL, RC,

◮ RTG, RT, GT, T,

◮ R,

◮ etc.

Memoryless synthesis

G ∈ RN×N

Transformer circuit

V1

I2

=

0 N

−N⊤ 0

I1

V2

is realizable using transformers.

Transformer circuit

V1

I2

=

0 N

−N⊤ 0

I1

V2

is realizable using transformers.

Multivariable generalization ofI1 I2

V1 V2

n

V1

I2

=

0 n

−n 0

I1

V2

Transformer synthesis

I1

I2

V1

V2

I3

I4

V3

V4

n11

n12

n21

n22

Transformer synthesis

I1

I2

V1

V2

I3

I4

V3

V4

n11

n12

n21

n22

V1

V2

−−

I3

I4

=

0 0

0 0

n11 n12

n21 n22

−n11 −n21

−n12 −n22

0 0

0 0

I1

I2

−−

V3

V4

Transformers & Gyrators

V1

I2

= G

I1

V2

with

G+G⊤ = 0

is realizable using gyrators and transformers.

Transformers & Gyrators

V1

I2

= G

I1

V2

with

G+G⊤ = 0

is realizable using gyrators and transformers.

Assume (WLOG) V = GI (impedance)

Factor G = NJN⊤ with J =

0 −I

I 0

Gyrator extraction

Synthesize using transformers

V

I′

=

0 N

−N⊤ 0

I

V ′

.

Synthesize using gyrators V ′ =−JI′.

V = NV ′ =−NJI′ = NJN⊤I = GI.

Gyrator extraction

I

V

V ′1V ′

1

V ′2

−I′1I′1

−I′2I′2

V ′2

1

trafos

Transformers, gyrators, & resistors

V1

I2

= G

I1

V2

with

G+G⊤ � 0

is realizable using resistors, gyrators, and trafos.

Resistor extraction

Assume (WLOG) V = GI (impedance)

Write 12(G+G⊤) = S⊤S.

Synthesize using gyrators and transformers:

[

VV ′

]

=

[

G−S⊤S S⊤

−S 0

][

II′

]

.

Synthesize using resistors: V ′ =−I′.

V = (G−S⊤S)I +S⊤I′ = (G−S⊤S)I −S⊤V ′ = (G−S⊤S)I +S⊤SI = GI.

Resistor extraction

I

V

V ′1V ′

1

V ′2

−I′1I′1

−I′2I′2

V ′2

TG’s

Memoryless synthesis

We have hence proven that

V1

I2

= G

I1

V2

with

G+G⊤ � 0

realizable using resistors, gyrators, transformers.

Dynamic synthesis

G ∈ R(ξ )N×N

Realization theory

G ∈ R(ξ )N×N . (WLOG) proper, impedance.

to be synthesized: V = GI

Realization theory

G ∈ R(ξ )N×N . (WLOG) proper, impedance.

to be synthesized: V = GI

Well-known theorem: ∃[

A B

C D

]

such that

ddt

x=Ax+BI,V =Cx+DI ; G(s) = D+C(Is−A)−1B.

∃[

A B

C D

]

such that the system is state-controllable

and state-observable (‘minimality’).

KYP lemma

G(s) = D+C(Is−A)−1B is positive real

if and only if there exists P = P⊤ ≻ 0 such thatddt x = Ax+BI,V =Cx+DI implies

ddt

12

x⊤Px ≤ I⊤V .

‘dissipation inequality’.

KYP lemma

G(s) = D+C(Is−A)−1B is positive real

if and only if there exists P = P⊤ ≻ 0 such thatddt x = Ax+BI,V =Cx+DI implies

ddt

12

x⊤Px ≤ I⊤V .

‘dissipation inequality’.

⇔

A⊤P+PA PB−C⊤

B⊤P−C −D−D⊤

� 0.

KYP lemma

P = S⊤S,[

A B

C D

]

7→[

S−1AS S−1B

CS D

]

G positive real if and only if ∃[

A B

C D

]

such that

G(s) = D+C(Is−A)−1B,

−A −B

C D

+

−A −B

C D

⊤

� 0.

i.e.,ddt

12||x||2 ≤ I⊤V . ‘Passive realization’.

Reactance extraction

Synthesize using trafos, gyrators, and resistors:

V ′

V

=

−A −B

C D

I′

I

.

Synthesize using inductors: −ddt

I′ =V ′.

V ′ =−AI′−BI

I =CI′+DI

⇔

ddt I′ = AI′+BI

I =CI′+DI

⇔ tf fn equals G.

Reactance extraction

I

V

V ′1V ′

1

V ′2

−I′1I′1

−I′2I′2

V ′2

TGR’s

Summary

Synthesis

Positive realness⇒ KYP lemma ⇒∃ passive realization.Passive realization + reactance extraction⇒ memoryless case.G+G⊤ � 0 + resistor extraction⇒ G+G⊤ = 0.G+G⊤ = 0 + gyrator extraction ⇒ symmetric G+G⊤ = 0.symmetric G+G⊤ = 0⇒ bank of transformers.

Reciprocity

Symmetry

2-port

Symmetry

2-port

2-port2-port

I

V

I′

V

[[reciprocity ]] :⇔ [[I = I′]].

Reciprocity

V = ZI is reciprocal :⇔ Z = Z⊤.

V1

...

VN′

−−−

IN′+1

...

IN

= G

I1...

IN′

−−−

VN′+1

...

VN

is reciprocal

:⇔

G11 G12

G21 G22

satisfies G11 = G⊤11,G22 = G⊤

22,G12 =−G⊤21.

Reciprocal building blocks

1111

2

2 22 N

V = RI, ddt I = LV, I =C d

dtV , trivially reciprocal.

Connector:

P1

P2

...

Pn−1

−−−

In

=

0 0 · · · 0 1

0 0 · · · 0 1

...

0 0 · · · 0 1

−1 −1 · · · −1 0

I1

I2...

In−1

−−−

Pn

⇒ reciprocal.

Reciprocal building blocks

I1 I2

V1 V2

n

V1

I2

=

0 n

−n 0

I1

V2

⇒ trafo is reciprocal.

Non-reciprocal building block

1

2

3

4

ρ

V1 = ρ I2, V2 =−ρ I1;

V1

V2

=

0 ρ

−ρ 0

I1

I2

⇒ gyrator is NOT reciprocal .

Interconnection

The interconnection of reciprocal is reciprocal.

RLCT circuits are therefore

◮ linear, time-invariant, finite-dimensional,

◮ hybrid,

◮ passive,

◮ reciprocal.

Reciprocal synthesis

Reciprocal synthesis conditions

V1

...

VN′

−−−

IN′+1

...

IN

= G

I1...

IN′

−−−

VN′+1

...

VN

is synthesizable as a RLCT circuit if and only if

G ∈ R(ξ )N×N is positive real &

G =

G11 G12

G21 G22

satisfies G11 = G⊤11,G22 = G⊤

22,G12 =−G⊤21.

Memoryless reciprocal synthesis procedure

Memoryless case. First impedance:

V = ZI, Z ∈ RN×N, Z = Z⊤ � 0.

Memoryless reciprocal synthesis procedure

Memoryless case. First impedance:

V = ZI, Z ∈ RN×N, Z = Z⊤ � 0.

Write Z = NN⊤. Synthesize using transformers:

V

V ′

=

0 N

−N⊤ 0

I

I′

.

Synthesize using resistors:V ′ =−I′.

V = NI′ =−NV ′ = NN⊤I = ZI.

Memoryless reciprocal synthesis procedure

Memoryless case. General case:

V1

I2

=

G11 G12

−G⊤12 G22

I1

V2

Maximally current driven

⇒ G22= 0,G11= G⊤11� 0.

Memoryless reciprocal synthesis procedure

Write G11= NN⊤. Synthesize using transformers:

V1

V ′

I2

=

0 N G12

−N⊤ 0 0

−G⊤12 0 0

I1

I′

V2

.

Synthesize using resistors:V ′ =−I′.

V1

I2

=

NI′+G12V2

−G⊤12I1

=

−NV ′+G12V2

−G⊤12I1

=

NN⊤I1+G12V2

−G⊤12I1

=G

I1

V2

.

Resistor extraction

I

V

V ′1V ′

1

V ′2

−I′1I′1

−I′2I′2

V ′2

Trafos

Dynamic reciprocal synthesis procedure

Reciprocity and passivity:

G ∈ R(ξ )N×N is positive real &

G =

G11 G12

G21 G22

satisfies G11 = G⊤11,G22 = G⊤

22,G12 =−G⊤21.

i.e.

G p.r. and GΣe = ΣeG⊤,Σe =

In1 0

0 −In2

.

Dynamic reciprocal synthesis procedure

∃ realization[

A B

C D

]

such that simultaneously

−A −B

C D

+

−A −B

C D

⊤

� 0.

−A −B

C D

Σi 0

0 Σe

=

−A −B

C D

⊤

Σi 0

0 Σe

.

Σe =

In3 0

0 −In4

: ‘internal passivity’ and ‘internal reciprocity’.

Various proofs

◮ Several constructions in

B.D.O. Anderson, S. Vongpanitlerd,Network Analysis and

Synthesis. A Modern Systems Approach, Prentice Hall, 1972.

◮ JCW, Dissipative dynamical systems, Part II,

Archive for Rational Mechanics and Analysis, 45, pp. 352-393,

1972.

Sol. set to KYP is convex compact, and Brouwer’s fixpoint thm.

◮ Reciprocal synthesis is also in the classical literature.

V. Belevitch, Classical Network Theory, Holden-Day, 1968.

◮ T. Reis and JCW, A balancing approach to the realization of

systems with internal passivity and reciprocity,SCLetters, 60,

pp. 69-74, 2011.

Positive real balancing⇒ internal passive and reciprocal.

Reactance extraction

Trafos and resistors:

V ′1

I′2

V1

I2

=

−A −B

C D

I′1

V ′2

I1

V2

.

Inductors: −ddt

I′1 =V ′1. Capacitors: −

ddt

V ′2 = I′2.

ddt I′1ddt V

′2

V1

I2

=

−V ′1

−I′2

V1

I2

=

A B

C D

I′1

V ′2

I1

V2

⇔ tf fn equals G.

Summary

Conclusions

Conclusions

◮ Circuit synthesis shows the power and

effectiveness of state space thinking.

◮ Why ports instead of terminals in caseN > 1,

surely N > 2?

◮ Open problem: Do Bott-Duffin from state point

of view. Requires non-minimal, non-controllable

realizations.

◮ Open problem: ResistiveN-ports.

TransformerlessN-terminal resistive case solved.

Copies of the lecture frames available from/athttp://www.esat.kuleuven.be/∼jwillems

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