IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 11, NOVEMBER 1997 1837

Surface Passivation of GaAs MESFET’sGreg W. Charache,Member, IEEE, S. Akram, Edward Wilfrid Maby, and I. B. Bhat

Abstract— The metal semiconductor field effect transistor(MESFET) represents a more realistic test for “passivation”efficacy than conventional capacitor test structures due toits prototypical fabrication process. This paper evaluatesGallium–Arsenide (GaAs) surface passivation films utilizing theMESFET as a test vehicle. For this study, gate-to-drain leakagecurrent, gate-to-drain breakdown voltage, complex impedanceversus frequency, and low-frequency noise measurements areperformed on MESFET’s with various passivation films. Theresults indicate that a hydrogen plasma used to “pre-clean” theGaAs surface in conjunction with an in situ plasma-enhancedchemical vapor deposition (PECVD) Si3N4 passivation filmyields the best performance. In contrast, atomic-layer-epitaxialZnSe demonstrated inferior performance (even in comparison toPECVD Si3N4 passivation films that did not receive a hydrogen“pre-clean”).

I. INTRODUCTION

PASSIVATION of the Gallium–Arsenide (GaAs) surfacecontinues to be one of the most difficult problems facing

the advancement of GaAs technology. The surface imposesmany constraints in the design of all types of GaAs devicesfrom the basic (solar cells, LED’s) to the more complex [het-erostructure bipolar transistors (HBT’s), high electron mobilitytransistors (HEMT’s), and metal semiconductor field effecttransistors (MESFET’s)]. Unlike the electrically passive Si-SiO interface, GaAs passivation technology is still underactive development. Nevertheless, recent results suggest thatadvances in understanding the nature of surface states areleading toward satisfactory passivation technologies [1]–[5].The MESFET was chosen as a test vehicle to analyze theeffectiveness of passivation films since this device requiresa prototypical fabrication process. In addition, the MESFEToffers a wide array of diagnostic techniques that allow aquantitative investigation of the GaAs surface.

The first section of this paper outlines the MESFET fab-rication process, and in particular describes the MESFET“passivation” technologies that were investigated. Next thevarious MESFET surface characterization measurements arepresented. These include: gate-to-drain leakage current, gate-to-drain breakdown voltage, complex impedance versus fre-quency and low- frequency noise measurements. Collectivelythese techniques give a clear qualitative and quantitativepicture of the GaAs surface in a technologically important,commercially available device.

Manuscript received October 18, 1996; revised April 10, 1997. The reviewof this paper was arranged by Editor N. Moll.

G. W. Charache is with the Knolls Atomic Power Laboratory, Lockheed-Martin Corp., Schenectady, NY 12301-1072 USA.

S. Akram is with Micron Semiconductor, Boise, ID USA.E. W. Maby and I. B. Bhat are with the Department of Electrical, Computer,

and Systems Engineering and Center for Integrated Electronics, RensselaerPolytechnic Institute, Troy, NY 12180 USA.

Publisher Item Identifier S 0018-9383(97)07722-8.

Two MESFET passivation techniques are compared: aninsitu surface preparation technique (hydrogen plasma) followedby dielectric deposition and growth of an epitaxial passivationfilm (atomic-layer-epitaxy ZnSe). The results indicate that ahydrogen plasma used to “pre-clean” the GaAs surface inconjunction with anin situ PECVD Si N passivation filmyields the best performance. In contrast, atomic-layer-epitaxialZnSe demonstrated inferior performance (even in comparisonto PECVD Si N passivation films that did not receive ahydrogen “pre-clean”).

II. DEVICE DESIGN/FABRICATION

For this study, annular MESFET’s were used to avoidorientation-dependent and edge-breakdown effects. These de-vices were fabricated with gate lengths of 5, 10, 20, 30, and40 m with a constant source/drain spacing of 60m (Thisallowed differentiation between surface and bulk deep-leveleffects).

Initially, semi-insulating 100 GaAs wafers were subjectedto blanket silicon implantation at a fluence of 510 cmand an energy of 100 keV to form the MESFET channel. Theimplant was activated in an arsine (AsH) overpressure at atemperature of 850C for 20 min. The measured sheet resis-tance following implant activation was 500 . Followinga solvent clean, individual MESFET’s were isolated with amesa etch.

The ohmic metallization for the source/drain contacts con-sists of 100-nm thick Au–Ge (12%), 30-nm thick Ni, and100-nm thick Au. Following metal liftoff, the ohmic contactswere alloyed by means of a rapid thermal anneal in a nitrogenambient. This was performed in a two-step process: firstheating to 350 C for 15 s, and then ramping up to 450Cfor 5 s.

Approximately 50 nm of the GaAs surface was then re-moved in a dilute Karos etch (HSO H O H O

). This etch was found necessary to reduce the leakagecurrent between the source and drain contacts and to preventpremature gate-to-drain breakdown. Next, titanium gate metalwas electron-beam evaporated and lifted-off to a thickness of300 nm. Immediately prior to MESFET passivation, the waferswere dipped in NHOH H 0 for 30 s (native oxideremoval), rinsed in DI water for 30 s and blown dry withnitrogen.

A hydrogen-plasma surface clean was performed in aPlasma-Therm 73 parallel-plate reactor that features a 13.56-MHz RF generator. Wafers were placed on a groundedcathode heated to a temperature of 250C, and plasmaconditions (power, pressure, and time) were varied in order tooptimize the surface passivation without introducing plasma

0018–9383/97$10.00 1997 IEEE

1838 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 11, NOVEMBER 1997

damage—as described later. A plasma-enhanced chemicalvapor deposition (PECVD) silicon nitride passivation filmwas then depositedin situ using 2% SiH in nitrogen (as asource gas) and helium (added to produce a low stress film).The PECVD silicon nitride deposition conditions (0.01 W/cm(30 W), 900 mT, 250 C, 22 min) yielded a thickness of 100nm and a refractive index of 1.9.

As discussed by others [7], exposure of Si-doped GaAsto a hydrogen plasma neutralizes Si donors by the formationof electrically inactive Si-hydrogen complexes. This was ob-served in initial experiments by the increased source-to-drainresistance with increased plasma pressure and power. Despitethis behavior, recovery of the electrical activity of the silicondonors was achieved with a 2-min nitrogen anneal at 400C.

Atomic-layer-epitaxial (ALE) ZnSe MESFET passivationwas performed on an RF-heated susceptor within a horizontal,50-mm-diameter reactor. During ALE growth, each reactantis separately introduced into the reactor and is followed by ahydrogen flush. For these experiments, a single growth cycleconsisted of a 2-s DMZn flow, a 3-s hydrogen flush, a 2-s HSeflow, and a 3-s hydrogen flush. Using this growth technique,one can theoretically grow one atomic layer of ZnSe over thesubstrate per cycle [6]. The ZnSe growth was performed at100 Torr, 200 C, for 50 min with DMZn and HSe partialpressures of 3 10 atm. and 2 10 atm., respectively.This formed a final thickness of 100 nm.

ZnSe growth temperature or layer thickness had no effecton the measured electrical parameters described in subse-quent sections. Moreover, post-deposition anneals on ZnSe-passivated MESFET’s at 400C for up to 10 min did notchange any device electrical characteristics.

Following device passivation, contact-cut holes were etchedabove the gate/drain/source pads following another lithographystep. The silicon nitride was plasma etched in CF/4% O atroom temperature under the following conditions: 300 mTorr,250 W, 30 s. In contrast, the ZnSe is wet-etched in dilute HCl(20 1) for 30 s.

III. MESFET CURRENT–VOLTAGE MEASUREMENTS

MESFET – measurements were performed using aHP4140B pA meter/dc voltage source. Both gate-to-drainbreakdown voltage and leakage current were extracted fromthese data. The MESFET breakdown voltage was definedas the drain-to-source voltage that increased the zero-biasdrain saturation current by 25% near the onset of avalanchebreakdown, while the leakage current was measured at a gatereverse bias of 10 V. The breakdown voltage definitionwas chosen since devices with large gate-to-drain leakagecurrents exhibited very soft breakdown characteristics. Allmeasurements were performed in the dark on a probe stationwithin a metal grounded box.

Instantaneous gate-drain breakdown in GaAs MESFET’sis dependent on a number of independent parameters thatinclude: channel doping, gate length, gate-to-drain spacing,and surface depletion/surface state density between the gateand drain. It is generally accepted that in order to delaythe onset of instantaneous avalanche breakdown, reduction

Fig. 1. MESFET gate-to-drain breakdown voltage for hydrogen plasma“pre-cleans” at various pressures. In each case, the pre-clean was followedby in situ deposition of PECVD Si3N4.

of the electric field between the gate and drain contacts isrequired. This can be accomplished in a number of ways,such as: increasing the gate-to-drain spacing [8], increasing thechannel thickness between the gate and drain (recessed gate)[9], and using a gate insulator [10]. In addition, it has also beenshown both theoretically and experimentally that an increasein surface-state density within the source-drain access regionsleads to increased gate-to-drain breakdown voltage [11], [12].This rather unintuitive concept can be explained as follows. Asthe reverse bias on the gate electrode is increased, the amountof gate leakage current also increases as a consequence ofeither tunneling or thermionic emission. The emitted electronsare trapped by surface states, causing the build-up of a largeamount of negative surface charge between the gate and drain[13]–[15]. This is analogous to the use of a field plate forhigh-voltage p-n junctions [16]. The more surface states thatare available to trap electrons, the greater the reduction ofthe lateral electric field between the gate and drain electrodes.Thus, higher breakdown voltages are observed in devices thathave a higher density of surface states.

Fig. 1 illustrates this effect on the gate-to-drain breakdownvoltage for a MESFET exposed to a 30-W, 30-s hydrogenplasma “pre-clean” at various pressures followed byin situdeposition of PECVD silicon nitride. Three distinct regionsare observed in the figure. At low pressure (0.5 Torr),the hydrogen plasma treatment does not sufficiently “clean”the surface and a high breakdown voltage is observed. Atmoderate pressures (0.5–1 Torr), the best surface was obtainedas evidenced by the low breakdown voltage. Finally, at highpressures (1 Torr), the plasma treatment induces surfacedamage, and the breakdown voltage returns to a high value.Anneals at 400 C for as long as 10 min were ineffectivefor eliminating plasma induced damage. Higher power andlonger duration plasma “pre-cleans” at moderate to high pres-sures also induced nonrecoverable plasma damage and highbreakdown voltages were observed.

Fig. 2 indicates typical gate-to-drain breakdown voltages forMESFET’s with different surface treatments and passivation

CHARACHE et al.: SURFACE PASSIVATION OF GaAs MESFET’S 1839

Fig. 2. Correlation of MESFET gate-to-drain breakdown voltage, leakagecurrent, and impedance magnitude dispersion,�Z, for various surface treat-ments and passivation films as specified in Table I, ()—breakdown voltage,(�)—leakage current, ()—�Z.

films. The corresponding surface pre-treatments and passiva-tion films are specified in Table I. The best result (lowestbreakdown) was obtained for the case of a moderate pressure(0.5–1 Torr) hydrogen plasma “pre-clean” followed byin situdeposition of PECVD silicon nitride. Note that for the caseof no surface pretreatment, SiN films yielded better resultsthan ZnSe films.

Leakage current measurements [Fig. 2] correlate well withthe behavior observed for gate-to-drain breakdown voltagemeasurements. The corresponding surface pre-treatments andpassivation films are given in Table I. The best surface (lowestleakage current) was obtained with the moderate pressure(0.5–1 Torr) hydrogen plasma “pre-clean” followed byin situdeposition of PECVD silicon nitride. Once again, for the caseof no surface pretreatment, SiN films yielded better resultsthan ZnSe films.

IV. COMPLEX IMPEDANCE—F REQUENCY MEASUREMENTS

Complex impedance versus frequency measurements wereperformed using a HP4192A LF Impedance Analyzer from 10Hz to 1 MHz. For the MESFET’s of this study, the compleximpedance was measured between the source and drain whilethe gate was connected to system ground. All measurementswere performed in the dark within a metal grounded box.

The parameter (10 Hz)/ (1 MHz) was found tocorrelate well with MESFET breakdown voltage measure-ments, except in the case of a bare surface [Fig. 2]. Thisdemonstrates the complementary nature of the impedanceversus frequency and breakdown voltage measurements. Sincethe impedance measurement only covers a fixed frequencyrange, any deep-level traps that have emission time constantsoutside this range will go undetected. Thus, “slow surfacestates” (i.e., time constants greater than 0.1 s) which are foundon bare GaAs surfaces will not be detected by the parameter

, since frequencies less than 10 Hz were not measured. Incontrast, the breakdown voltage is a measure of the total trapdensity. The small on the bare GaAs surface is not due tolow total surface state density, it is a measure of low surface

TABLE IEVALUATED SURFACE PRE-TREATMENTS AND PASSIVATION FILMS

TABLE IIEXPERIMENTALLY OBSERVED SURFACE-STATES IN GaAsMESFET’s USING IMPEDANCE PHASE MEASUREMENTS

state density with time constants between 0.1 s and 1 ms. Thus,caution must be exercised when interpreting surface qualitywhen only impedance versus frequency data is available.

Measurement of the MESFET channel impedance versusfrequency as a function of temperature allows the determi-nation of the activation energy and capture cross-section ofdominant surface states with discrete energies [17]. Figs. 3–7illustrate the temperature dependencies of the impedance phasedata for MESFET’s with a 10-m gate length that feature: abare surface, a silicon nitride passivation film with no hy-drogen plasma pre-treatment, a silicon nitride passivation filmwith an “optimum” hydrogen plasma pre-treatment, a siliconnitride passivation film with an “intensive” hydrogen plasmapre-treatment, and a ZnSe passivation film, respectively.

Fig. 3 shows that a bare surface contains many “slow” sur-face states, and a distinct peak in the phase at low frequencies(ET0) cannot be resolved even at 433 K. The trap at higherfrequencies (ET1) is also present on unpassivated and PECVDSi N -passivated samples, regardless of surface pretreatment.Two distinct peaks in the phase are observed on a PECVDsilicon nitride passivated MESFET that did not receive ahydrogen plasma pre-clean [Fig. 4]. Trap ET1 corresponds tothe same trap that was present on the bare surface, while trapET4 is newly introduced by the PECVD SiN -passivationfilm. Trap ET4 can be removed with an “optimum” hydrogenplasma pre-clean [Fig. 5]. However, if the hydrogen plasmaexposure is too “intensive,” then an additional trap (ET3) isintroduced—presumably due to plasma damage—and trap ET4is either overwhelmed or absent [Fig. 6]. Finally, a differentdominant surface-state trap (ET2) is present for a MESFETpassivated with the ALE-ZnSe [Fig. 7].

An Arrenhius analysis of the preceding data is presentedin Fig. 8. The slope of the resulting Arrenhius plot yields the

1840 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 11, NOVEMBER 1997

Fig. 3. Temperature dependent impedance phase versus frequency data fora MESFET with no passivation film, (+)—333 K, (�)—373 K, (�)—413 K,(r)—433 K.

Fig. 4. Temperature dependent impedance phase versus frequency data fora MESFET with a PECVD silicon nitride passivation film and no hydrogenplasma pre-treatment, ()—333 K, (r)—353 K, (})—373 K, (�)—393 K,(+)—413 K, (�)—433 K.

activation energy of the related trap, while the-axis interceptyields the capture cross-section. Trap ET1 was observed onMESFET’s that were unpassivated or passivated with PECVDSi N and agrees well with numerous reports of a singledominant mid-gap surface state [18]–[23]. Trap ET2 wasconsistently found on all ZnSe passivated MESFET’s andseems sufficiently distinct from ET1 to be attributed to theZnSe–GaAs interface. This corresponds well with the-0.6level also reported in ZnSe–GaAs heterostructures [24], [25].Trap ET3 was found on MESFET samples that underwent an“intense” hydrogen pre-clean, and it may correspond to an-0.42 level that was induced by Hplasma damage in anotherstudy [26]. Trap ET4 was only observed on MESFET’s that

Fig. 5. Temperature dependent impedance phase versus frequency data for aMESFET with a PECVD silicon nitride passivation film and an optimumhydrogen plasma pre-treatment, ()—333 K, (r)—353 K, (})—373 K,(�)—393 K, (+)—413 K, (�)—433 K.

Fig. 6. Temperature dependent impedance phase versus frequency data for aMESFET with a PECVD silicon nitride passivation film and an excessivehydrogen plasma pre-treatment, ()—333 K, (r)—353 K, (})—373 K,(�)—393 K, (+)—413 K, (�)—433 K.

were passivated with PECVD SiN . None of the observedtraps appear to be correlated with deep levels associated withelectron-beam-induced damage (presumably a consequence ofproper shielding within the metallization evaporator).

V. LOW-FREQUENCY NOISE MEASUREMENTS

A Stanford Research 530 Lock-in Amplifier was used tomeasure the output current noise spectral intensity in MES-FET’s from 100 Hz to 100 kHz. In general, the backgroundnoise of the bias network was 1–2 orders of magnitude belowthe output current noise of the MESFETs; however, essentiallyno difference was observed between any of the passivation

CHARACHE et al.: SURFACE PASSIVATION OF GaAs MESFET’S 1841

Fig. 7. Temperature dependent impedance phase versus frequency data for aMESFET with a ZnSe passivation film, (+)—333 K, (�)—353 K, (�)—373K, ( )—413 K, ( )—433 K.

Fig. 8. Arrenhius plot extracted from MESFET temperature dependentimpedance phase measurements, ()—ET1, (�)—ET2, (�)—ET3, (+)—ET4.

films studied and a bare surface. Thus, the dominant noisemechanism for these devices does not appear to be thesurface, but rather one of the numerous other mechanismsoutlined in the literature [27]–[32]. The bias dependence of themagnitude of the noise spectral intensity at 1 kHz showed a

dependence within the linear region of operation, with2.2. This 2.2 factor lies between the those of the two theoriesdescribed by Sah ( 2.5) [30] and Van der Ziel ( 2)[33]. Thus, at least part of the dominant noise spectrum canbe attributed to the conduction channel.

VI. CONCLUSION

We have experimentally investigated the effectiveness ofvarious low-temperature surface treatments and passivationfilms for GaAs. For this study, MESFET’s were chosen asa test vehicle for a number of reasons. In particular, the

MESFET represents the end-product of a long fabricationsequence and thus gives a realistic measure of the efficacyof a passivation film. Moreover, the MESFET is amenableto numerous characterization techniques that yield detailedinformation on the electrical properties of the GaAs surface.Although determination of surface state density is more dif-ficult to accurately extract with MESFET’s than with MIScapacitors, the results presented in this paper represent a morerealistic picture of the efficacy of a passivation film.

Based on the electrical characterization data, GaAs surfacepreparation is of primary importance before the depositionof a passivation film. This supports the widely observedfact that most passivation films yield similar electrical datawhen no surface pre-treatment is utilized. In this study, GaAsMESFET’s whose exposed surface was “pre-cleaned” witha hydrogen plasma and followed byin situ PECVD Si Npassivation demonstrated reduced gate-to-drain leakage cur-rent, reduced gate-to-drain breakdown voltage, and a reducedchange in the magnitude of the low- and high-frequencyimpedance ( ). In contrast, ALE ZnSe-passivated MES-FET’s demonstrated inferior performance to devices featuringPECVD Si N that did not receive a hydrogen plasma pre-clean. Thus, a PECVD passivation film in conjunction with anin situ surface clean may yield a promising GaAs passivationtechnology.

ACKNOWLEDGMENT

The authors gratefully acknowledge the staff support of theCenter for Integrated Electronics Microfabrication Cleanroom,Rensselaer Polytechnic Institute and M/A COM, Inc. fordevice fabrication support.

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Greg W. Charache(S’87–M’94) was born in Medina, NY, on July 25, 1966.He received the B.S.E.E. degree from the University of Delaware, Newark,DE, in 1988, and the M.S.E.E degree and Ph.D. degree in surface passivationof GaAs MESFET’s, both from Rensselaer Polytechnic Institute, Troy, NY,in 1991 and 1994, respectively.

In 1994, he joined Lockheed–Martin, Knolls Atomic Power Laboratory,Schenectady, NY, where he is currently developing low-bandgap thermopho-tovoltaic devices. He has published several articles in the area of semicon-ductor device fabrication and characterization.

Dr. Charache received the Charles M. Close Doctoral Award and is amember of Tau Beta Pi.

S. Akram received the Ph.D. degree in electrical engineering from RensselaerPolytechnic Institute, Troy, NY, in 1994. His dissertation work involved thegrowth and characterization of ZnSe epitaxial layers for blue light emitterapplications.

In 1994, he joined Micron Semiconductor, Inc., Boise, ID, where he iscurrently working to develop submicron VLSI devices.

Edward Wilfrid Maby was born in Portsmouth, NH, on December 25, 1951.He received the S.B. degree in electrical engineering, the S.B. degree inphysics, the S.M. degree in electrical engineering, and the Ph.D. degree inelectrical engineering, all from the Massachusetts Institute of Technology,Cambridge, in 1975 and 1979, respectively. While a graduate student, hewas supported, in part, by an RCA Sarnoff Fellowship. His doctoral thesisconcerned MeV ion-implanted boron layers into silicon.

From July 1979 to June 1980, he was a Member of the Technical Staffat the RCA Sarnoff Laboratories, Princeton, NJ, where he worked on ionimplantation problems in silicon and other materials. From July 1980 toJune 1983, he was a Research Associate in the Department of ElectricalEngineering and Computer Science, Massachusetts Institute of Technology,where his research involved the fabrication of three-dimensional integratedcircuit structures. In July 1983, he joined the faculty at Rensselaer PolytechnicInstitute, Troy, NY, where he is presently an Associate Professor of Electrical,Computer, and Systems Engineering. His current research interests includesolid-state micromechanical structures, GaAs/(Al,Ga)As heterojunction de-vices, and silicon-on-insulator materials for MMIC’s.

I. B. Bhat received the B.Tech. degree from the Indian Institute of Technology,Madras, India, and the Ph.D. degree in electrical engineering from RensselaerPolytechnic Institute (RPI), Troy, NY, in 1985.

In 1985, he joined the Electrical, Computer, and Systems EngineeringDepartment, RPI, where he is currently an Associate Professor. His researchinterests include narrow-gap materials, such as GaInSb and HgCdTe, as wellas high-band-gap materials, such as GaN and ZnSe. Recently, he has beenworking on developing GaInSb-based devices for thermophotovoltaic deviceapplications. He has published over 60 articles on the epitaxial growth of theabove materials and their characterization.