Summary of Continuous Acquisition Pixel Detector ...varner/ILC_VTXrev_CAP_FNAL07.pdf · Summary of Continuous Acquisition Pixel Detector Collaboration Activities 7 VDD VDD GND M1

0Summary of Continuous Acquisition Pixel Detector Collaboration Activities

ILC VTX Issues being Addressed

• Sensor Design• Optimization studies for thin pixel device for Super-B upgrade• Study of radiation hardness/max storage density

• High Performance/IR Design• Experience with low momentum track finding under high occupancy

conditions• Detector-Machine Interface Background Monitoring and Mitigation

• Low Occupancy• High frame rate architectures• Deeper storage outside acceptance

• EMI Mitigation• RF isolation experience (UHF radio neutrino work)• Robustness against pickup


Relationship to Existing Efforts

• Hear from many this week• Various pieces of the puzzle, far from a complete solution• Timescale not consistent with locking into specific processes• Funding Limitations (collaboration)

• Technology choices (concerns)• Epitaxial structures• SOI initiatives (triple well, 3D)

• To date no thin Si pixel vertex detector fielded• Learn from experience designing/operating• 2012 Belle/KEKB upgrade – possibly also at Frascati• Will lead to an improved detector


In both cases, want to re-use as much as possible


SVT Layer 0

• Depends critically on background level– Striplet solution (baseline)

• Basically already available technology but more sensitive to background. OK for 1MHz/cm2

• Some margin to improve background sensitivity

– Monolithic Active Pixel Solution solution (upgrade)

• R&D is still ongoing but giving a big safety margin in terms of performance and occupancy

• Cooling and mechanical issues need work

• Active R&D program in place

V

U1.35 cm

7.7 cm

Basically the same condition as for Super Belle

Continuous Acquisition Pixel Detector Collaboration

G. Varner1, H. Aihara5, Y. Arai3, M. Barbero1, A. Bozek4, T. Browder1, M. Cooney1, P. Chang7, E. Martin1, M. Hazumi3, H. Hoedlmoser1, J. Kennedy1,

S. Olsen1, Z. Natkaniec4, H. Palka4, M. Rosen1, L. Ruckman1, H. Sahoo1,S. Stanič6, G. Taylor2, K. Trabelsi3, T. Tsuboyama3, K. Uchida1 and P. Yuan7

1University of Hawaii, 2 University of Melbourne,3 High Energy Accelerator Research Organization (KEK),

4 H. Niewondiczanski Institute of Nuclear Physics,5 University of Tokyo, 6 Nova Gorica Polytechnic

7 National Taiwan University


Team Experience


Critical R&D Issues (circa 2004)

1. Readout Speed

2. Radiation Hardness

3. Thin Detector

4. Full-sized detector (mech/power)


VDD VDD

GND

M1

M2

M3

Reset

ColumnSelect

Row BusOutput

CollectionElectrode

Cont. Acq. Pixels (CAP) 1 Prototype

Column Ctrl Logic

1.8mm 132col*48row ~6 Kpixels

CAP1: simple 3-transistor cell

Pixel size:

22.5 μm x 22.5 μm

CAPs sample tested: all detectors (>15) function.

Source follower buffering of collected charge

Restores potential to collection electrode

Reset

Vdd Vdd

Collection Electrode

Gnd

M1

M2

M3Row Bus Output

Column Select

charge collection in cluster

405060708090

100110

1 2 3 4 5 6 7 8 9

# pixels in cluster

% c

harg

e / 3

X3

arra

y

Det1Det2Det3Det4

NIM A541:166-171 (2005)


CAP2 – Pipelined operation

Col8

VAS

VddPixel Reset

Sense

Output Bus

REFbias

Col2

Col1Sample1

Sample8

Sample2

8 deep mini-pipeline in each cell

Pixel size 22.5 μm x 22.5 μm

3-transistor cell132x48=6336 channels 50688 samples

TSMC 0.35μm

132 x 48

10μs frame acquisition speed achieved!


CAP3: Full-size Detector Test/Lessons learned

Laser scan bench

Laser spot (backside illumination)

noise


Critical C(M)APS R&D Scorecard

1. Readout Speed

2. Radiation Hardness

3. Thin Detector

4. Full-sized detector

100kHz frame rate, 10kHz L2 accept

>= 20MRad

<= 50μm, layer

Span acceptance (reticle limit)

CAP3 too slow, SNR concerns

Leakage current OK (CAP2) for short integration time

50μm LBL test bench, thinning at APTEK (same SNR)

CAP3 large acceptance biasing/uniformity


SNR: Summary of MAPS Efforts

Comparison of Signal-to-Noise

0

5

10

15

20

25

30

CAP1

CAP2

CAP3APS

_LBL

MIMOSA I

MIMOSA II

p13u

mAmpsNwell

13um

MIMOSA8

Apsel

1RAL_

HEPAPS

SN

R


Noise (ENC): Summary of MAPS

Noise Comparison

0

10

20

30

40

50

60

1000 10000 100000 1000000 10000000

Total Number of Storage Cells

Eq

uiv

. N

ois

e C

har

ge

[e-]

CAP1CAP2CAP3MIMOSA2RAL_HEPAPS

Unfortunately signal sizeFixed and small


Buffered LABRADOR (BLAB1) ASIC

• 64k storage samples

• Wilkinson conversion (digital out)

• Fast (sub-uW power)

3mm x 2.8mm, TSMC 0.25um

1.4mV

Low Noise Readout: MAPS applications


CAP4: 3 architectures in AMS 0.35um Opto

CAP4 revision

• Four different architectures• Wilkinson Ramp transfer

encoding• Mostly NMOS space-time

encoding scheme (modest charge collection loss)

• CMOS space-time encoding scheme (large collection efficiency loss)

• Evaluations• Speed • Uniformity• Evaluate space-time technique

• Apply lessons learned


Hit resolution vs. SNR MC

Signal MC:

1) Generate random impact parameter

2) Landau fluctuation of signal

3) Charge diffusion (thermal)

4) Add noise (16e-/30e- system)

5) CoG of hit calculation

Note binary limit: 22.5µm/sqrt(12) ~6.5µm

Good hit resolution even at low SNR

Canonical 4 µm : 4µm*sqrt(12) ~13.85µm


• Binary Readout (11.25um/SQRT(12) ~ 3.25um)

• 100ns sample steps – values shifted out left/right

• Use temporal coincidence and match with fixed latency to reconstruct position and reject out of time hits

Space-Time Encoding

Per row:

External Pipeline (length set by trigger latency):

At trigger latency time, A&B = 1 @ X[j]

B

A

X[j]

A

B


CAP4 Results – laser scan

• Design issues• Transparent latch

(chattering pixels)• Missing transistor

• CAP6 addresses


OKI 0.15um SOI

• Best of both worlds• High resistivity, fully

depleted detector (large signal)

• Excellent deep submicron CMOS

• Wafer bonding• No bump bonding

interconnects • Very low collection

electrode capacitance

• Rad hardness• SOI known to be rad-

hard


CAP5: 2nd iteration in OKI 0.15um SOI

first revision

second revision • First submission• Debugged process for

non-Japanese• Problems with backside

bias/backgate effects

• Second submission• Learn from first lessons • Study process spread• Evaluate space-time

correlation

VCQV

mVvCkTv

Electrodenoise

noise

151.0

822.0_

=Δ

=Δ

=

=


CAP5: 2nd iteration in OKI 0.15um SOIMPW run

• First round• Promise of better S,

same N better SNR• Many other groups

(FNAL/BNL & LBL) subsequently join

• Second round• 4x larger die • Bias effects (FD?)• Other lessons

• Will apply lessons learned • Next SOI run (0.2um)

in January •108 x 34 pixels total structure (28.7 μm by 32.5 μm)•6 row testing structures introduced•Use of CMOS circuits for all structures


Pixel Detector Study Activities

• CAP1/2 [MAPS technology] Studies• Characterization of CAP1 in test beam [NIM A541 (2005) 166]

• Study of radiation hardness/storage [IEEE Trans.Nucl.Sci.52 (2005) 1187]

• Storage density/max. pipeline depth studies

• CAP3 “full size” Detector [NIM A565 (2006) 126]• Development of laser scan system for systematic studies• Systematic scan and study of transfer rate and signal uniformity• Non-uniformity and transfer limitations observed

• CAP4 AMS 0.35um Opto [NIM A568 (2006) 181]• Study of new analog storage/readout CAP6 submitted

• CAP5 SOI prototype – second run received, studying• Study of 0.15um OKI process [SLAC-PUB-12079]

• Fully depleted, time-space correlation storage study CAP7


• Worldwide Effort to field thin Si pixel sensor:– Targets: STAR, Super-B and ILC

– No experiment has yet deployed, 2 roadblocks:• SNR: SOI/better readout looks promising to increase

• Full-size detector: on which technology to gamble?

• Plans:– CAP4 (binary, Wilkinson MAPS) techniques CAP6

– CAP5 (binary) SOI in test CAP7

– Hard to provide specific schedule due to funding uncertainties

– OKI SOI submission in January real prototype

– MAPS thinning proven, Oki SOI to be shown

Status Summary


High Luminosity Lepton Colliders


CAP4: Binary readout

pixel matrix: 17 rows 118 columnspixel size: 25.5 x 30.9 μm2

pixel schematics:


CAP4: Binary readout

re-arranged data output:left out signal : 000100000000000000000…right out signal : 000000000000000000100…

hit reconstruction:calculation of hit position and time from the timing of the left out and right out signals

multiplexing:6 rows to one pad


Test Beam/KEK π2-area

B2 / ACQ monitoringempty tables (1st day)

CAP targets ! / “do not touch” sign

4 F2s / Pixel Sensor/ 1st very rough alignment


Hits! alignment proof


Resolution: GEANT Expectation

3μm input resolution

250um Si1mm plastic

1mm Alumina substrate

3.4 cm3.6 cm4.6 cm


Irradiation: leakage currents

IEEE Trans. Nucl. Sc. 48, 1796-1806,2001

Leakage Current [fA]

# of

pix

els

Before irrad.

200 Krad


Thin Mechanics

Documents

Summary of Continuous Acquisition Pixel Detector ...varner/ILC_VTXrev_CAP_FNAL07.pdf · Summary of Continuous Acquisition Pixel Detector Collaboration Activities 7 VDD VDD GND M1