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1
STR Group
www.str-soft.com
Engineering software package for LEDdesign and optimization
SimuLED ™
2
Prehistory of STR:
1984: Start of the MOCVD modeling activities at Iof fe Institute, St. Petersburg, Russia
1993-1996: Group for modeling of crystal growth and epi taxy at University of Erlangen-Nuernberg, Germany
History of software development
2000: Launch of development of the first specialized software2003: First release of commercial software package 2004: First release of the software for device engin eering
STR Today:
More than 40 scientists and software engineers
Modeling Solutions for Crystal Growth and Devices
3
STR Today
1 – Headquarter and R&D (consulting service and soft ware development)2 – Local offices3 – Local distributors
STR US, Inc.2, Richmond, VA
STR, GmbH2, Erlangen, Germany
SimSciD Corporation 3, Yokohama, Japan
INFOTECH Co.3, Kyunggi-Do, SouthKorea
Paul Materials Co., Ltd. 3, Seoul, South Korea
STR Group, Ltd. 1, St.Petersburg, Russia
Pitotech, Ltd. 3,Chang Hua City, Taiwan
Bulk crystal growth modeling (Si, Ge, SiGe, GaAs, I nP, SiC, AlN, Al 2O3, Optical Crystals)
Epitaxy and deposition modeling (Si, SiGe, SiC, AlGa As, AlGaInP, AlGaInN, high-k oxides)
Modeling of device operation ( LEDs, Laser Diodes, FETs/HEMTs Shottky diodes)
4
Software & consulting services :
- Modeling of crystal growth from the melts and solutio ns: CGSim- Modeling of polysilicon deposition by Siemens process : PolySim- Modeling of bulk crystal growth of SiC, AlN, GaN: ViR- Modeling of epitaxy of compound semiconductors: CVDSim- Modeling of optoelectronic and electronic devices : SimuLED
Customer base:
• More than 100 companies and universities worldwide• Top LED, LD and solar cell manufacturers • Top sapphire, GaAs, GaP, GaN, AlN and SiC wafer manufacturers• Top MOCVD reactor manufacturers
STR activity in software developmentand consulting service
5
SimuLED™
Presentation Layout1. Simulation as a tool for LED design and optimizati on. Why
SimuLED™ ?
2. Basic tools of SimuLED™ package and what questions can be answered using modeling
3. Operation of modern light emitters
A. Current crowding effect on light extraction efficien cy of Thin-Film LEDs
B. Role of ITO-spreading layer on performance of blue LE Ds
C. Modeling of multi-pixel LED array operation
4. SimuLED™ extension: SimuLAMP™ software for Optical and Thermal Management of LED Lamps
5. Conclusion
Main application areas of III-nitride LEDs and LDs
After the first demonstration of high-brightness blue light-emitting diodes (LEDs) in the early 90s. III-nitride semiconductors have soon become the basic materials for visible and ultraviolet optoelectronics,
Green550-520 nm
Blue470-420 nm
Violet405 nm
UV365-340 nm
UV280-250 nm
� Solid-state lighting by RGB mixing
� Signs
� Trafficlights
� Entertainment
� Solid-state lighting with phosphors
� Signs
� Traffic lights
� Displayback-lighting
� Automotive
� DVD writing and playing
� Optical datastorage
� Curing anddrying of inks,coatings, and adhesives
� Medicine
� False banknotedetection
� HR opticallithography
� Water&airdisinfection
� Food steri-lization
� Medicine
� Chemicalcatalysis
� New generationof DVD systems(~300 nm)
� ProjectionTV
7
What is the subject of new LED development?
Heterostructure- IQE, Injection efficiency, reduction of the efficiency droop
Chip- LEE, EQE and WPE, Efficacy- Turn-on Voltage- Output power, series resistance- Active region temperature
Lamp, white LEDs- Temperature distribution, thermal
resistances- Output light spectrum, light
intensity, color homogeneity- Efficiency: efficacy, WPE- Rendering: CRI and CCT
C.Wetzel and T.Detchprohm, 2005
8
Why LED designing is a challenging problem?
Multidisciplinary- materials science- physics of semiconductors- heat transfer theory- optics
Essentially nonlinear- nonuniform voltage drop and IQE distributions overthe active region
- self-heating in active region- current crowding results in nonuniform light
intensity distribution over the active region
Multidimensional and multiscale- QW thickness is ~2-10nm- chip size is ~300µm
9
How to approach?
Experiment- labour-intensive- time consuming- expensive- some details of particular processes/mechanisms
could not be measured directly or visualized
Modeling/Simulations- presently, modeling is recognized as a powerful
tool for device engineering- fast reply could be obtained in
respond to “what if” questions- relatively inexpensive
+
+ Softwarefor LEDsimulation
10
Why SimuLED ?
• Specific experience in modeling is often necessary to run the software and to extract useful results from computations
• 3D geometry specification is often labour-intensive
• Nonlinear problems tend to have poor convergence
• Huge simulation time and computer resources demanded. Special requests to hardware used for computations
• Non-intuitive user interface might take long time to understand and get started.
• Materials properties for novel materials will still have to be collected
Will any software help?
SimuLED™ is tailored for specific applicationand operates in engineer friendly terms, therefore, bypassing the common issues listed above
Gene
ral pu
rpos
e s
oftw
are
11
Maximum efficiency as the key advantage
SimuLED is optimized for maximum efficiency in terms of user effort
and computer resources. High performance is achieved in several
ways: software employs unique models of the physical
processes, it uses problem specific methods and algorithms to
find the solution, which allows SimuLED to operate v ery fast, as
compared to general purpose software.
For the user convenience, task set-up can be done in terms
customarily used in device engineering. A set of examples provides
selection of ready-to-run tasks that can be used as a starting point
in some cases. Material properties are thoroughly selected and
stored in our database, ready to be used in computations.
!!!
12
SimuLED
Simulationdestination
Software is used as a tool demonstrating physical effects and test cases with simple geometry
Software is used by experts in modeling and users who have long-time experience in device modeling
Powerful fast engineering tool operating with actual devices designed by industry and developed by academia
SimuLED serves as a guidance for epitaxy engineers and LED designers in testing new ideas on device performance improvement
Getting started Long time is necessary to start computations
Statement of the problem is complicated due to difficulties in geometry specification and specification of boundary conditions
The user can start computations in several hours after SimuLED installation
Intuitive User Interface operates in terms normally used by engineers.Layer by layer input of 2D layout for 3D geometry. Selection of predefined options typical for LEDs
General concept to LED simulation
Homogeneous app-roach for simulation of multiphysics and multiscale problem
Problems with uniform resolution of physical processes occurring at various spatial scales.
Hybrid approach accounting for specific features of modern LED design
Accurate resolution of key physical processes at each spatial scales
Computation time
Time consuming simulations Extremely fast simulations
Hardware requirements
Special requirements to hardware SimuLED operates on personal computers
Physical models implemented into the software
The software was developed initially for simulation of GaAsand Si-based devices
Conventional physical models used for a long time in modeling of semiconductor devices
SimuLED was initially developed as a tool for simulation of nitride-based LEDs
Both conventional and unique models of physical effects responsible for operation of modern LEDs
Materials properties
The data have to be collected by the user or there is a lack of data needed for computations
SimuLED is supplied with the database of materials properties and the user can start his computations immediately after the software installation
Hot-line support Quick hot-line support, free software update within the license period
Interpretation of results upon customer request
General purpose software SimuLED™
13
SimuLED
Problem of LED
simulation
Hybrid approach
We reject the idea of “homogeneous approach for simulation of multiphysics and multiscale problem ”applied for the whole LED at all space scales
In SimuLED, we replace the homogeneous model by a set of coupled submodels
For each submodel:• Dominant physics• Appropriate dimensionality• Appropriate computational domain
�
SimuLED submodels are realized as modules:
• Carrier transport through the active region: 1D + bipolar carrier transport � jz(Ub,T), ηint(Ub,T), and λ
• Current spreading in LED die: 3D + unipolar carrier transport + active region replaced by nonlinear resistance � W(x,y)
• Light propagation in the LED die: 3D � EQE, Pout, WPE
CompetitiveCompetitiveAdvantageAdvantage
14
Basic tools of SimuLED ™software package
SimuLED™
15
Modules for LED modeling
15
Epi level
Chip level
Device level
Development & optimization of LED structures
Development & optimization of
LED chips
Development & optimization of
LED lamps, arrays, etc.
SimuLAMP
SiLENSe
SpeCLEDRATRO
Data exchange between modules is minimized. Modules can work in standalone mode
16
SiLENSe™: module for designing of LED/LD heterostructure
Parameters computed with SiLENSe™
� Band diagrams
� Carrier concentrations
� Electric field
� Rrad, Rinonrad , IQE
� Carrier fluxes
� Energy levels in QWs
� Emission and gain spectra
SiLENSe is supplied with the editable database of materialsproperties
Epi level
SiLENSe™: module for designing of LED/LD heterostructure
effect of composition fluctuation on the rate of dislocation-mediated recombination is accounted for
radAdisSR RRRRR +++=
Shockley-Read non-radiative recombination via
point defects
Dislocation-mediated non-radiative
recombination (original model)
Auger non-radiative recombination
Radiative recombination of
electrons and holes
light emission
CompetitiveCompetitiveAdvantageAdvantage
Use of quantum potential model: transport equations are modified in such a way as toreplace the spatial variation of the band edge profiles, EC-qφ and EV-qφ by thequantum potentials accounting for the wave nature (spatial delocalization) of carriers.
Here fn,p is fraction of the delocalized carriers taking part in the non-radiativerecombination at the dislocation cores
Epi level
18
SiLENSe is used to find out heterostucture design providing
IQE maximum
operation temperature
dislocation density
MQW barrier doping
heterostructuredesign
10-4 10-3 10-2 10-1 100 101 102 103
10-2
10-1
100
10-3
10-2
10-1
5x1017 cm-3
1x1018 cm-3
3x1018 cm-3
5x1018 cm-3
Nd= 108 cm-2
In
tern
al e
mis
sion
effi
cien
cy
Current density (A/cm 2)
Ext
erna
l effi
cien
cy
experiment (b026)with ηηηη
ext= 13 %
Inte
rnal
qua
ntum
effi
cien
cy
104 105 106 107 108 109 1010 10110.0
0.2
0.4
0.6
0.8
1.0
n0= 1×1017 cm -3n-GaN
∆∆∆∆n = 5×1016 cm-3
∆∆∆∆n = 5×1017 cm-3
∆∆∆∆n = 5×1018 cm-3
Ligh
t em
issi
on e
ffici
ency
Dislocation density (cm -2)
{ }
PL
inte
nsity
(ar
b.un
its)
Inte
rnal
qua
ntum
effi
cien
cy
SiLENSe™ Application Example: Blue MQW LED heterostructure
Epi level
19
Auger recombination is responsible for the IQE roll over
Two companies reported on the importance of
the Auger recombination at ICNS-2007
New LED structure has been suggested
by Lumileds
Epi level
20
New structure design suppressed Auger recombination
N. F. Gardner et al., Appl. Phys. Lett. 91
(2007) 243506
LED with a wide active region may provide an equal or even higher efficiency then LED with a QW
2 QWs
6 QWs
13 nm active layer
λλλλ = 430 nm
1 10 100 10000.0
0.1
0.2
0.3
0.4
Inte
rnal
qua
ntum
effi
cien
cy
Current density (A/cm 2)
Nd = 5x108 cm -2
λλλλ = 430 nm six 3 nm QWs 13 nm active
layer
no effect of the number of QWs in
the structure on the LED efficiency !
Epi level
Optimization of MQW active region in a
dual-wavelength LED structure
control ofemission spectra
by MQW barrier doping
doping of MQW active region has bee optimized to improve the hole injection in all the wells
Epi level
Suppression of efficiency droop in blue
MQW LED structures
experimental data
an LED structure free of AlGaN EBL has been suggested on the basis of simulations, providing a smaller efficiency droop
simulations
Epi level
LEDs with trapezoidal wells
MQW LED with trapezoidal wells was suggested allowing improvement of efficiency droop at high current densities.
Schematic band diagrams of MQWs of (a) LED with
rectangular-shaped well and (b) LED with trapezoidal-shape well
Simulations show that separation of electron and hole wave functions in the wells was reduced in LED B. Overlaps of electron and heavy
wave functions in the well adjacent to p-GaN in LED A and LED B are 37.2 and 41.6, respectively.
Epi level
InGaN Green LEDs with Gradual QWs
A conventional InGaN QW’s structure was replaced by a gradual InGaN QW’s structure.
The transport efficiency of injected holes was increased, because band bending in the valence band was alleviated, increasing the overlap of electron and hole wave functions as well as the rate of radiative recombination.
Most importantly, the leakage of injected electrons to the p-type region is correspondingly decreased, suppressing the efficiency droop of the LEDs.
Institute of Electro-Optical Science and Technology, National Taiwan Normal University, Taiwan
Epi level
12345
390 405 420 435 450 465012345
EV
Car
rier
conc
entr
atio
n (x
1019
cm
-3)
EC
electrons
a
holes
Distance (nm)
12345
392 400 408 416 424012345
b
electrons
EV
Car
rier
conc
entr
atio
n (x
1019
cm
-3)
EC
holes
Distance (nm)
Use of short-period superlattice for reduction of th e
efficiency droop
A partnership between Ioffe Physico-Technical Institute, Epi-Center and STR-Group has modelled electron and hole distributions in two types of LED: (a) a device with a conventional active region, containing five, 3 nm thick quantum wells sandwiched between 10 nm-thick barriers (b) a device with a short-period superlattice active region comprising 2.5 nm-thick wells and barriers.
Far more uniform hole distribution is possible with a superlattice active region comprising 2.5 nm-thick wells and barriers. Such a structure is far better at combating droop
Presented at ICNS-9. Glasgow, 2011
http://www.compoundsemiconductor.net/csc/features-details.php?cat=news&id=19734032&name=Droop%20draws%20the%20crowds%20at%20ICNS-9
Epi level
Quality Factor (Q) and IQE
as a function of current density
IQE as a function of current density obtained from the data reported for (a) green SQW structure [1], (b) blue LED structures with MQW and SPSL active regions [2], and super-high efficiency blue LEDsoperating in CW (circles) and pulsed (squares) modes [3].
0 50 100 150 2000.0
0.2
0.4
0.6
0.8
1.0
λλλλ = 523 nm Q = 0.78
Inte
rnal
qua
ntum
effi
cien
cy
Current density (A/cm 2)0 20 40 60 80 100
0.0
0.2
0.4
0.6
0.8
1.0
λλλλ = 457 nm Q = 2.26
λλλλ = 449 nm Q = 3.15
MQW-structure SPSL-structure
LEE = 60%
Inte
rnal
qua
ntum
effi
cien
cy
Current density (A/cm 2)0 20 40 60 80 100
0.0
0.2
0.4
0.6
0.8
1.0
Inte
rnal
qua
ntum
effi
cien
cy
Current density (A/cm 2)
LEE = 90-95%λλλλ = 444 nm Q = 18
Analysis shows that one can introduce a quality factor Q increasing with the rate of radiative recombination and decreasing with Auger and Shockley-Read recombination. Q is independent of the current density and can be considered as a figure of merit for LED structures of various designs and emitting light in different spectral ranges.
STR developed express method based on EL measurements and predicting self consistently IQE as a function of current density, light extraction efficiency, and quality factor
Epi level
27
SimuLED hybrid approach: SiLENSe/SpeCLED coupling
2.6 2.8 3.0 3.2 3.4 3.6 3.80
1000
2000
3000
4000
5000
Cur
rent
den
sity
(A
/cm
2 )
Active layer bias (V)
300 K 400 K 500 K
2.6 2.8 3.0 3.2 3.4 3.6 3.80.0
0.1
0.2
0.3
0.4
0.5
Inte
rnal
qua
ntun
effi
cien
cy
Active layer bias (V)
300 K 400 K 500 K
2.6 2.8 3.0 3.2 3.4 3.6 3.80
1000
2000
3000
4000
5000
Cur
rent
den
sity
(A
/cm
2 )
Active layer bias (V)
300 K 400 K 500 K
2.6 2.8 3.0 3.2 3.4 3.6 3.80.0
0.1
0.2
0.3
0.4
0.5
Inte
rnal
qua
ntun
effi
cien
cy
Active layer bias (V)
300 K 400 K 500 K
),,(),,(
),,(2
zyx
zyxjzyxQ
σ=
Replacement of the active region by a non-linear resistance
Epi level - Chip level
28
SimuLED hybrid approach: SpeCLED/RATRO coupling
n-pad
n-electrode
n-contact layer textured surface
active region
p-contact layer
n-contact layer
highly reflective p-
electrode
jz, A/cm2
Non-uniform distribution of light emission from the active region
RATRO
SpeCLED computations
),(),(
int yxq
yxjW z ηω ⋅⋅= h
intη
Chip level
29
SpeCLED™: Current Spreading and Heat Transfer in LED dice
Parameters computed with SpeCLED™
� 3D distributions of the electric
potential, current density, and
temperature in the whole die
� 2D distributions of the p-n junction bias,
current density, IQE, and temperature
in the active region plane
� I-V characteristic
� Series resistance
� EQE and WPE
Chip level
30
RATRO™: 3D ray-tracing analysis of optical characteristics of LED dice
Parameters computed with RATRO™
� Light extraction efficiency
from an LED die
� Far- and near-field emission
patterns
� Light polarization distribution
� Consideration of non-uniform
electroluminescence intensity
distribution in the active region plane
� Various die configurations, including shaped
substrate are supported
newnew
Chip level
31
SpeCLED™: easy geometry specification
So one can focus on specification of 2D geometry !!!
+ + =
However, actually due to specific feature of planar technology used for LED fabrication, the 3D geometry implies a stack of layers including:
• Active region• n- and p-contact layers• Electrodes• Intermediate layers• Pads• Pad-contacts
Each layer is presented as a complicated 2D figure plus layer thickness
State-of-the-art III-nitride LEDs normally utilize c hips having 3D geometries and a rather complex electrode configurations
Chip level
32
Planar chip design typical for LEDs fabricated on sa pphire substrate
A local overheating depends on the current density and die confi-guration
420
390
320 K
340350
370n-electrode pad
n-electrode pad
10100
500
1000
2000 A/cm 2
sapphire substrate
n-padp-pad
semitransparent p-electrode
n-contact layer
etched mesa
heat sink
Current crowding and in-plane temperature non-uniformity
Conventional LEDA = 0.0466 mm 2 ; substrate-down mounting
Current crowding occurring at the electrode edge (I = 80 mA) produces a very non-uniform in-plane EL intensity distribution
Chip level
33
I-V characteristic and output power of blue LED
Account of thermal effects is necessaryto provide adequate predictions
2.5 3.0 3.5 4.0 4.5 5.00
20
40
60
80
100
120
experiment with thermal
effects without
thermal effects
C
urre
nt (
mA
)
Forward voltage (V)
Data: S.S. Mamakin et al., Semiconductors 37 (2003) 1107
Chip level
34
RATRO™ : Advanced physical models implemented into the too l
Original model was developed to describe light interaction with surfaces patterned with regular array of hexagonal or rectangular pyramids or holes
Model of light transmission through semitransparent multilayer metallic electrodes
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Specification of pattern parameter
Assigning parameters of
individual layers …
… the user obtains angle-dependent reflection, transmission, and absorption coefficients of DBR surface
Chip level
35
RATRO™: Near-field and Far-field predicted for planar LED
Lumileds low-power chip
Radiation far-field pattern of planar LED die
Predicted Extraction Efficiency through top surface is 8.8% andcorrelates well with fitting results obtained for Lumileds low-power chip
Output light intensity
n-padp-pad
heat sink
sapphire substrate
semitransparent p-electrode
LED struc-ture
030
60
90
120
150180
210
240
270
300
330
Waveguidingleading to light
extraction through the side walls of
sapphire substrate
Bottom emission occurs largely
through the side walls of sapphire
substrate, providing two-peak angular
dependence
Chip level
Optimization of electrode configuration to suppress
current crowding
improvement of LED performance due to appropriate chip design
Chip level
Optimization of electrode configuration to suppress
current crowding
simulations allowed authors to design electrode configuration for a uniform current injection in a large GaInN LED chip and demonstrated a increase in output
power in an optimized device.
Chip level
Sharp Laboratories of Europe Limited
Electroluminesence from blue LED chip
LED chip design using SpeCLED
http://www.sle.sharp.co.uk/research/advanced_optoelectronics/blue_leds.php
Modeling software such as SpeCLED is used to optimize the LED chip design in order to improve operating voltage, light extraction efficiency and junction temperature. Other tools such as SiLENSe are also available to model band diagrams and to understand fundamental theoretical work, such as the piezoelectric effect in nitride-based devices.
Chip level
Enhancement of light extraction in UV LEDs
A nanopixel LED design with an Al reflector was developed resulting in enhanced light extraction in UV LEDs.
Schematic cross-sectional view of nitride-based nanopixel UV LED with
Pd contacts and Al reflector layer
Simulation of the current injection in the active region for nanopixel AlInGaN LEDs with nanopixel size 1x1 µm2 and nanopixel spacing (a) 4 µm, (b) 2 µm, and (c) 1 µm. The total current is constant. In the graph the injection current density as a function of the position along a line through the center of the nanopixels is shown for the different structures.
Chip level
40
3. Operation of modern light emitters
Application of the full SimuLED™ package
41
A. Analysis of Thin -Film LED operation
42
Basic design of 815×875 µm2blue LED die
n-pad
n-electrode
n-contact layer textured surface
active region
p-contact layer
n-contact layer
highly reflective p-electrode Micrograph of the die by
MuAnalysis
43
Current crowding near/under n-electrode at 700 mA
J, A/cm 2
IQE
10-3 10-2 10-1 100 101 102 1030.0
0.1
0.2
0.3
0.4
0.5
0.6
T = 25°C
Inte
rnal
qua
ntum
effi
cien
cyCurrent density (A/cm 2)
current density distribution in the active region
IQE distribution in the active region
efficiency droop at high current density caused
by Auger recombination
local IQE reduction in high-current density
area
IQE distribution in the active region is essentially non-uniform
44
Emission intensity and probability of light extraction in the active region
I (W/cm 2)
EP (%)
maximum of emission intensity is located under/next to n-electrode, despite the IQE droop with current; light emission under the n-pad does
not contribute at all to the extracted light !!
probability of light extraction falls down under and next to n-electrode
n-electrode
Current I = 700 mA
NB!
45
Characteristics of basic Thin-Film LED die
0 200 400 600 800 1000 1200
57
60
63
66
69
72
75 n-contact layer: 3 µµµµm, 5x1018 cm -3
3 µµµµm, 5x1019 cm -3
6 µµµµm, 5x1019 cm -3
Tot
al L
EE
(%
)
Forward current (mA)3.1 3.2 3.3 3.4 3.5 3.60
200
400
600
800
1000 n-contact layer: 3 µµµµm, 5x1018 cm -3
3 µµµµm, 5x1019 cm -3
6 µµµµm, 5x1019 cm -3
Cur
rent
(m
A)
Forward voltage (V)
0 200 400 600 800 100010
15
20
25
30
35
40
n-contact layer: 3 µµµµm, 5x10 18 cm -3
3 µµµµm, 5x10 19 cm -3
6 µµµµm, 5x10 19 cm -3
WP
E (
%)
Current (mA)0 200 400 600 800 1000
0
100
200
300
400
500
600
700
n-contact layer: 3 µµµµm, 5x10 18 cm -3
3 µµµµm, 5x10 19 cm -3
6 µµµµm, 5x10 19 cm -3Top
out
put p
ower
(m
W)
Current (mA)
strong dependence of LEE on forward
current
variation of n-contact layer parameters
affects weakly the current crowding and, hence, the LEE at 700 mA
alternative approaches are
required
NB!
46
Two approaches for improvement of Thin-Film LED performance
Approach 1: insertion of a current blocking layer (thin
insulating film) under the n-pad to avoid parasitic current
flowing in this region
Approach 2: use of refined electrode structure with larger number of Г-shaped electrode
branches but with smaller width of each of them
newnew newnew
47
Current spreading in LED dice of improved design
J (A/cm 2)J (A/cm 2)
Total current through the diode I = 700 mA
parasitic current flow under the n-pad is partly suppressed
reduction of the current density
contrast on the die periphery
both approaches are found to work well
Approach 1 Approach 2
48
IQE distributions in the active regions of improved LEDs
IQEIQE
a larger area of the active region emits light with higher
efficiency
increased current density at the die periphery results in a slightly lower
IQE compared to basic design
Total current through the diode I = 700 mA
Approach 1 Approach 2
49
Local probability of light extraction from improved LED dice
EP (%)EP (%)
probability of light extraction is comparable with that of
the basic die design
considerable enlarging of the area with high probability of light extraction
Total current through the diode I = 700 mA
Approach 1 Approach 2
50
Assessment of performance improvement due to variation of LED die design
0 200 400 600 800 1000 120055
60
65
70
75
80
85 conventional with blocking layer under pad refined electrode BL & refined electrode
Tot
al L
EE
(%
)
Forward current (mA)
0 200 400 600 800 10000
100
200
300
400
500
600
700
conventional BL under pad refined electrode BL + refined
electrodeTop
out
put p
ower
(m
W)
Forward current (mA)
3.1 3.2 3.3 3.4 3.5 3.60
200
400
600
800
1000 conventional BL under pad refined electrode BL + refined
electrode
Cur
rent
(m
A)
Forward voltage (V)
0 200 400 600 800 1000
20
25
30
35
40 conventional BL under pad refined electrode BL + refined
electrode
WP
E (
%)
Current (mA)
Performance improvements at the current of 700 mA:
• LEE ���� from 60 to 70%
• Vf remains the same• optical power ���� from 530 to 635 mW (by 20%)• WPE ���� from 23 to 28%
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51
B. Use of ITO spreading layer for improvement of LED
performance
52
General 300×300 µm2 LED die design utilizing ITO spreading layer
n-pad
p-electrode/pad
n-contact layer
sapphire substrate
ITO spreading
layer
53
Factors affecting the overall LED efficiency
IQE of the MQW LED structure depends on both
current density and temperature
Light extraction efficiency (LEE) computations accounting for
interference in the ITO layer and depends on the ITO layer thickness
10-2 10-1 100 101 102 1030.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
300 K 350 K 400 K 450 K
Inte
rnal
em
issi
on e
ffici
ency
Current density (A/cm 2)0.01 0.1 1 10
12
15
18
21
24
27
Ligh
t ext
ract
ion
effic
ienc
y (%
)
ITO layer thickness ( µµµµm)
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54
Current crowding in LED dice with various ITO thickness at 20 mA
20 nm 50 nm 100 nm
increasing ITO layer thickness (electrical sheet conductivity) results in
redistribution of the current density but does not avoid the current crowding;
moreover, the higher the sheet conductivity, the stronger becomes current
crowding near the n-electrode edge !!
Current density distribution across the LED active region , A/cm 2
NB!
55
IQE distribution in the LED die at 20 mA
because of high current density, the
region of maximum current localization
has the lowest IQE, which is caused by
non-radiative Auger recombination
20 nm
50 nm
100 nm
region of maximum current
localization
IQE
IQE
IQE
56
Near-field emission intensity distribution at 20 mA
Total LEE is ~1.5-2.0 time higher than in the LED with metallic
p-electrode
n-pad p-pad
ITO layer
sapph
ire su
bstra
teheterostructure
top view bottom view
heter
ostru
cture
back side of sapphire substrate
strong side-wall emission due to
waveguide effect
Top emission – 8.4%Bottom emission – 14.7%Total LEE – 23.1%
ITO thickness 100 nm
NB!
57
Characteristics of basic Thin-Film LED die
Conclusion: optimization of output power and operating voltage require quite different thicknesses of the ITO layer 1 2 3 4 5 6 7 8
0
20
40
60
80
100ITO thickness: 20 nm 50 nm 100 nm 200 nm 500 nm
Cur
rent
(m
A)
Forward voltage (V)0 20 40 60 80 100
0
5
10
15
20
25
ITO thickness: 20 nm 50 nm 100 nm 200 nm 500 nm
Out
put p
ower
(m
W)
Current (mA)
0 20 40 60 80 1000
2
4
6
8
10
12
14
ITO thickness: 20 nm 50 nm 100 nm 200 nm 500 nm
Wal
l plu
g ef
ficie
ncy
(%)
Current (mA)
maximum WPE is attained at the
ITO thickness of ~100-200 nm (at
the electric conductivity of 2000 S/cm)
0 20 40 60 80 100300
320
340
360
380
400ITO thickness: 20 nm 50 nm 100 nm 200 nm 500 nm
Max
imum
tem
part
ure
(K)
Current (mA)
NB!
58
C. Multi-pixel LED array operation. Interdigitatedmulti-pixel array (IMPA)
Design of LED array was suggested by A. Chakraborty
et al. (UCSB), Appl.Phys.Lett 88 (2006) 181120
59
Modeling of multi-pixel LED array operation
Interdigitated multi-pixel array (IMPA) containing a hundred of
30×30 µm2 pixels
semitransparent p-electrode p-pad
n-pad
300×300 µm2 square LED
Comparison of LEDs with IMPA and conventional square chip designs
mesa
60
Series resistance ( Ω)
Theory Experiment
Square 7.2-9.5 8
IMPA 1.2 1
Current Current ––voltage characteristicsvoltage characteristics
Series resistance ( Ω)
Theory Experiment
Square 7.2-9.5 8
IMPA 1.2 1
Series resistance ( Ω)
Theory Experiment
Square 7.2-9.5 8
IMPA 1.2 1
Current Current ––voltage characteristicsvoltage characteristics
Current crowding, active region overheating, and se ries resistance
Much lower active region overheating of IMPA LED an d extremely high temperature uniformity is predicted for the current density (~1%) and temperature (~6%)
Excellent agreement between the predicted and
measured series resistance
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5300
400
500
600
700
800
900
1000
square
IMPA
M
axim
um te
mpe
ratu
re (
K)
Forward current (A)
IMPA LED has a much better heat sink, primarily due
to a larger die area
Series resistance is primarily controlled by the electrode perimeter which is much larger for IMPA LED
61
Light extraction from IMPA LED die
top view bottom view
Weak variation of emission intensity
over the back sapphire substrate
IF = 1000 mA
experimentVery uniform distribution of the
emission power among the pixels
62
Output optical power as a function of forward curre nt
0.0 0.2 0.4 0.6 0.80
5
10
15
20
25
30
35
40
square
IMPA
, experiment , theory
Out
put p
ower
(m
W)
Forward current (A)
ηηηη back
= 6%
0 1 2 3 40
20
40
60
80
100
120
300
400
500
600
700 experiment theory
IMPA
ηηηη back
= 6%
Out
put p
ower
(m
W)
Forward current (A)
activelayer
Tem
pera
ture
(K
)
Overheating of square die does not allow power increase higher than 25 mW, whereas the dependence of power on current for IMPA die is close to linear up to current about 0.8 mA
Due to suppressed current crowding and reduced overheating, the IMPA LED is capable of high current operation without significant droop of the EQE at the currents from 1 to 3 A
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63
Software for Optical and Thermal Management of LED Lamps
SimuLAMP ™
Device level
64
Main options and effects considered
� Heat transfer in complicated lamp geometry
� Heat release in the LED chip
� Heat release in phosphor due to light absorption
� Light conversion in individual phosphor and phosphor mixtures
� Detailed I-V characteristics and WPE of particular LED chip is
imported from SimuLED
Output
� Temperature distribution, thermal resistance
� Near-field and far-field intensity distribution
� Output light spectrum, color uniformity
� Efficacy, WPE
� CRI, CCT and other characteristics of white color
3D Ray-Tracing Coupled with the Heat Transfer in LE D Lamp
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Device level
65
Input/Output data in SimuLAMP software
SimuLED
SimuLAMPsoftware
Materials database:optical and thermal properties
Phosphor properties- phosphor particle size- particle volume fraction- quantum efficiency as a
function of temperature- phosphor excitation
spectrum- phosphor refraction index
Output
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U(I,T), WPE(I,T), LED spectrum and radiationpattern
Device level
66
1 - Lens2 - Silicone3 - Crystal4 - Heat Sink5 - Frame6 - Foil7 - Textolite plate8 - Radiator
Typical design of LED lamp specified by SimuLAMP
1
2
3
45
6
6
7
8
Device level
67
Geometry specification and grid generation
Geometry specification
Automatic grid generation
� Structured, unstructured,
and combined grids are
supported
� Mismatched grids are
available
Device level
68
Temperature distribution in the lamp and near-field distribution
Temperature, K
Prediction of T p-n
SimuLAMP allows analysis the effect of - LED design- Materials properties- Heat sink design can be
tested via “what if” scenario
Near-field intensity distribution predicted in various lamp designs
Device level
69
Radiation pattern and Far-field Intensity distribut ion
Radiation pattern predicted in computations
x
x
LED and phosphor spectra
LED and phosphor spectra
Output spectrum
Output spectrum
Probe point
Probe point
Probe tool for analysis of color uniformity
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Device level
Multi-chip packages and AC LEDs
position of red, blue, and green LEDs in a multi-chip LED (Arima Optoelectronics)
interconnections in an AC LED lamp (Epistar)
simulated current through the lamp
simulated optical power
Device level
DC operation of LED array integrated in a package
Operation of a lamp containing 100 LEDs in the
package
temperature distribution
light intensity distribution
Device level
Conclusion
73
Design of novel light-emitting devices and IP gener ation
Patent of Russian Federation No
2304952 issued by October 27, 2007
Patent of Russian Federation No
2309501 issued by October 27, 2007
Patent of Russian Federation No 2277736 issued by June 10, 2006
Patent of Russian Federation No 2262156 issued by October 10, 2005
Patent of Russian Federation No 2262155 issued by October 10, 2005 for UV LEDs
for UV LEDs
for blue LEDs
for 808 nm high-power laser diode
for 808 nm high-power laser diode
IP generation based on results of modeling by SimuLE D package
Our customers
STR currently provides software and consulting services t o over 40 companies and AcademicInstitutions in USA, Europe, and Asia.
• Technische Universitat Berlin, Institut fur Festkorperp hysik, Germany• Tokyo Institute of Technology, Japan• School of Electrical and Computer Engineering, Georgia In stitute of Technology, GA, USA• Tyndall University, Ireland• Electrical & Engineering Department, University of Dela ware, DE, USA• Department of Electronic Science & Engineering, Kyo to University, Group of Prof. Kawakami• College of Optics and Photonics, University of Central Flo rida, FL, USA • National Cheng Kung University, Taiwan• Department of Materials Science and Engineering, Meijo Un iversity, Nagoya, Japan• Department of Electrical Engineering, The National Centr al University, Jhongli, Taiwan• Youngnam University, Korea• University of Maryland, Department of Electrical an d Computer Engineering • Electrical and Computer Engin. Department and Nano Tech Center, Texas Tech University, USA• Chonbuk University, Korea• UCSB, Solid State Lighting and Energy Center, USA• Pohang University of Science and Technology (POSTEC H), Korea• Advanced Optoelectronic Devices Laboratory, National Ta iwan University• Department of Applied Mathematics and Physics, State Univ ersity, Vladimir, Russia• Interdisplinary Graduate School of Science and Engineerin g, Tokyo Institute of Technology• Semiconductor Device Laboratory, Yamaguchi University, Ube, Japan• Korea Polytechnic University, Siheung City, Korea• Academic Physical Technological University, RAS, St .Petersburg, Russia
Our customers
Customers from research centers and companies. We a re grateful to those of our SimuLED™customers from who permitted us to refer their name s.
• Central Electronic Engineering Research Institute, India• Institute of High Pressure Physics, Polish Academy of Sciences, Warsaw, Poland • Bridgelux, USA• Epi-Center, Russia• Palo Alto Research Center, CA, USA• Korea Advanced Nano Fab Center (KANC)• UV Craftory Co., Ltd.• Industrial Technology Research Institute of Taiwan, Taiw an• Kyocera Co., Japan• Gwangju Institute of Science and Technology, Gwangju, Ko rea• Seoul OptoDevice Company, Korea• Fraunhofer Institut Angewandte Festkörperphysik, Freib urg, Germany• Samsung LED, Korea• Sensor Electronic Technology, Inc., USA• Heesung Electronics, Korea• De Core Nanosemiconductors Ltd., Russia• Sharp Laboratories of Europe Limited, UK• Smart Lighting Engineering Research Center, Renssel aer Polytechnic Institute, Troy NY, USA• Seiwa Electric Mfg. Co., Ltd., Japan• Genesis Photonics Inc., Taiwan• Nippon Telegraph and Telephone Co., Japan• Stanley Electric Co., Ltd., Japan
76
� Consulting service & software support:
� Information on commercial softwarewww.str-soft.com
Detailed info is available upon request:
• Demo version
• Physical summary
• Code description
• GUI manual
• SimuLED tutorials
Contact information