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STATE DIAGRAM AND STATE TABLES

STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

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Page 1: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE DIAGRAM AND STATE TABLES

Page 2: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

DERIVATION OF STATE GRAPHS

Problem Statement specifies the desired relationship between the input and output sequences. Sometimes called the specification.

First step is to translate this specification into a state table or state graph.

In the HDL world, there is a style that allows creation of the next state specification that does not require either a state graph or state table.

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Page 3: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE DIAGRAM State transition diagram

a circle: a state a directed lines connecting the circles: the

transition between the statesEach directed line is labeled

“inputs/outputs”

state: A Binput: x

Page 4: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

FLIP-FLOP INPUT EQUATIONS The part of circuit

that generates the inputs to flip-flops Also called excitation

functions DA = Ax +Bx DB = A'x

The output equations to fully describe the

sequential circuit y = (A+B)x'

Ax +Bx

Ax

Bx

A 'x

A+B

Page 5: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ANALYSIS WITH D FLIP-FLOPS The input equation

DA=A⊕x⊕y The state equation

A(t+1)=A⊕x⊕y

Page 6: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ANALYSIS WITH JK FLIP-FLOPSDetermine the flip-flop input function in

terms of the present state and input variables

Used the corresponding flip-flop characteristic table to determine the next state

Fig. 5-18Sequential circuit with JK flip-flop

JA = BKA= Bx'JB = x ' KB = A'x + Ax '

Page 7: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE TABLE FOR FIG. 5-18

JA = B, KA= Bx'JB = x ', KB = A'x + Ax '

Page 8: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

State Transition Diagram for Fig. 5-18

( 1)

( 1)

A t JA K A

B t JB K B

State equation for A and B :

( 1) ( )A t BA Bx A A B AB Ax

The characteristic equation of JK FF is

Method 1

( 1) ( )B t x B A x B B x ABx A Bx , ,

Page 9: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

State Transition Diagram for Fig. 5-18

x AB00 01 11 10

0

1A(t +1)

0 1 0 1

0 1 1 1

A’B

AB’

Ax

Using K-map, we also can derive A(t+1).

A(t +1)=A ’B+AB ’+Ax

Method 2

Page 10: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ANALYSIS WITH T FLIP-FLOPS The characteristic equation

Q(t+1)= T⊕Q = TQ'+T'Q

Page 11: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

A SEQUENCE DETECTOR EXAMPLE

The specification The circuit will examine a string of 0’s and 1’s

applied serially, once per clock, to the X input and produce a 1 only when the prescribed input sequence occurs. Any sequence ending in 101 will produce and output of Z=1 coincident with the last 1 input. The circuit does not reset when a 1 output occurs so when ever a 101 is in the data stream a 1 is output coincident with the last 1.

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Page 12: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

GENERAL FORM OF THE CIRCUIT

The circuit has the general form X – serial input stream Z – serial output stream Clk – the clock

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Page 13: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

START CONSTRUCTION OF THE GRAPH.

Choose a starting state and a meaning for that state. The starting state is typically a reset state. Here meaning of starting state can be

The system has been reset and this is the initial state

A sequence of 2 or more 0’s has been received

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Page 14: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ADD THE NEXT STATE

Now add state S1 Meaning – a sequence of 0…01 has been

received when coming from state S0 Meaning – the first 1 has been received.

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Page 15: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

TRANSITIONS FROM S1

What happens when in S1 A 0 input causes transition to a new state S2

with new meaning A 1 keeps you in S1 where the first 1 of a

possible 101 sequence has occurred.

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Page 16: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE S2

State S2 – what is the meaning of being here? When transition is from S1 it means we have

receive an input stream of xxx10.

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Page 17: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

TRANSITIONS FROM S2

Are currently in S2 A 1 arrives and now have a sequence of 101

Action – Output a 1 and have the first 1 of a new sequence, i.e., transition to S1

A 0 arrives – now have a sequence of 100Action – Move back to state S0 where you do not even have the start of a sequence, i.e., one or more 0 inputs.

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Page 18: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

THE FULL STATE DIAGRAM

The now completed state diagram

This can now be used to generate a state table – more on that later

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Page 19: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ANOTHER EXAMPLE

Problem Statement: The circuit has the same form as before and shown below. The circuit will detect input sequences that end in 010 or 1001. When a sequence is detected the output Z is 1, otherwise Z is 0.

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Page 20: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

THE INITIAL STATE

The RESET state – have no inputs yet Then if you have a 0 input the output is 0 –

transition to S1 If you have a 1 input the output is 0 and

transition to S2

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Page 21: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

MEANING OF STATES

S0 – Reset S1 – 0 but not 10 S4 – 1 but not 01

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Page 22: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

MORE STATES

Add S2 having meaning that a 01 sequence has been received.

Add S3 having meaning that the sequence 10 has been received

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Page 23: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

MEANING OF STATES AFTER S2 S3

S0 – Reset S1 – 0 but not 10 S2 – Sequence of 01 S3 – Sequence of 10 S4 – 1 but not 01

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Page 24: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

CONSIDER INPUTS WHEN IN S2, S3

In S2 (01) and get a 0 – Transition to S3 (10) – output a 1

In S3 (10) and get a 1 – Transition to S2 (01)

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Page 25: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ADD A NEW STATE S5

S5 – Have received input sequence 100

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Page 26: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

WHEN IN S5

In S5 Input of a 1 means you have

had a input of 1001 so transition to S2 as the input sequence now ends in 01 while Z is 1.

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Page 27: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ADD OTHER TRANSITIONS

Complete the transitions not yet covered

Each state should have an output transition for both a 0 and a 1.

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Page 28: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

THE MEANING OF THE STATES

S0 – Reset S1 – 0 (but not 10) S2 – Sequence of 01 S3 – Sequence of 10 S4 – 1 (but not 01) S5 – Sequence of 100

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Page 29: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

GUIDELINES

Guidelines for Construction of State Graphs First, construct some sample input and output

sequences to make sure you understand the problem (ref slides 5 and 13)

Determine under what conditions the circuit is in reset state.

If only one or two sequences lead to a 1 output construct a partial state graph.

OR determine what sequences or groups of sequences must be remembered

When adding transitions see if you transition to a defined state or a new state is to be added

Make sure all state have a transition for both a 0 and a 1 but only 1!

Add annotation or create a table to expound the meaning of each state.

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Page 30: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

MOORE MACHINE

Page 31: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

MEALY MACHINE VS. MOORE MACHINE

Page 32: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

Register-transfer-level block diagram

Modern Design

C: Combinational circuitS: Sequential circuit

C

C

CCS

S

S C

Control UnitDatapath

DQ

DQ

.

.

Page 33: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

In OutDX

clk

QX

DY

clk

QY? ?

next state logic output logic

current state register

nextstate

currentstate

D or JK or T ??

FSM DESIGN

Page 34: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

CONSIDER THE SEQUENCE DETECTOR

The same sequence detector to detect a sequence ending in 101 but this time a Moore machine implementation.

Moore machine implementation is much the same except that the output designation is now indicated within the state.

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Page 35: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

START IN S0

S0 –a state where you have received a non middle 0 or a long string of 0s. Output is 0.

Output is indicated within the state not on the transition.

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Page 36: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

TRANSITIONS FORM STATE 1

On a 0 you stay in state 1 On a 1 you transition to state S1. Meaning of

S1 – have the 1st 1 of the sequence

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Page 37: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

TRANSITION FROM S1

On a 1 have the first 1 of a sequence – stay in S1.

On a 0 now have a sequence that ends in 10 so define a new state S2 and transition to it.

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Page 38: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE S2

S2 has meaning that you have an input sequence that ends in 10 so far.

Transitions from S2 0 input – Back to S0 1 input – Valid sequence go to new state S3 which outputs a 1

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Page 39: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE S3

S3 – have received input sequence that ends in 101.

Next input 0 – end of seq (10 so back to S2) 1 – back to S1 (11 so 1st 1)

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Page 40: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE TABLE FROM STATE GRAPH

Easy to convert state graph to state table Moore machine note output is function of the state

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Page 41: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

CONTRAST THIS TO MEALY MACHINE

Mealy machine state graph and state table In Mealy machine the output is a function of the state and the current input

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Page 42: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

NOW ON TO THE OTHER EXAMPLE

Detect the sequences 010 and 1001 and on those output a 1.

Starting state on reset is S0 On a 0 transition to S1 - output 0

Have a first 0 On a 1 transition to S3 - output 0

Have a first 1

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Page 43: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

IN S1/0

State S1 have the first 0 of a possible 010 On a 1 now have 01 Transition to a new state S2/0 with meaning

that you have 01 On a 0 stay in S1/0

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Page 44: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

FROM S2/0

S2/0 has meaning that you have 01 so far Input is a 0 – Need a new state S4

with meaning that you have received 010 (so output is a 1) and have a 10 for a start of that string.

Input is a 1 so the input is 011 – Go to S3 where as this is the first 1.

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Page 45: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

FROM S3/0

S3/0 has meaning that you have the first 1 of the 1001 sequence. Input is a 0 – Go to S5 – meaning have 10 Input is a 1 – stay in S3

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Page 46: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

ADD TRANSITIONS FROM S4/1

S4/1 had meaning that the sequence has been 010 so far. Input is a 0 – Now have

100 – Need a new state with this meaning – S6/0

Input is a 1 – Now have 101 so go back to S2/0

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Page 47: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

TRANSITIONS FROM S5/0

S5/0 means you have 10 so far Input is a 0 – transition to S6/0 – have 100 so far Input is a 1 – now have 101 or the 01 which is

the meaning of S2/0

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Page 48: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STATE S6/0

S6/0 has meaning that you have a sequence of 100 so far Input is a 1 so have 1001

– a new state S7/1 to signal the sequence 1001.

Input is a 0 so have 1000 and back to S1 as you have a first 0.

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Page 49: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

FROM S7/1

S7 has meaning of 1001 so you also have the 01 for the start of that sequence Input is a 0 so have 010

– go to S4/1 Input is a 1 so have 011

– go to S3 as you have a first 1.

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Page 50: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

THE STATE TABLE FOR EACH

For the Mealy Machine

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NEXT STATE OUTPUT Present State X=0 X=1 X=0 X=1

S0 S1 S4 0 0 S1 S1 S2 0 0 S2 S3 S4 1 0 S3 S5 S2 0 0 S4 S3 S4 0 0 S5 S1 S2 0 1

Page 51: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

FOR THE MOORE MACHINE

The state table for the Moore machine – output is associated with the state.

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Present State Next State X=0 Next State X=1 Output ZS0 S1 S3 0S1 S1 S2 0S2 S4 S3 0S3 S5 S3 0S4 S6 S2 1S5 S6 S2 0S6 S1 S7 0S7 S4 S3 1

Page 52: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

THE NEXT STEP

The next step to implementation is state assignment

In state assignment the binary code for each state is chosen.

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Page 53: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

EFFECT OF CHOOSING STATE ASSIGNMENT

Choosing one state assignment versus another can have significant implications for circuit implementation.

But first – how do you reduce the number of states in the state table?

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Page 54: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

EXAMPLE THAT HAS SINK STATE

Programmed Example 14.2

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Page 55: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

INITIAL STATES

The start of the state graph

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Page 56: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

STEP 2

More states

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Page 57: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

COMPLETE STATE GRAPH

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Page 58: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

CORRESPONDING STATE TABLE

From the state graph the state table can be generated

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Page 59: STATE DIAGRAM AND STATE TABLES. D ERIVATION OF S TATE G RAPHS Problem Statement specifies the desired relationship between the input and output sequences

LECTURE SUMMARY

Have covered state graphs for Mealy and Moore machines

Have covered how to transition from state graphs to state tables.

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