Spiceguy -- Measuring Capacitance

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    Welcome to Spiceguy.net.Today is: Sunday July 20, 2014

    Measuring CapacitanceThis page shows how to measure input capacitance on an inverter, first using AC Analysis frequencyresponse and then again using transient analysis for comparison.

    1) Procedure to Measure Capacitance using AC AnalysisThis example shows how to measure input capacitance on an inverter input using AC analysis . Below isthe HSPICE source (omitting the transistor model setup). See the comments which explain howcapacitance "c_comp" is measured. All lines beginning with asterisk (*) are comments in HSPICE. Anytext after a "$" is also a comment. The HSP ICE output file with the measured capacitance is also shownafter the source code.

    A) HSPICE SOURCE CODE USING AC ANALYSIS ********======= ========================================================************************* Power Supplies Parameters and Connection ****************

    ********===============================================================********** Set frequency parameter to 100MHz and pi constant:*.param pfreq = 100x $ Input Frequency in AC analysis, 100MHz+ pi = 3.1415926535 $ value of pi** Global Supply parameters:*.param pvss = 0.00V+ pvdd = 1.50V+ pvdd2 = 'pvdd * 0.50'+ pvih = 'pvss'+ pvil = 'pvdd'*

    * Supply Setup -VVDD VDD 0 DC 'pvdd'VVSS VSS 0 DC 'pvss'********===============================================================******************===============================================================************************* Circuit Hookup and Output Loading ************************===============================================================*********XINV VDD VSS A Z INV WP=2.04u WN=1.42u*.NODESET V(A)='pvdd2' $ Initial DC Bias for AC Sweep********===============================================================*****************===============================================================************************* AC ANALYSIS and C_Comp Measurement *************************===============================================================********** This performs a frequency sweep by 10 points per decade from 1kHz to 1GHz:*.AC DEC 10 1K 1000x

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    ** #####################################################################* ################ Start AC Analysis for net: "A" ##############* ################ >> Can only run one net at a time Cin = abs (1/(omega x ZI_A)) , where omega = 2 x pi x f and abs is absolute value.* ---> Cin = abs (1/(2 x pi x f x ZI_A))*.measure ac c_comp_A param ='abs(1.0/(2.0*pi*pfreq*ZI_A))'.measure ac res_A FIND ZIN(R) AT = 'pfreq'**********===============================================================************************ Output Signals ************************===============================================================*********.probe ac ZIN(R) ZIN(I)*********===============================================================********

    B) HSPICE OUTPUT FOR AC ANALYSIS (".lis" file) (run on linux box) Here is a portion of the HSPICE output ".lis" file. Marked in blue we see first the Nodal Capacitance Table estimates ourcapacitance to be 4.526fF, and the result of the AC analysis is 6.845fF using our setup.

    ****** HSPICE -- W-2004.09 (20040730) 11:53:10 05/19/2007 linux******r0: test_cap_tran, c_comp typ. 25c****** operating point information tnom= 27.000 temp= 65.000*********** operating point status is all simulation time is 0.nodal capacitance tablenode = cap node = cap node = cap

    +0: a = 4.526f 0:vdd = 8.432f 0:vss = 6.441f+0:z = 4.720f

    r0: test_cap_tran, c_comp typ. 25c****** ac analysis tnom= 27.000 temp= 65.000******zi_a=-232.498kc_comp_a= 6.845fres_a= 471.341

    ***** job concluded ****** HSPICE -- W-2004.09 (20040730) 11:53:10 05/19/2007******r0: test_cap_tran, c_comp typ. 25c****** job statistics summary tnom= 27.000 temp= 65.000******

    total memory used 473 kbytes

    # nodes = 5 # elements= 5# diodes= 0 # bjts = 0 # jfets = 0 # mosfets = 2

    analysis time # points tot. iter conv.iter

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    op point 0.00 1 7ac analysis 0.00 61 61readin 0.11errchk 0.03setup 0.01output 0.00total cpu time 0.15 secondsjob started at 11:53:10 05/19/2007job ended at 11:53:13 05/19/2007

    2) Alternate Method to Measure Capacitance using TransientAnalysisThis example shows how to measure input capacitance on an inverter input using transient analysis .Below is the HSPICE source, omitting the transistor model setup. See the comments which explain howcapacitance "c_comp" is measured. All lines beginning with asterisk are comments in HSPICE. Any textafter a "$" is also a comment. The HSPICE output with result is also shown after the source code. This is done using the formula for current through a capacitor: I = C x delta-V/delta-T, or C = I x delta-T/delta-V The final result will be the ave rage of the above formula run twice: First with a rising input, and then with a falling

    input. Answer is shown in blue below.

    A) HSPICE SOURCE CODE USING TRANSIENT ANALYSIS

    * Set triangle pulse timing parameters here :* -----------------------------------------.param ptr = 1.0n $ Input Pulse rise time = 1ns+ ptf = 1.0n $ Input Pulse fall time = 1ns+ ptd = 1.0n $ delay to start pulse+ pstop = 'ptd+ptr+ptf' $ End of simulation

    * Global Supply parameters:..param pvss = 0.00V

    + pvdd = 1.50V+ pvdd2 = 'pvdd * 0.50'+ pvih = 'pvdd2 + 250mV' $ gives delta-V = 0.5V+ pvil = 'pvdd2 - 250mV'** Supply Setup* -----------------------------VVDD VDD 0 DC 'pvdd'VVSS VSS 0 DC 'pvss'*********===============================================================************************* Circuit Hookup ************************===============================================================*********XINV VDD VSS A Z INV WP=2.04u WN=1.42u

    ********===============================================================************************* TRANSIENT ANALYSIS *************************===============================================================**********----------------.TRAN 10p 'pstop'*----------------** Note: Pulse below starts at Vdd/2 just to get cap. table value at A = Vdd/2.* Then you have triangle pulse with same slope at each side:*VA A VSS PWL (0.00n 'pvdd2' 'ptd/5' 'pvil' 'ptd' 'pvil' 'ptd+ptr' 'pvih' 'ptd+ptr+ptf' 'pvil')** Note: Slew rate = (pvih - pvil) / (ptr) = 0.5V/1.0 nS*********===============================================================************************* Measure Statements ************************===============================================================********** This assumes node "A" is your net for cap measurement, and "VA"* is the PWL source with slow (0.5V/nS) ramp.*

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