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November 2013 Doc ID 023670 Rev 1 1/24
UM1575User manual
Spice model tutorial for Power MOSFETs
IntroductionThis document describes ST’s Spice model versions available for Power MOSFETs. This is
a guide designed to support user choosing the best model for his goals. In fact, it explains
the features of different model versions both in terms of static and dynamic characteristics
and simulation performance, in order to find the right compromise between the computation
time and accuracy. For example, the self-heating model (V3 version), which accurately
reproduces the thermal response of all electrical parameters, requires a considerable
simulation effort.
Finally, an example shows how the self-heating model works.
Spice models describe the characteristics of typical devices and don't guarantee the
absolute representation of product specifications and operating characteristics; the
datasheet is the only document providing product specifications.
Although simulation is a very important tool to evaluate the device’s performance, the exact
device’s behavior in all situations is not predictable, therefore the final laboratory test is
necessary.
www.st.com
Spice model versions UM1575
2/24 Doc ID 023670 Rev 1
1 Spice model versions
ST provides 6 model versions on each part number:
• partnumber_V1C
• partnumber_V1T
• partnumber_V2
• partnumber_V3
• partnumber_V4
• partnumber_TN
V1C version
It is the basic model (LEVEL =3) enclosing Coss
and Crss
modeling through capacitance
profile tables. It is an empirical model, and it assumes a 27 °C constant temperature.
V1T version
It comes directly from V1C version and it also includes the package thermal modeling
through a thermal equivalent network and presents two additional external thermal nodes Tj
and Tcase
. This version hasn't the dynamic link between Power MOSFET temperature and
internal parameters.
V2 version
It is more advanced than V1C, in fact it takes into account the temperature dependence and
capacitance profiles too. It allows the static and dynamic behavior to be reproduced by user
at fixed temperatures. By using this version, the simulation of self-heating effects isn't
possible.
V3 version
It comes directly from V2 version and includes the package thermal model through a
thermal equivalent network and presents two additional external thermal nodes: Tj and
Tcase
. In this version, during each transient, the current power dissipation is calculated and a
current proportional to this power is fed into the thermal network. In this way, the voltage at
Tj node contains all the information about the junction temperature, which changes internal
device’s parameters. Since it is a monitoring node, usually Tj pin is not connected (however,
to avoid warning messages on this node, the user has to add a floating wire - see Figure 1).
On contrary, Tcase
node has to be connected, either to a constant voltage source Vdc
representing the ambient temperature or to a heat sink modeled by its own thermal network
(Figure 1).
V4 version
It comes directly from V3 version considering the device sited in free air. It includes the
package thermal modeling through a thermal equivalent network and presents three
additional external thermal nodes: Tj, T
case and T
amb. The voltage at T
j node and T
case node
contains all the information about the junction temperature and case temperature which
change internal device’s parameters. Since they are monitoring nodes, usually Tj and T
case
pins are not connected (however, to avoid warning messages on this node, the user has to
add a floating wire - see Figure 1). Conversely, Tamb
node has to be connected: to a
constant voltage source Vdc, representing the ambient temperature.
Doc ID 023670 Rev 1 3/24
UM1575 Spice model versions
24
TN version
It includes the RC thermal network only, which represents the thermal model of the package.
Its symbol has two pins: Tj and T
case.
Figure 1. Self-heating model (V3 version)
Note: Tj is a monitoring node and it is not connected; Tcase is connected either by using a Vdc, representing the ambient temperature (on the left-side), or by heat-sink thermal network (on the right-side).
C1
R2R1
Tcase
D
S
G
TJ
Zth
25
Tcase
D
S
G
TJ
Zth
25
C2
0 0
Tamb Tamb
GIPD081020130954FSR
Spice model symbol UM1575
4/24 Doc ID 023670 Rev 1
2 Spice model symbol
For each model version, ST provides the appropriate symbol as shown below:
Figure 2. Model symbols
TJ
Tcase
Tcase
D
S
G
TJ Zth
Tamb
TJ1
TCASE2
Tcase
D
S
G
TJ
Zth
V1C version V2 version
V1T version V3 version
V4 version
TN version
GIPD081020131007FSR
Doc ID 023670 Rev 1 5/24
UM1575 Spice models - instructions to simulate
24
3 Spice models - instructions to simulate
In Spice simulator, user has to upload the device symbol (.OLB file) and the Spice model
(.LIB file) to simulate transistors in the schematic.
3.1 InstallationIn the package model, there are the following files:
• name.lib text file representing the model library written as a Spice code;
• name.olb symbol file to use the model into Orcad capture user interface.
In Capture open the menu dialog window "Pspice" "Edit Simulation Profile". Go to
"Configuration Files" tab and "Library" category. Select the library (*.lib) path by "Browse…"
button and click to "Add to Design" (see Figure 3)
Figure 3. Capture dialog window to select the library (*.lib)
To include the symbol *.olb in the schematic view, open the menu dialog window "Place"
"Part" (or simply pressing "P" key in keyboard) and click the "Add Library…" button (or
pressing Alt+"A") to select the file (see figure below).
GIPD081020131721FSR
Spice models - instructions to simulate UM1575
6/24 Doc ID 023670 Rev 1
Figure 4. Capture dialog window to include the symbol (*.olb)
Finally, you can simulate your circuit choosing the simulation type and parameters.
3.2 Typical simulation parameters / optionsAs our models contain many non-linear elements, the standard simulation parameters are
often not suitable.
The following values can facilitate convergence (set them in dialog window "Pspice" "Edit
Simulation Profile" "Options" tab):
Note: If the following error message appears during the simulation of one of device models:
==> INTERNAL ERROR -- Overflow in device..... <==
you have to edit the 'PSPICE.INI' file by inserting the following line behind the headline [PSPICE] as follows:
[PSPICE]
MathExceptions = off
......
DO NOT CHANGE ANY OTHER LINES ALREADY PRESENT
GIPD081020131724FSR
ABSTOL= 1nA (best accuracy of currents)
CHGTOL= 1 pC..10 pC (best accuracy of charges)
ITL1= 150 (DC and bias 'blind' iteration limit)
ITL2= 20...150 (DC and bias 'best guess' iteration limit)
ITL4= 20...150 (transient time point iteration limit)
RELTOL= 0.001...0.01 (relative accuracy of voltages and currents)
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UM1575 A brief description of self-heating model (V3 version)
24
4 A brief description of self-heating model (V3 version)
Power MOSFET’s Spice models are behavioral and achieved by fitting simulated data with
static and dynamic characterization results.
The behavioral model is the best approach because it reproduces the electrical and thermal
behavior of the power device through a simplified physical description of the device
consisting in a set of equations ruling its behavior at terminal level.
The self-heating model (V3 version) includes different analog behavioral models (ABM) to
describe resistors, voltage and current generator, which are temperature-dependent.
A curve fit optimization algorithm extracts the mathematical expression for ABM, which
yields a good representation of Power MOSFET’s static and dynamic characteristics.
In Figure 5, the self-heating spice model (V3 version) schematic is shown.
A brief description of self-heating model (V3 version) UM1575
8/24 Doc ID 023670 Rev 1
Figure 5. Power MOSFET self-heating model schematic
RTj
6
V_s
ense
30V
dc
G_p
ower
IN-
OU
T+
OU
T-
IN+
G_R
sIN
-
OU
T+
OU
T-
IN+
Rdd
11
RTj
14E22
IN+
IN-
OU
T+O
UT-
R_g
3
1
1
2
2
G63
G_R
mos
IN-
OU
T+
OU
T-
IN+
Rg6
Eca
p (ta
ble)
IN+
IN-
OU
T+O
UT-
Rdd
9
E_E
001IN+
IN-
OU
T+O
UT-
Gcd
g2IN-
OU
T+
OU
T-
IN+
Vrea
d20V
dc
Gcd
g
IN-
OU
T+
OU
T-
IN+
12
G_B
Vds
sIN
-
OU
T+
OU
T-
IN+
G59
G_R
_didIN
-
OU
T+
OU
T-
IN+
RTj
15
E_E
001IN+
IN-
OU
T+O
UT-
E2
IN+
IN-
OU
T+O
UT-
Rdd
10
G60
G_R
_didIN
-
OU
T+
OU
T-
IN+
RTj
13
1
1
2
2G
_Rm
osIN
-
OU
T+
OU
T-
IN+
RTj
16
Eca
p2 (t
able
)IN
+IN
-O
UT+
OU
T-
00
0
0
Gat
e
Dra
in Sou
rce
0
0 0
0
Tj
0
0
Tcas
eC
j6
Cre
f40
d1x
d1y
50
g
3
V2
d1z
d1 dd
ss
R_R
mos
R_d
ssx
d
d1bv
dss1
R_c
gs
Rx1
CG
S
Cre
f240
2
502 V
22
alfa
2
Rca
p2
R_G
diod
e
Rd
alfa
RLs
Rca
p
Ls
LgR
_GB
DS
S2
g2
Ld
s
R_e
dep
RLd
1
d1k
R_G
pow
er
edep
C_C
ds
Cj5
Cj4
Cj3
aa
R_R
001
ba
Cj2
R_R
003
C
Cj1
d
d_de
dep
T1T2
T3T4
GIPD081020131034FSR
Crs
s m
odel
ing
Crs
s m
odel
ing
DC
mod
ellin
g
DC
dio
de m
odel
ing
Cos
s m
odel
ing
Cos
s m
odel
ling
BV
dss
mod
ellin
g
Rec
over
y di
ode
mod
ellin
g
Ther
mal
impe
danc
e m
odel
ing
Doc ID 023670 Rev 1 9/24
UM1575 A brief description of self-heating model (V3 version)
24
4.1 Thermal networkThermal impedance network represents the basic element, which is featured inside the
macro-model. It is used to transform the power dissipated inside the junction into a voltage
representing the temperature (Tj).
Figure 6. Physical structure
The voltage drop across the network is detected and used as emitter value inside behavioral
equations used to model other parameters.
Thermal impedance is the experimental data required to obtain the Cauer model (see
Figure 6).
Figure 7. Thermal impedance profile and Cauer model
A brief description of self-heating model (V3 version) UM1575
10/24 Doc ID 023670 Rev 1
4.2 Experimental data used to fit the modelThe model implementation requires the following experimental data:
• Typ. output characteristics at different temperatures
• Typ. transfer characteristics at different temperatures
• Typ. drain source breakdown voltage at different temperatures
• Typ. drain source on state resistance vs temperature
• Typ. gate threshold voltage vs temperature
• Typ. forward diode characteristics
• Typ. capacitances profile vs VDS
• Typ. gate charge
• Typ. switching on resistive load
• Typ. switching on inductive load
• Typ. free-wheeling diode characteristics
• Unclamped inductive switching
• Switching losses vs gate resistance
• Equivalent capacitance time related (Co(tr)
)
• Equivalent capacitance energy related (Co(er)
)
• Max. transient thermal impedance
Figure 8. Simulated and measured output characteristics
Figure 9. Simulated curves at VGS = 10 V
Doc ID 023670 Rev 1 11/24
UM1575 A brief description of self-heating model (V3 version)
24
4.3 COSS and CRSS modelCharge and current formulas for a linear capacitor are:
For a non linear (voltage-dependent) time-independent capacitor these formulas become:
The C(V) function is obtained by lookup table.
Figure 12. Capacitance profiles
Figure 10. Normalized RDS(on) vs temperature Figure 11. Normalized gate threshold voltage vs temperature
RDS(on)
1.9
1.3
0.9
0.5-50 0 TJ(°C)
(norm)
-25 7525 50 100
0.7
1.1
1.5
1.7
2.1
AM06484v1
ID=2.5A
VGS(th)
1.00
0.90
0.80
0.70-50 0 TJ(°C)
(norm)
-25
1.10
7525 50 100
ID=250µA
AM06483v1
Q C V•= i t( ) CdV
dt
-------•=
Q C V( ) Vd= i t( ) C V( ) dV
dt
-------•=
C
1000
100
10
10.1 10 VDS(V)
(pF)
1 100
Ciss
Coss
Crss
AM06481v1
A brief description of self-heating model (V3 version) UM1575
12/24 Doc ID 023670 Rev 1
4.4 Example of dynamic characteristics
4.4.1 Gate charge
Figure 13. Gate charge - schematic
Figure 14. Gate charge - simulated waveforms
Ipulse1Vdd1
Rload1
R127
0 00
0GIPD251020131424FSR
Doc ID 023670 Rev 1 13/24
UM1575 A brief description of self-heating model (V3 version)
24
Figure 15. Gate charge - experimental waveforms
4.4.2 Switching on inductive load
Figure 16. Switching on inductive load - schematic
GIPD251020131457FSR
Iload1
Vdd1
Rgate1
Vpulse1
R127
L33
Lpar1
0 GIPD251020131432FSR
A brief description of self-heating model (V3 version) UM1575
14/24 Doc ID 023670 Rev 1
Figure 17. Switching on inductive load - simulated waveforms
Figure 18. Switching on inductive load - experimental waveforms
GIPD251020131502FSR
Doc ID 023670 Rev 1 15/24
UM1575 A brief description of self-heating model (V3 version)
24
4.4.3 Eoff vs Rgate
Figure 19. Eoff vs Rgate - schematic
Figure 20. Eoff vs Rgate - experimental waveforms
Iload1
Vdd1
Rgate1
Vpulse1
R127
L33
Lpar1
0 GIPD251020131432FSR
GIPD251020131506FSR
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4.4.4 Recovery diode
Figure 21. Recovery diode - schematic
Table 1. Eoff (comparison simulated/measured)
RG (Ω) Measured Eoff (µJ) Simulated Eoff (µJ)
4.7 4.1 3.9
10 4.31 4.4
47 6.8 7.1
200 27 29
Iload1
Vdd1
Rgate1
Vpulse1
R127
L33
Lpar1
0 GIPD251020131432FSR
Doc ID 023670 Rev 1 17/24
UM1575 A brief description of self-heating model (V3 version)
24
Figure 22. Recovery diode - simulated waveforms
A brief description of self-heating model (V3 version) UM1575
18/24 Doc ID 023670 Rev 1
4.4.5 Unclamped inductive switching
Figure 23. Unclamped inductive switching - schematic
Figure 24. Unclamped inductive switching - simulated waveforms (test 1)
Table 2. Simulated test conditions
Test TC Energy Idrain ΔTj
1 110 °C 0.3 J 83 A 83 °C
2 110 °C 0.3 J 203 A 133 °C
GIPD251020131511FSR
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UM1575 A brief description of self-heating model (V3 version)
24
Figure 25. Unclamped inductive switching - simulated waveforms (test 2)
Figure 26. Unclamped inductive switching - experimental waveforms
GIPD251020131513FSR
GIPD251020131518FSR
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4.4.6 Short-circuit test
Figure 27. Short-circuit test - schematic
Figure 28. Short-circuit test - waveforms
Doc ID 023670 Rev 1 21/24
UM1575 A brief description of self-heating model (V3 version)
24
4.4.7 Flyback simulated by self-heating model
Figure 29. Flyback simulated by self-heating model - schematic
Figure 30. Flyback simulated by self-heating model - simulated waveforms
GIPD251020131521FSR
A brief description of self-heating model (V3 version) UM1575
22/24 Doc ID 023670 Rev 1
where:
• Blue line = (Tx current sec)/10
• Black line = (Tx current Pri)
• Red line = MOSFET drain current
If you have further questions, feel free to contact us via our local sale offices.
Doc ID 023670 Rev 1 23/24
UM1575 Revision history
24
5 Revision history
Table 3. Document revision history
Date Revision Changes
25-Nov-2013 1 Initial release.
UM1575
24/24 Doc ID 023670 Rev 1
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