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7/29/2019 Space division switching fabrics
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20/03/2012 Tim Moors
Space-division fabrics
Keshav Chapter 8
YQ
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Textbook references
Keshav: Ch. 8.4
Varghese: Ch. 13
switch cost: 13.9.1 of Varghese other space division switch fabrics: Varghese pp. 443-4
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Original References
Y. Yeh et al: The Knockout Switch: A simple, modular architecture forhigh-performance packet switching,IEEE J. Sel. Areas in Comm.5(8):1274-83
C. Clos: A study of non-blocking switching networks,Bell Sys. Tech. J.,32(3):406-24, Mar. 1953
L. Goke and G. Lipovski: Banyan networks for partitioningmultiprocessor systems,Proc. 1st Annual Int. Symp. Comput.
Architecture, Dec. 1973, pp. 21-28K. Batcher: Sorting networks and their applications,Proc. AFIPS
Spring Joint Computer Conference, pp. 307-14, 1968A. Huang and S. Knauer: Starlite: A wideband digital switch,Proc.Globecom, Dec. 1984, pp. 121-5
V. Benes,Mathematical Theory of Connecting Networks and TelephoneTraffic, Academic Press, New York, 1965
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http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.1146645http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.1146645http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.1146645http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.1146645http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.1146645http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/JSAC.1987.11466457/29/2019 Space division switching fabrics
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Tutorial/survey References
W. Kabacinski et al: Guest editorial - 50th anniversary ofClos networks,IEEE Comm. Mag. 41(10):26-7
G. Broomell and J. Heath: Classification categories and
historical development of circuit switching topologies,ACM Computing Surveys 15(2):95-133, 1983
Online texts (see the TELE9751 reading list):
A. Pattavina: Switching Theory, Wiley, 1998H. Chao et al:Broadband Packet Switching Technologies,
2001
DV
http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.1235590http://dx.doi.org.wwwproxy0.library.unsw.edu.au/10.1109/MCOM.2003.12355907/29/2019 Space division switching fabrics
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OutlineSingle-stage: Crossbar switches
Handling crossbar output port contention
KnockoutArbitrationStaged switches
Networks of basic elementsClos
BanyanStructureBlocking & Motivation for sorting
Batcher sorting networks
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Relation to Cisco Nexus architecture
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The crossbar fabric on the Cisco Nexus 5500Series is implemented as a single-stage fabric,
thus eliminating any bottleneck [blocking]
within the switches
The [fabric] is a single-stage high-
performance 100-by-100 crossbar with anintegrated scheduler. The scheduler
coordinates the use of the crossbar
between inputs and outputs, allowing a
contention-free match between I/O pairs.
The scheduling algorithm is based on an
enhanced iSLIP algorithm.
Each row in the crossbar isassociated with an input port, and
each group of four columns is
associated with an egress port; thus,
there are four cross-points per egress
port. In addition, there are fourfabric
buffers with 10,240 bytes of memorybuffer per egress port.
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Crossbar switches
At the intersection of each input and each output, there is across point, which can be selectively enabled, allowing
communication from input to output.e.g. Intel 470 switches, Cisco Catalyst 6500, 12000 series routers
Feasible to implement in VLSI (e.g. PMC-Sierra PM9312),limited by high-speed I/O to chip - pincount
[Sketch from znet.net/~cdk14568/mpet/contacts/fig23-5.gif. Photos from Lucent]JC
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Advantages of crossbar switches
Simple structure Suitable for circuits or packets
Low latencyminimal number of connecting pointsbetween arbitrary input and output.
No internal blocking (may have output port blocking)
Multicast is easy with electrical crossbars Difficult with MEMS optical crossbars, since mirror will
(hopefully) reflect all signal power to one intended output.
Easy to reach output, but scheduling multicast s.t. all outputs aresimultaneously available (other inputs arent transmitting to some)
can be tricky.V8
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Disadvantages of crossbar switches
Scalability: # of crosspoints (Nx) grows with (P=number of ports)
2 Difficult to incrementally expand
Output buffer speed P, not line speed (=> knockoutprocess).
Fanout: Number of crosspoints on each line increaseslinearly with number of ports, increasing capacitiveloading, slowing transmission (just as bad as time-division
bus, but inferior to space-division fabrics such as Banyan)
No fault tolerance: each crosspoint is needed for oneconnection or another.
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Handling crossbar output port contention
Crossbar switches (like all switches) can suffer output port
blocking.
Responses:
Internal buffering at crosspoints (next slide) [GJ]
Buffers at outputs [5D]. Issue: How to reduce speed ofbuffer, or reduce number of low (input-port) speed
buffers? Knockout tournaments [4K]
Block at input. Issue: How to be fair to inputs s.t. none isblocked forever? arbitration systems. [ZP]
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Internal crossbar bufferingInternal buffering, e.g. to handle output contention
Fig. 8.14 from KeshavGJ
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Buffering at crossbar outputs
Multiple inputs might
Time-division access to one output port buffer.
Small, simple, but need fast buffer.
Speedup problem: as number of inputs increases, speed ofbuffer at output must increase (like shared medium switch)
Lead to multiple distinct buffers on each output port.
Low speed, but no sharing => more buffer space needed.
How about something in-between: someL
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Knockout switch
Can we exploit the directional nature of
traffic (few inputs will be directed to any one
output at a time) to reduce the output port
buffer capacity (size+speed)?So use a knockout tournament to decide whichinputs get buffered:
Competitors (inputs) play and those who winprogress to the next round.At the end, one competitor is selected (transferred
to buffer); others have lost one match.
Losers then compete again (clean slate) todetermine next competitor to be selected.
Repeat to capacity of output port.
Example 1 Example 2
e.g. left-most occupied buffer
wins a round; losers repeat
For details, see Peterson and Davie, 1st edition, pp. 193-6; Keshav p. 1994K
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Scenarios
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Knockout structure
A
T2
Shifter
Buffers
T1
Shifter
Buffers
T0
Shifter
Buffers
Delay
1 2 3 4
D
D
D
D D
D
D
D D
D
D
D
D
P:L knockout concentrator
selects up toL pkts fromPinputs
(hereP=8,L=4)Drawings based on L. Peterson
Shifter &shared buffer
P:L knockoutconcentrator
Packet
filters
Inputs
Outputs
Shifter spreads load
...
...
A A
8 in
8 out
8
Scenarios
PL PR PL - - PR - -
PL PR PL - PR- - -
L R
Px = packet from L/R input
orPRPL (to be fair to RHS ports)
A
B
C
B
C
L0
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Crossbar arbitration
Problem: When multiple inputs have infofor one output, crossbar controller needsto determine when each should beswitched through.
Aims: Schedule aims for Performance: Maximise throughput by
minimising transfer rounds; minimisedelay
Fairness: each input should receiveequal access.
Cost: Shouldnt require much state infoor many iterations.
Generic method: May achieve this throughmultiple iterations (per round) ofnegotiation between inputs & outputs
iSLIP
FIFO
Often (e.g. by Varghese) called scheduling, but called arbitration by others (e.g. Cisco) & arbitration avoids
confusion with later lecture on packet scheduling: Scheduling affects the timing of packets; here timing forcrossing the fabric; later packet scheduling timing when sent on a line.
6 rounds
Optimal?1: A B C2: - A B3: B C A4: C - -
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Arbitration basis
Each input maintains a separate Virtual Output Queue of cellsdestined for each output. (Fixes head of line blocking)
Each ofPinputs maintainsPVOQs=>P2 bits of activity info control arbitration. Feasible to optimise with
tens of ports (e.g.P=32 => 1024 bits) Need to convey activity info between inputs and outputs
Inputs send requests to outputs Each output offers to serve one request (must choose fairly) Each input accepts one offer
coordinate inputs and outputs, e.g. multiple iterations: Reiterate touse outputs whose offers werent accepted.
Trade-off between performance and number of iterations
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Parallel Iterative Matching (PIM)
Offers are made to random inputs
Used in DEC AN-2 30 port switch
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Figure from VargheseCorrection: Requests from A to 1 should be gray; they are similar to other requests. a=1 on input c is an artifact of iSLIP example
PIM example
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Figure from VargheseCorrection: Requests from A to 1 should be gray; they are similar to other requests. a=1 on input c is an artifact of iSLIP example
PIM example(repeated for non-animated display)
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PIM vs iSLIP
PIM requires a logarithmic number of iterations toattain maximal matchesvs iSLIP gets close to maximal matches after just one
or two iterations.(though maximal close to maximal & PIM exampleuses 1 iteration and iSLIP example uses 2 iterations )
in terms of fairness mechanism
PIM : Ethernet as iSLIP : token ringrandomness taking turns
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iSLIP
Each port maintains a pointer to next port desired to use. Choose lowest port pointer; update pointer
in circular sense:P+1 = 1st port
Pointers initially all point to 1st port, but desynchronise asrandomly directed traffic passes through.
Used in Cisco GSR router
N. McKeown et al: Scheduling Cells in an Input-Queued Switch, IEE Electronics Letters, pp.2174-5, 1993
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iSLIP round 1
Figure from Varghese
Pointers only get updated after iteration 1 => B still points to 1 & 2 still points to A
B overhears A accepting 1 => knows that 1 is busy => doesnt request 1
a=3?!
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iSLIP round 2
a
Figure from Varghese
Round2 iteration 1 should show C with packet for output 3
3 3 3
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iSLIP round 3
a
Figure from Varghese1G
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Outline
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Staged switches
Here we are interested in networks within the switch. Of course switches canalso be interconnected to form external networks (the more common use of the word).
Multistage switches are composed of networks of smallerswitches (e.g. crossbars or shared-media), often 22
Potential benefits:
Fewer crosspoints than in a crossbar switchDiversity of pathsHow?: Selection of switch in first and last stage isdetermined by which input & output are being connected=> use three or more stages to get benefits
Why?: Intermediate stages can offer choice of switch =>Lower blocking probabilityIncreased reliability: can still connect input andoutput even if a component switch has failed
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Clos switches
Each switch (array) of a stageconnects to each switch of neighboringstages(# inputs may # outputs for internal
switches) Simplest Clos switches have 3 stages,
but more are possible by recursivelyreplacing middle stages by 3-stage Closstructures.
Advantages: can switch circuits (c.f. Banyan) path diversity fewer crosspoints for largeP
Nx = (nk)(P/n)2 + ((P/n) (P/n))k
= 2Pk+ kP2/n2
What are the optimal values forn and k?
P/nP/n
P/nP/n
P/nP/n
P
inputs
nk
nk
nk
nk
P/narrays
kn
kn
kn
kn
Poutputs
k
arrays
P/narrays
Ignoring the ellipsis, thisexample hasP=8+, n=2, k=3+
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P
/n
P
/n
P/nP/n
P/nP/n
P/nP/n
k=Number of arrays in middle stageTo be non-blocking, must be able to
create a connection in the presence ofexisting connections on all other portsof input and output arrays.
Each array has only one connection toswitches in adjacent stages.
How many middle-stage arrays may be inuse?
n-1 may be tied up with other inputsfrom the same input array. (n=3 here)
n-1 may be tied up with other outputs
to the same output array.Worst case: may have differentmid-stage arrays tied up by inputs andoutputs.
=> need at least (1+1)(n-1)+1 middle-stage arrays, i.e. k2n-1
=> Nx = 2P(2n-1) + (2n-1)P2/n2
P/nP/n
P
inputs
nk
nk
nk
nk
P/narrays
kn
kn
kn
kn
P/nP/n
P/nP/n
Poutputs
karrays P/narrays
(Connections that dont share bothsame input and same output arraycan reuse existing arrays.)
P/nP/n
P
/n
P
/n.
..
.
..
.
.
.
.
.
.
7M
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N=>Number of arrays in outer stages
DifferentiateNx wrt n
124(min)2
20
24240
212240
3
222224
4
222
PPN
Pn
PPnn
nPnPnPPn
n
nPnPnP
x
Forn large, neglect +P +Pn0 factor
Ports Nx(3-stage Clos) Nx(Cross)8 96 64
128 7,680 16,384
2048 516,096 4,194,304 Bonus mark on offer if you can justify why n (notP) should be large.Is it because large n leads to large kfor non-blocking, and with large k, adding another array in the middle to provide fault tolerance with little overhead?
5G
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(Rearrangeably) non-blocking Clos
2n-1kensures Clos switch wont block
n k< 2n-1 ensures Clos switch is rearrangeably non-blocking, i.e. can connect input to output, but might need
to rearrange existing connections
e.g. n=k=2
to connect each input to corresponding output requires pattern on left straight connections may end; but cross connections block connection
between bottom input to top output
need to rearrange
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Clos switches
Used in some
commercial products:
Juniper T-series routers
NEC ATOM ATMswitch
Myrinet switch
Photo from http://www.cs.utk.edu/~dongarra/lyon2000/Talk02-Chuck-Seitz.ppt
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Outline
4G
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PipeliningPipeline: A sequence offunctional units ("stages") which performs atask in several steps, like an assembly line in a factory. Each functionalunit takes inputs and produces outputs which are stored in its output
buffer. One stage's output buffer is the next stage's input buffer. Thisarrangement allows all the stages to work in parallel thus giving greater
throughput than if each input had to pass through the whole pipelinebefore the next input could enter.
The costs are greater latency and complexity due to the need tosynchronise the stages in some way so that different inputs do notinterfere. The pipeline will only work at full efficiency if it can be filled
and emptied at the same rate that it can process. [http://foldoc.org/] Multistage switches can operate as pipelines, with each stage
operating (at any instant) on a different set of packets.
Cells (rather than variable-length packets) facilitatesynchronisation: all switches in a stage operate for the same period.
Port processors segment & reassemble variable length frames.K7
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http://foldoc.org/index.cgi?functional+unitshttp://foldoc.org/index.cgi?bufferhttp://foldoc.org/http://foldoc.org/http://foldoc.org/index.cgi?bufferhttp://foldoc.org/index.cgi?functional+units7/29/2019 Space division switching fabrics
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Multistage networks:1.Physically separate stages
Figure from H. Peyravi
Physically separated
stages form a pipeline
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Multiple logically separate stages
(emulating physically separate stages)
can be created by recirculating, over
time, data through one physical stage.
Multistage networks:2.Recirculation
Inputs of switches A-D:ExternalRecirculated
Outputs of switches A-D:ExternalRecirculated
S1
SA
S2SB
S3SC
S4SD
S5
S6
S7
S8
S9
S10
S11
S12
timeJU
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Pipelined multistage switches
With multiple stages, each transfer (from input to output) passesthrough successive stages
At any instant: circuit engages the complete path through the fabric
packets need only engage one stage at a time=> can pipeline packets through: at any instant, each stage
processes a separate wave of packets
Packet switching, stages could act autonomously, each responding todifferent packet header bits.
If we identify output ports with binary addresses, successive stagescould handle progressively less significant bits of the address.(Note: address here is for internal use within switch. Packet classifier willtake address from packet (e.g. IP) header to determine output port, and henceinternal address)
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Banyan switches
Self-routing using binaryrepresentation of output
port (extra header for useinside switch)
Direction for each stagespecified by bitcorresponding to thatstage (MSb 1st)
=> cant multicast
P-port switch has log2Pstages each withP/2 22switches
=>Nx= 2Plog2P
000 001 010 011 100 101 110 111
0 1
0 1
0 1
1 => switch to right output port of switch in this stage
0 => switch to left output port
There is a very large, famous Banyan tree that occupies more than 3 acres of land in a park
in Lahaina, on the island of Maui in the Hawaiian islands. Seifert p. 208
from input port 001 to dest
n
port110
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Switch complexity compared
Number of crosspoints for a switch withPports:
Crossbar:Nx =P2
Clos:
Banyan: Nx=2Plog2P
Banyan switches
require the fewest crosspoints (of those covered) but suffer from the potential for blocking
typically limited to packet switching
124 PPNx
P=2048
4,194,304516,096
45,056
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Project: Software Banyan
Rudimentary (e.g. fixed size), but demonstrates the idea.
Full source code in3FabricBANYAN.c
struct banyanElement {int elementNumber;// flags indicate if// outputs busy top=0,bot=1int topFlag;int bottomFlag;// pointers to next element
banyanElement *zero;banyanElement *one;};banyanElement *elements[12];
void fabricElements() {...
elements[7]->zero = elements[10];elements[7]->one = elements[11];
/* Will print out graphical representprintf(" ___ ___ ___printf("000 ---| 0 |---| 4 |---| 8 |--printf("001 ---|___| |___|\\ |___|-printf(" \\ / \\/printf(" ___ \\ /___ /\\ ___printf("010 ---| 1 |---| 5 |/ | 9 |--
printf("011 ---|___| /\\|___|---|___|-printf(" \\/ \\/printf(" ___/\\ /\\__ ___printf("100 ---| 2 | \\/| 6 |---| 10|-printf("101 ---|___|---|___|\\ |___|-printf(" / \\ \\/printf(" ___/ _\\__ /\\ ___printf("110 ---| 3 | | 7 |/ | 11|--
printf("111 ---|___|---|___|---|___|--*/VN
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Project: Software Banyan (ctd)
if(out_addr[stage] == '0') { // send from top node of element// check whether output zero has been used, if not allow thispacket to go through & record that it has been used; elsediscard this packetif(currentElement -> topFlag == 0) {
nextElement = currentElement->zero;currentElement -> topFlag = 1;} else { // element node busy, packed dropped.blocked = 1;
}} else { // send from bottom node of element
if(currentElement -> bottomFlag == 0) {nextElement = currentElement->one;
} else { // element node busy, packed dropped.blocked = 1;
}}
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Types of Banyan blocking
Internal blocking (): Contention for anoutput port of a component switch in
one of the early stages.
000 001 010 011 100 101 110 111
0 1
0 1
0 1
110 111
110
Output port blocking (): Contentionfor an output port of a switch in the
last stage.
110
Output port blocking may even occur
internally ()
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Probability of internal blocking
Blocking probability is
high, e.g. if priority is
given to leftmost input.
(Exercise: Find a formula
expressing how high,
assuming random
inputoutput mappings)
Destinations:
000 001 010 011 100 101 110 111
000 010 111 100 001 011 110 101
Output port numbers
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Dealing with Banyan internal blocking
Buffering within the switching network
Dilation:
Multiple planes of latter stages
Move traffic blocked in oneplane to higher plane (RGB,Y) Expensive: number of switches
in each stage increasesexponentially with stage number
for the worst case.Preface Banyan with networkto
reduce blocking (distribution network Benes) avoid blocking (Sorting networks ...)
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Motivation for sorting networksThe blocking could have been avoided if only the information
destined to each output was present on the correct input.
000 001 010 011 100 101 110 111
000 100 001 101 010 110 011 111Destinations:
000 001 010 011 100 101 110 111
000 010 111 100 001 011 110 101
000 001 010 011 100 101 110 111Sort
Shuffle
=> Preface Banyan network with a
sorting network,
and a Shuffle Exchange
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Examples of non-blocking with sorting
000 001 010 011 100 101 110 111
000 010 100 110
000 010 100 110Sort
Shuffle
Not a proof that sorting+shuffling always prevents blocking
000 001 010 011 100 101 110 111
000 011 110
000 011 110Sort
Shuffle
000 001 010 011 100 101 110 111
001 111 011 100 101
001 011 100 101 111Sort
Shuffle
Destinations are multiples of 2 Destinations are multiples of 3 Destinations: 1, 3, 4, 5, 7
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Sorting outline
Isnt sorting complicated? As complicated as switching?
Sorting networks
Unlike serial sorting algorithms, sequence of comparisons must be
independent of data values to allow fixed parallel implementation. Issues (covered in ensuing slides):
Bitonic sequences
Batchers sorting of Bitonic sequences
How to create a bitonic sequence
Batcher-Banyan switches
Trapping sorted duplicates
http://en.wikipedia.org/wiki/Sorting_network
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Sorting is simpler than switching
Both sorting and switching reorder items, but
1. Switch must spread after sorting to account for idle ports
Destination: 101a ---b 111c 001d 010e 110f ---g 011hSorted: 001d 010e 011h 101a 110f 111c ---x ---x
Switched: ---x 001d 010e 011h ---x 101a 110f 111c
Destination: 101a---b 111c101d 010e 110f ---g 011h
Sorted: 010e 011h101a101d 110f 111c ---x ---xSwitched: ---x --- 010e 011h ---x101a 110f 111c
101d
2. Switch must deal with duplicates
e.g. inputs a & d contend for port 101
Input port: a b c d e f g h
i.e. adding a sorter (
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Aside: Bitonic sequences
A bitonic sequence is either:
A. a concatenation of an increasing sequence and adecreasing sequence, i.e. {a1, a2, ... a2k} and
or
B. a sequence that can be shifted cyclically to become A.
e.g.
1 2 3 8 7 6 5 4 8 7 1 2 3 4 5 6 4 5 6 8 7 1 2 3Theorem: Any bitonic sequence that has been arbitrarily
split in two and had the two parts reversed is alsobitonic.
e.g. 8 7 1 2 3 | 4 5 6 3 2 1 7 8 6 5 4 1 7 8 6 5 4 3 2
kkkk aaaaaaak 221321 ......:
cyclic
shift8H
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Batchers sorting of bitonic sequences
Batcher showed that given a bitonic sequence {a1 ... a2k}
then the sequences
{min(a1,ak+1), min(a2,ak+2), .. min(ak-1,a2k)} and
{max(a1,ak+1), max(a2,ak+2), .. max(ak-1,a2k)}
are also both bitonic, and no number in the sequence of minima exceeds any number in the sequenceof maxima
e.g. {8 7 1 2 3 4 5 6} {3=min(8,3), 4=min(7,4), 1=min(1,5), 2=min(2,6)} and
{8=max(8,3), 7=max(7,4), 5=max(1,5), 6=max(2,6)}
i.e. can sort a bitonic sequence by dividing into two sub-sequences (one ofminima and one of maxima), and repeating on sub-sequences.
{3,4,1,2}{8,7,5,6}{1,2}{3,4}{5,6}{8,7}1,2,3,4,5,6,7,8
K. Batcher: Sorting networks and their applications,Proc. AFIPS Spring Joint
Computer Conference, pp. 307-14, 196840
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How to create a bitonic sequence
Use a odd-even mergesort to make sequence bitonic before feedinginto Batcher sorting network.
Aim: out.i < out.ji
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Odd-evenMerge sort Batcher sort
=
Ascending sort
Decending sort==
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bitonic list
Numerical example from
C. Partridge: Gigabit Networks, p. 115
to make bitonic
Legendmax
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Trap modules
Sorting alone doesnt resolve output port contention=> trap excessive (>1) packets destined to one port
Starlite switch: Recirculate duplicates
Resequencing is needed. Often give priority torecirculated packets to avoid prolonged resequencing.
Sorter Trap ShuffleConc. Expand Banyan
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Benes networks Essentially two Banyan networks,
one the mirror image of the other
2nd half= standard Banyan network 1st half= distributor: used to shift
inputs so as to reduce blocking.
Switch controller assigns paththrough distributor.
APPBenes network hass=2log2P-1 stages,with each stage havingP/222 switching elements (4 crosspoints)
i.e.Nx = 4Plog2P-2P
The Cisco CRS-1 uses a unique 3-Stage Benes topology switching fabric[http://www.cisco.com/en/US/products/ps5763/index.html]
Fig. from A. Pattavina: Switching Theory,
Wiley, 1998, p. 100
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The end