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1 Some Limits of Power Delivery in the Multicore Era Runjie Zhang, Brett H. Meyer, Wei Huang, Kevin Skadron and Mircea R. Stan University of Virginia, McGill University, IBM Austin Research Lab.

Some Limits of Power Delivery in the Multicore Era

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Some Limits of Power Delivery in the Multicore Era. Runjie Zhang , Brett H. Meyer, Wei Huang, Kevin Skadron and Mircea R. Stan University of Virginia, McGill University, IBM Austin Research Lab. ITRS Projection on Transistor Density (2011 Edition). Source: ITRS 2011. - PowerPoint PPT Presentation

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Page 1: Some Limits of Power Delivery in the  Multicore  Era

1

Some Limits of Power Delivery in the Multicore Era

Runjie Zhang, Brett H. Meyer, Wei Huang, Kevin Skadron and Mircea R. Stan

University of Virginia, McGill University,

IBM Austin Research Lab.

Page 2: Some Limits of Power Delivery in the  Multicore  Era

ITRS Projection on Transistor Density (2011 Edition)

2

2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 20260

10000

20000

30000

40000

50000

60000

70000

80000

Year

Mtr

an

sist

ors

/cm

2

Source: ITRS 2011

Page 3: Some Limits of Power Delivery in the  Multicore  Era

Power Density and Current Density

3

45nm 32nm 22nm 16nm0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

Power Density Current Density

Tech Node

W/m

m2

A/m

m2

Current = Power / Supply Voltage

Page 4: Some Limits of Power Delivery in the  Multicore  Era

The Chip - Package

4 Source: pcgameshardware.com

Page 5: Some Limits of Power Delivery in the  Multicore  Era

5

The Chip – Inside the Package

Source: ITRS 2009Edition,

Page 6: Some Limits of Power Delivery in the  Multicore  Era

The Chip – C4 Bumps

Source: flipchips.com,Source: Wikipedia

Page 7: Some Limits of Power Delivery in the  Multicore  Era

What are the problems?

7

2011

2013

2015

2017

2019

2021

2023

2025

2500

3000

3500

Year

Tota

l Pa

d C

ount

Source: ITRS 2011Edition,

3.7% 5.6% 7.4% 11.1%0%

50%

100%

150%

200%

250%

300%

IR drop

Maxim

um

Dela

y I

ncre

ase

Source: Shao et al. IEEE Computer Society Annual Symposium on VLSI, 2005

Source: Ye et al. Applied Physics letters, 2003

Electromigration

Page 8: Some Limits of Power Delivery in the  Multicore  Era

Architecture Level PDN Model

8

Page 9: Some Limits of Power Delivery in the  Multicore  Era

• Input:– PDN physical parameters. E.g. metal width– Processor floorplan and powermap.– Pad configuration

• Output:– Voltage pad– Pad current

9

Architecture Level PDN Model

Page 10: Some Limits of Power Delivery in the  Multicore  Era

Validation

10

• IBM Power Grid analysis benchmarks– Steady-State– SPICE format– Provides details about metal layer and Pad

locations

Page 11: Some Limits of Power Delivery in the  Multicore  Era

11

Power Map

VDD Pad Distribution

IBM_PG6

Page 12: Some Limits of Power Delivery in the  Multicore  Era

Validation Results

12

Page 13: Some Limits of Power Delivery in the  Multicore  Era

Pad Current Comparison

13

Page 14: Some Limits of Power Delivery in the  Multicore  Era

Multicore Scaling

14

Baseline: 3.7GHz, Duo Core, Intel Penryn 4-way OoO Processor

Private L2 cache, 3MB per core

Mesh-Based NoC

  45nm 32nm 22nm 16nm# of Cores 2 4 8 16Area(mm2) 116.4 124.8 131.5 149.3

Supply Voltage 1 0.9 0.8 0.7Peak Total Power (W) 74.62 100.5 116.8 148.5

Peak Total Current(A) 74.6 111.6 145.9 212.1

Page 15: Some Limits of Power Delivery in the  Multicore  Era

Flooplan

15

Page 16: Some Limits of Power Delivery in the  Multicore  Era

Power Delivery Noise Scaling Trend

16

Page 17: Some Limits of Power Delivery in the  Multicore  Era

Pad Optimization

17

Page 18: Some Limits of Power Delivery in the  Multicore  Era

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Sorted Pad Current After Optimization

Sorted Pad Current Before Optimization

Page 19: Some Limits of Power Delivery in the  Multicore  Era

I/O vs. Power Supply

19

Const core-to-MC ratio

80 pads per MC

5% IR drop target

Page 20: Some Limits of Power Delivery in the  Multicore  Era

Thermal vs. Power Delivery

20

Page 21: Some Limits of Power Delivery in the  Multicore  Era

Conclusions

• Power delivery is becoming a limiting factor in near future;

• IR drop poses a bigger challenge than ElectroMigration;

• Memory bandwidth will be affected’• With liquid cooling, scaling hit power

delivery wall before thermal wall.

21

Page 22: Some Limits of Power Delivery in the  Multicore  Era

Questions?

22

Page 23: Some Limits of Power Delivery in the  Multicore  Era

Thanks!

23

Page 24: Some Limits of Power Delivery in the  Multicore  Era

Temerature Map vs. Voltage Map

24

Voltage (V) Temperature(o C)

Page 25: Some Limits of Power Delivery in the  Multicore  Era

25

Volta

ge (V

)Te

mpera

ture

(oC

)