Solar Invertre

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1. INTRODUCTIONRecent project experiences have shown that small to

medium sized solar arrays, often incorporated into a

building structure and operating in a grid interactive

mode, are one of the faster growing areas of

photovoltaic applications. A local Queensland

example is that up to 200 solar arrays, of up to 5kW

each, to be integrated into shade structures under the

solar schools project funded by Stanwell Corporation

Limited.

Traditional grid interactive inverters use a 50Hz

transformer with a low voltage power conversion

stage to connect to the grid. Although transformerless

designs have been proposed, [1], the isolation

provided by a transformer is highly desirable in a

smaller system. This paper is the result of

Queensland Sustainable Energy Innovation Fund

(QSEIF) grant which will allow CQU and Enertec to

jointly develop a commercial inverter using a high

frequency link during 2000. While this approach has

been used before, [2], converters of this type are only

feasible from an efficiency viewpoint due to recent

developments in switching devices and magnetic

materials, as well as new insights into loss control in

switching power converters.

This inverter design will establish new bench marks

for size, performance and value for grid interactiveinverters. An early indication of the outcomes is

given by the product size, the prototype 1.5 kW

converters, fit into a 170mm by 115mm by 60mm

package. The largest component, the high frequency

transformer, fits comfortably in the palm of the hand.

A Low Cost High Efficiency Inverter for Photovoltaic Applications

P.Wolfs, S.Senini

Central Queensland University

Dale ButlerEnertec Australia Pty Ltd

Abstract

Recent changes within the electricity industry, such as the 2% new renewable energy targets and

green energy marketing schemes will see significant growth in the number of solar generating

systems connected to the grid. The power electronics interfacing these systems to the grid can

become smaller, less costly and more efficient. In this paper a 1.5kW, single phase, grid interactive

inverter is proposed. This commercial inverter uses a high frequency link rather than the traditional

50Hz output transformer. Great care has been taken to achieve efficiency improvements that

justify the additional complexity. This paper presents the results of a simulation study which was

conducted to develop and verify the operation of the key control systems required by the inverter.

PV

Array

Switching

Stage

HF

Transformer

Rectification

StageUnfolding

Stage

Connection

to Mains

Figure 1. Topology of proposed grid interactive inverter.


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2. INVERTER TOPOLOGYThe proposed grid interactive system is shown in

Figure 1. The DC voltage at the array terminals is

converted to a rectified sinusoidal AC current

waveform at the output of the switching converter.This waveform is then unfolded to produce a unity

power factor AC current at the mains terminals.

The array voltage in this system is chosen to be

nominally 120V. The high frequency transformer has

a ratio of 3.2:1 so that the peak voltage available at

the output is 384V, which is sufficient to produce a

240VRMS+6% voltage at the inverter terminals.

Several unique features have been added. While these

will be discussed in detail in a future paper, points of

interest include:

Primary inverter leg inductors which prevent theMosfet body diodes from carrying anytransformer current during the bridge dead time,

allowing a better recovery of energy from the

transformer leakage inductance

Tapped output inductors, which divert theflywheel current from the output bridge to a

single extremely fast recovery diode, this allows

a reduction in total conduction and reverse

recovery loss.

As space is limited, this paper concentrates on the

control features of the converter.

3. INVERTER CONTROLThe inverter uses five major control loops which

operate at widely differing time scales. Discussion on

the inverter control is broken up into the following

sections:

Current Mode Control Sinusoidal Current Regulation DC Balance Control Phase locking and islanding detection

Array Voltage Regulation Maximum Power Point Tracking

3.1 Current Mode ControlThe inverter output current is controlled, in the first

instance by an analogue current mode controller,

(CMC). The current control loop on the switching

stage operates at 75 kHz and is implemented in

analogue circuitry using a LT3846 current mode

controller. The CMC controls the currents flowing in

the two 750 H filter inductors by adjusting theconduction times of the power Mosfet devices.

These Mosfets conduct in diagonally opposite pairs.A fixed frequency oscillator triggers the conduction

of a pair. Conduction normally finishes when the

inductor current reaches a set current demand. A

sinusoidal inverter current can be generated if the

inductor currents are forced to follow a suitably

shaped demand signal. This demand signal, a series

of sinusoidal half cycles of controlled peak

magnitude, is generated by an outer current loop.

The CMC is fully isolated from the power circuit,

transformer based drivers operate the Mosfets, while

the controlled current is detected at the transformer

primary via a current transformer (CT).

3.2 Sinusoidal Current RegulationAn outer current loop is required to reduce some

minor current distortion components that will occur

with a simple CMC control loop. These include

current errors due to:

Inductor current ripple, a CMC controls the peakrather than the average inductor current

Minimum switch on times and pulse dropping.

The average current is measured by a CT after theunfolding stage and compared with the desired

sinusoidal reference. The error is then passed into a

proportional-integral controller to generate a

correction signal. This correction signal is added to

the feed forward current demand signal sent to the

current mode controller. The control loop is shown in

Figure 2.

SetpointCurrent

Measured

Output Current

Current

Error

Proportional plus

Integral Controller

Current Control

Signal for CMC

+

- +

+

Figure 2. Control loop for outer current control.

The outer current loop is digitally implemented and

mains synchronised. The nominal sample rate is

200S. The input reference signal is taken from asinusoidal look up table and multiplied by a


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magnitude controlling factor which determines the

converter output power. This factor is generated by

the maximum power tracking system.

3.3 DC Balance ControlThe DC current injected into the mains must be

below a level specified by the relevant standards,

[3,4]. At this time in Australia the standards specify


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perturbation frequency. A larger capacitor masks any

fast changes in array power and hence requires a

lower frequency perturbation. Power measurements

are taken at the maximum and minimum points of

this perturbing sinusoid. Thus we have a change in

voltage and can measure the respective change inpower output.

The control law to provide continuous tracking of the

maximum power point is given by equation (1).

== dtV

PKdt

dV

dPKVshift (1)

where: Vshift is the change in operating point to

move closer to the maximum power point.

Kis a proportional gain constant

dV

dPis the differential change in power with

respect to voltage.P is the difference in power between two

operating points.

V is the difference in voltage betweentwo operating points.

Figure 4 shows the typical power versus voltage

curve for a solar array. Using this curve the operation

of equation (1) may be explained.

A

B

C

Voltage

Power

Figure 4. Typical Power versus Voltage curve for a

solar array.

Consider the system operating at points A, B and C.

The Table 1 indicates the control signal which willresult for each case: As Table 1 clearly shows, the net

movement for any operating condition is towards the

maximum power point. The control block diagram is

shown in Figure 5.

Table 1. Summary of control action for different

operating points on the power versus voltage curve of

Figure 4.

Operating

Point

V PV

P

ControlAction

A +

-

+

-

+

+

Increase V

Increase V

B +

-

-

+

-

-

Decrease V

Decrease V

C +

-

NC

NC

Zero

Zero

NC

NC

NC = No Change

SetpointVoltage

Measured

Array Voltage

VoltageError

Proportional plus

Integral Controller

Current MagnitudeSetpoint (A)

+

-

Limit Current to

Positive Demand only

Perturbation

Voltage

+

V

P

K

Measured

Array Voltage

Measured

Output Power

Sampled at maximum

and minimum of

perturbation

Figure 5. Complete maximum power tracker and

voltage regulation algorithm.

4. SIMULATION MODELThe control loops within the system operate over

widely varying time constants. The MPPT and

voltage regulation loops operate over times from

10ms to tens of seconds, while the current mode

control and current regulation operate on time scales

of microseconds to milliseconds. It is not feasible to

try to model all of these control loops in the same

simulation as the time required to run the simulation

may extend into weeks. Consequently the simulation

model is broken into two levels.

4.1 Level One ModelLevel one considers the operation of the array voltage

regulation and the MPPT algorithm. The model is

shown in Figure 6. The array is modeled according

to the physical equations which describe its


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operation, [9]. These equations are implemented in

SIMULINK in block diagram form. The equations

capture the relationship between input variables such

as luminance and temperature, and the output

variables voltage and current. This level of model

allows testing of the MPPT algorithm and the voltageregulation algorithm.

Solar

Array

Model

Average Load Current

i =Asin2(t)

Capacitor Filter

5000F

Figure 6. Level 1 model of grid connected inverter.

For the purpose of this model the current drawn bythe load is represented by its average value. The

average current has a function described by Equation

(2).

( ) ( )tAtiload 2sin= (2)

where: A is the magnitude of the current drawn

is the fundamental frequency inradians/second

Expansion of equation 2 shows that the inverter

current has a DC component, which is responsible for

the real power transfers from the array to the load,

and a double frequency 100Hz component. This100Hz component is characteristic of all single phase

power transfers. This current component will cause a

100Hz ripple voltage. The array voltage regulator

attempts to maintain the array voltage at the

maximum power point but cannot respond to the

100Hz ripple components. These ripples will move

the array off the maximum power point. Some of the

generation capacity is lost and this reduces the

overall system efficiency. The prediction of the

actual loss is complicated by the nonlinearity and

asymmetry of the Power-Voltage relationship. The

loss of power due to these 100Hz excursions may be

reduced by increasing the capacitor size. A larger

capacitor decreases the voltage regulator bandwidth

and raises the possibility of loss if the array insolation

changes frequently. These requirements are

conflicting.

The capacitor size should be large enough to limit the

100Hz voltage variation to a few percent of the

nominal bus voltage. The simulation model has been

used to predict the effects of increasing capacitor size

on the losses. Our simulations show that 5000 Flimits the losses from this effect to less than 0.5% of

the array rating at maximum power.

4.2 Level 2 ModelThe level two model allows testing of the control

algorithms and switching control for the inverter.

This model provides a more detailed representation

of the switching stages and therefore requires a much

greater time to run. The functions of maximum power

tracking and voltage regulation, which require several

seconds in real time to realize cannot be included in

this model, without requiring simulation times in

excess of several days. This model will be used to

verify the switching characteristics and the output

wave shape of the inverter.

The array in this model is modeled as a constant

source, which can supply any current. Over a few

mains cycles this is a valid representation. The

inverter model includes the switching stage, the

transformer and rectifier, and the unfolding stage as

exists in the real system. The circuit topology is

shown in Figure 1.

The simulation model has topological similarity to

the actual circuit. Each element (inductor, capacitor,

switches) has a mathematical representation in the

model. For example a switch may be represented as a

two valued resistance, which is low when the switch

is on and high when the switch is off. Individual

elements in the model are connected to form the

complete system. Switching controls are

implemented as logical functions in the simulation.

The generic switching behaviour of the circuit can be

represented, however the higher order models of

switches, which include true switching characteristics

are not included. Analysis to this degree requires yet

another level of simulation.

This model can be used to verify that the inverter and

proposed control algorithm will produce an

appropriate output. The output should have minimal

distortion so as to meet the standards for such aninstallation.

5. SIMULATION RESULTSFigure 7 shows the output current waveform for a

simulation at rated output power. As can be seen

from Figure 7 the current wave shape is sinusoidal


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with a small distortion around the zero crossings of

the waveform. This distortion is caused by the

requirement that the switches, once turned on, remain

on for a minimum time period, (the minimum on

time).

0 0.005 0.010.015 0.020.0250.03 0.0350.04-10

-8

-6

-4

-2

0

2

4

6

8

10

Time (seconds)

Current(Amps)

Graph of two cycles of mains current for Inverter

Figure 7. Output line current over two mains cycles

at full load.

As the current demand reduces the switch on time

becomes smaller than the minimum on time and the

wave shape deviates from sinusoidal. This is the

main cause of the waveform distortion and is largely

corrected by pulse dropping which is forced by the

secondary control loop. Increasing the secondary

controller bandwidth can reduce the magnitude of the

deviation, however too high a bandwidth will

produce instability. A tradeoff is required. The

simulation results are required to demonstrate the

stability of the system and verify that the distortion is

within acceptable limits.

0 100 200 300 400 500 600 700 800 900 10000

1

2

3

4

5

6

7

8

9

Frequency (Hz)

CurrentMagnitude

(Amps)

Spectrum of line current up to 1kHz

Figure 8. Spectrum of output line current at full load.

A spectral analysis of the current waveform is shown

in Figure 8 for frequencies up to 1kHz. The total

harmonic distortion level is found to be below 0.15%.

This is well within the allowable criteria for this

installation.

6. CONCLUSIONSThis simulation study has successfully been used to:

Develop control algorithms that deliver therequired levels of performance prior to the

actual construction of the converter hardware.

Even though high levels of detail have not beenprovided here, provided critical insights into the

sizing and ratings of key components such as

power devices, power inductors and capacitors.

Hardware prototypes are expected to available in the

last quarter of 2000. These will provide an interesting

opportunity to test the validity of the simulation

outcomes.

7. REFERENCES[1]. S.J.Chiang, K.T.Chang, C.Y.Yen, Residential

Photovoltaic Energy Storage System, IEEE

TIE, Vol 45, No 3, June, 1998, pp 385-394.

[2]. U.Herrmann, H.G.Langer,Low Cost DC to ACConverter for Photovoltaic Power Conversion

in Residential Applications, PESC93, 1993, pp

588-594.

[3]. Australian Guidelines for Grid Connection ofEnergy Systems via Inverters, ESAA, 1998.

[4]. IEEE P929/D11,Draft Recommended Practicefor Utility Interface of Photovoltaic (PV)

Systems, IEEE, November, 1999.

[5]. K.Masoud, G.Ledwich, Grid Connectionwithout Mains Frequency Transformers, JEEA,

Australia, Vol 19, No 1, June, 1999, pp 31-36.

[6]. S.Pang, Digital Signal Processor Basedcontroller for an AC traction Drive System,

Master of Engineering Thesis, CQU, 1995.

[7]. G.A.Smith,P.A.Onions,D.G.Infield, PredictingIslanding Operation of Grid Connected PV

Inverters, IEE Proceedings on Electric Power

Applications, Vol 147, No 1, Jan, 2000, pp 1-6.

[8]. P.Midya, P.T.Krein, R.J.Turnbull, R.Reppa,J.Kimball, Dynamic Maximum Power PointTracker for Photovoltaic Applications, PESC,

1996, pp 1710-1716.

[9]. C.Hua, J.Lin, C.Shen, Implementation of aDSP-Controlled Photovoltaic System with

Peak Power Tracking, IEEE TIE, Vol 45, N0

1, Feb, 1998, pp 99-107.

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