Software / Hardware Co-Software / Hardware Co-Design of a JPEG Design of a JPEG

EncoderEncoder

Team Members:Team Members:Joe SalemiJoe Salemi

Brandon SternerBrandon Sterner

What is Software/Hardware What is Software/Hardware Co-Design?Co-Design?

Using software and hardware in Using software and hardware in parallel to execute a given parallel to execute a given application, with the goal of application, with the goal of increasing overall performance.increasing overall performance.

SW/HW co-design may effectively be SW/HW co-design may effectively be applied to any application that is applied to any application that is both computationally intensive and both computationally intensive and can be partitioned into separate can be partitioned into separate units.units.

Baseline DCT-JPEG Encoding Baseline DCT-JPEG Encoding AlgorithmAlgorithm

JPEG Encoding involves using DCT (Discrete JPEG Encoding involves using DCT (Discrete Cosign Transforms) operations, which can Cosign Transforms) operations, which can involve roughly 300 floating point operations involve roughly 300 floating point operations each. Encoding a JPEG file usually involves each. Encoding a JPEG file usually involves thousands of DCT operations.thousands of DCT operations.

Our hypothesis is that if we were to partition Our hypothesis is that if we were to partition the DCT operations out and execute them with the DCT operations out and execute them with FPGA’s working in parallel with a PC, FPGA’s working in parallel with a PC, application performance would be greatly application performance would be greatly increased.increased.

Baseline DCT-Baseline DCT-JPEG JPEG Encoding AlgorithmEncoding Algorithm

Initial image file is a PPM (Portable Pixel Map). This format was Initial image file is a PPM (Portable Pixel Map). This format was chosen because the data is stored as integer RGB values.chosen because the data is stored as integer RGB values.

Separate image into three color planes, RGB.Separate image into three color planes, RGB. Convert the color planes to the YIQ color space, which takes Convert the color planes to the YIQ color space, which takes

better into consideration some known facts about the human better into consideration some known facts about the human vision.vision.

Each color plane subdivides into sub regions of 8 x 8 pixels each.Each color plane subdivides into sub regions of 8 x 8 pixels each. A two dimensional discrete cosine transform (DCT2) is then A two dimensional discrete cosine transform (DCT2) is then

applied to each 8 x 8 sub region separately. The matrices are applied to each 8 x 8 sub region separately. The matrices are now in the frequency domain. Since the transformation matrix is now in the frequency domain. Since the transformation matrix is band-limited, only 8 x 8 = 64 frequency components are included band-limited, only 8 x 8 = 64 frequency components are included in the result. in the result.

Each 8x8 matrix is then scaled by an 8 x 8 matrix Q (known as Each 8x8 matrix is then scaled by an 8 x 8 matrix Q (known as the quantization matrix), which is determined by empirical the quantization matrix), which is determined by empirical studies of human visual perception. Since the human eye is more studies of human visual perception. Since the human eye is more perceptive to lower frequencies than to higher frequencies, the perceptive to lower frequencies than to higher frequencies, the idea is to scale the amplitude of each frequency by a quantization idea is to scale the amplitude of each frequency by a quantization factor to eliminate the higher frequencies. factor to eliminate the higher frequencies.

Each sequence is then encoded using Huffman compression. Each sequence is then encoded using Huffman compression.

Baseline DCT-JPEG Encoding Baseline DCT-JPEG Encoding AlgorithmAlgorithm

EquipmentEquipment Purple BoxPurple Box

A small purple 486 computer running at 100MHzA small purple 486 computer running at 100MHz Digilent Digilab 2 development board Digilent Digilab 2 development board

Xilinx Spartan 2 XC2S200 FPGAXilinx Spartan 2 XC2S200 FPGA 200,000 gate FPGA, 143 user IO pins200,000 gate FPGA, 143 user IO pins

Digilent DIO ModuleDigilent DIO Module Switches, Push Buttons, LEDs, Seven Segment Switches, Push Buttons, LEDs, Seven Segment

Displays, etc.Displays, etc. Digilent Memory ModuleDigilent Memory Module

Two 512KB SRAM banksTwo 512KB SRAM banks Development PC with Tornado for Development PC with Tornado for

monitoring the timing of the system.monitoring the timing of the system.

Diamond Prometheus Diamond Prometheus Development Kit Development Kit

Digilent Digilab 2Digilent Digilab 2

Digilent Memory Module Digilent Memory Module and DIO Boardand DIO Board

Block Diagram of SystemBlock Diagram of System

Communication:

Communication between PC and Communication between PC and “Purple Box” is over the RIT network.“Purple Box” is over the RIT network.

“ “Purple Box” is connected to the FPGA Purple Box” is connected to the FPGA via a LPT1via a LPT1

SRAM module is connected to D2 SRAM module is connected to D2 expansion slot expansion slot

User InterfaceUser Interface Command Line InterfaceCommand Line Interface

Used for startingUsed for starting Displaying timing dataDisplaying timing data Displaying ErrorsDisplaying Errors

Status Lights (FPGA)Status Lights (FPGA) IdleIdle ComputingComputing Memory TransfersMemory Transfers

Image Viewing - UncertainImage Viewing - Uncertain Would prefer to send resulting JPEG file back to the development Would prefer to send resulting JPEG file back to the development

PC. This depends on whether SE security policy will allow us to PC. This depends on whether SE security policy will allow us to do this.do this.

Alternative would be to display the image directly from the purple Alternative would be to display the image directly from the purple box. This depends on whether the difficulties can be resolved in box. This depends on whether the difficulties can be resolved in downloading the new version of VxWorks onto the “purple box”.downloading the new version of VxWorks onto the “purple box”.

Progress/TimelineProgress/Timeline

PurpleBox File System Testing PurpleBox File System Testing DoneDone

PurpleBox Parallel Port TestingPurpleBox Parallel Port Testing Done Done

Software ImplementationSoftware Implementation In In ProgressProgress

Hardware ImplementationHardware Implementation In In ProgressProgress

Testing and Analysis of ResultsTesting and Analysis of Results

Hardware CostsHardware Costs

DescriptionDescription CostCost

Dell PCDell PC $1500$1500

““Purple Box”Purple Box” $800$800

Digilab 2 FPGA boardDigilab 2 FPGA board $99.95$99.95

Digilent Memory Digilent Memory ModuleModule

$48.95$48.95

Digilent DIO ModuleDigilent DIO Module $79.00$79.00

TOTALTOTAL $2527.90$2527.90

Software Software

WindRiver VxWorksWindRiver VxWorks WindRiver TornadoWindRiver Tornado Xilinx ISE 6.0Xilinx ISE 6.0 MatlabMatlab

DifficultiesDifficulties

File IOFile IO By default, redirected to FTPBy default, redirected to FTP Remember to close filesRemember to close files

Purple box crashingPurple box crashing Unexplainable crashesUnexplainable crashes

SE security policySE security policy Can’t write to C driveCan’t write to C drive FTP policyFTP policy

QuestionsQuestions

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