Soft Ware Defined Radio working

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8900 Marybank DrAustin, TX [email protected]

A Software-Defined Radio

for the Masses, Part 1

By Gerald Youngblood, AC5OG

This series describes a complete PC - based, software - defined

radio that uses a sound card and an innovative detector

circuit. Mathematics is minimized in the explanation. Come see how it ’s done.

A certain convergence occurswhen multiple technologiesalign in time to make possiblethose things that once were onlydreamed. The explosive growth of theInternet starting in 1994 was one ofthose events. While the Internet had

existed for many years in governmentand education prior to that, its popu-larity had never crossed over into thegeneral populace because of its slowspeed and arcane interface. The devel-opment of the Web browser, therapidly accelerating power and avail-ability of the PC, and the availabilityof inexpensive and increasingly

speedy modems brought about theInternet convergence. Suddenly, it allcame together so that the Internet andthe worldwide Web joined the every-day lexicon of our society.

A similar convergence is occurringin radio communications through digi-

tal signal processing (DSP) software toperform most radio functions at per-formance levels previously consideredunattainable. DSP has now beenincorporated into much of the ama-teur radio gear on the market to de-liver improved noise-reduction anddigital-filtering performance. Morerecently, there has been a lot of discus-sion about the emergence of so-calledsoftware-defined radios (SDRs).

A software-defined radio is charac-terized by its flexibility: Simply modi-fying or replacing software programs

can completely change its functional-ity. This allows easy upgrade to newmodes and improved performancewithout the need to replace hardware.SDRs can also be easily modified toaccommodate the operating needs ofindividual applications. There is a dis-

tinct difference between a radio thatinternally uses software for some of itsfunctions and a radio that can be com-pletely redefined in the field throughmodification of software. The latter isa software-defined radio.

This SDR convergence is occurringbecause of advances in software andsilicon that allow digital processing ofradio-frequency signals. Many ofthese designs incorporate mathemati-cal functions into hardware to performall of the digitization, frequency selec-tion, and down-conversion to base-

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band. Such systems can be quite com-plex and somewhat out of reach tomost amateurs.

One problem has been that unlessyou are a math wizard and proficientin programming C++ or assembly lan-guage, you are out of luck. Each can besomewhat daunting to the amateur aswell as to many professionals. Twoyears ago, I set out to attack this chal-lenge armed with a fascination fortechnology and a 25-year-old, virtu-ally unused electrical engineering de-gree. I had studied most of the math incollege and even some of the signalprocessing theory, but 25 years is along time. I found that it really was achallenge to learn many of the disci-plines required because much of theliterature was written from a math-ematician’s perspective.

Now that I am beginning to graspmany of the concepts involved in soft-ware radios, I want to share with the

Amateur Radio community what Ihave learned without using muchmore than simple mathematical con-cepts. Further, a software radioshould have as little hardware as pos-sible. If you have a PC with a soundcard, you already have most of therequired hardware. With as few asthree integrated circuits you can be upand running with a Tayloe detector—an innovative, yet simple, direct-con-

version receiver. With less than adozen chips, you can build a trans-ceiver that will outperform much ofthe commercial gear on the market.

Approach the Theory In this article series, I have chosen to

focus on practical implementationrather than on detailed theory. Thereare basic facts that must be understoodto build a software radio. However,much like working with integrated cir-cuits, you don’t have to know how tocreate the IC in order to use it in a de-sign. The convention I have chosen is todescribe practical applications fol-lowed by references where appropriatefor more detailed study. One of theeasier to comprehend references I havefound is The Scientist and Engineer’s Guide to Digital Signal Processing bySteven W. Smith. It is free for downloadover the Internet at www.DSPGuide. com . I consider it required reading forthose who want to dig deeper intoimplementation as well as theory. I willrefer to it as the “DSP Guide” manytimes in this article series for furtherstudy.

So get out your four-function calcu-lator (okay, maybe you need six or

seven functions) and let’s get started.But first, let’s set forth the objectivesof the complete SDR design:

Keep the math simple• Use a sound-card equipped PC to pro-

vide all signal-processing functions• Program the user interface and all

signal-processing algorithms inVisual Basic for easy developmentand maintenance

• Utilize the Intel Signal ProcessingLibrary for core DSP routines tominimize the technical knowledgerequirement and development time,and to maximize performance

• Integrate a direct conversion (D-C)receiver for hardware design sim-plicity and wide dynamic range

• Incorporate direct digital synthesis(DDS) to allow flexible frequencycontrol

• Include transmit capabilities usingsimilar techniques as those used inthe D-C receiver.

Analog and Digital Signals in the Time Domain

To understand DSP we first need tounderstand the relationship betweendigital signals and their analog coun-terparts. If we look at a 1-V (pk) sinewave on an analog oscilloscope, we seethat the signal makes a perfectlysmooth curve on the scope, no matterhow fast the sweep frequency. In fact,if it were possible to build a scope withan infinitely fast horizontal sweep, itwould still display a perfectly smoothcurve (really a straight line at thatpoint). As such, it is often called a con-tinuous-time signal since it is continu-ous in time. In other words, there arean infinite number of different volt-ages along the curve, as can be seen onthe analog oscilloscope trace.

On the other hand, if we were tomeasure the same sine wave with adigital voltmeter at a sampling rate offour times the frequency of the sinewave, starting at time equals zero, wewould read: 0 V at 0°, 1 V at 90°, 0 V at180° and –1 V at 270° over one com-plete cycle. The signal could continueperpetually, and we would still readthose same four voltages over andagain, forever. We have measured the

voltage of the signal at discrete mo-ments in time. The resulting voltage-measurement sequence is thereforecalled a discrete-time signal .

If we save each discrete-time signal voltage in a computer memory and weknow the frequency at which wesampled the signal, we have a discrete- time sampled signal . This is what ananalog-to-digital converter (ADC)

does. It uses a sampling clock to mea-sure discrete samples of an incominganalog signal at precise times, and itproduces a digital representation ofthe input sample voltage.

In 1933, Harry Nyquist discoveredthat to accurately recover all the com-ponents of a periodic waveform, it isnecessary to use a sampling frequencyof at least twice the bandwidth of thesignal being measured. That mini-mum sampling frequency is called the

Nyquist criterion . This may be ex-pressed as:

bws 2 f f ≥ (Eq 1)

where f s is the sampling rate and f bw isthe bandwidth. See? The math isn’t sobad, is it?

Now as an example of the Nyquistcriterion, let’s consider human hear-ing, which typically ranges from 20 Hzto 20 kHz. To recreate this frequency

response, a CD player must sample ata frequency of at least 40 kHz. As wewill soon learn, the maximum fre-quency component must be limited to20 kHz through low-pass filtering toprevent distortion caused by false im-ages of the signal. To ease filter re-quirements, therefore, CD players usea standard sampling rate of 44,100 Hz.

All modern PC sound cards supportthat sampling rate.

What happens if the sampled band-width is greater than half the samplingrate and is not limited by a low-pass

filter? Analias of the signal is producedthat appears in the output along with

the original signal. Aliases can causedistortion, beat notes and unwantedspurious images. Fortunately, aliasfrequencies can be precisely predictedand prevented with proper low-pass orband-pass filters, which are often re-ferred to as anti-aliasing filters, asshown in Fig 1. There are even caseswhere the alias frequency can be usedto advantage; that will be discussedlater in the article.

This is the point where most texts

on DSP go into great detail about whatsampled signals look like above theNyquist frequency. Since the goal ofthis article is practical implementa-tion, I refer you to Chapter 3 of theDSP Guide for a more in-depth discus-sion of sampling, aliases, A-to-D and

Fig 1—A/D conversion with antialiasing low-pass filter.

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D-to-A conversion. Also refer to Doug Smith’s article, “Sig-nals, Samples, and Stuff: A DSP Tutorial.” 1

What you need to know for now is that if we adhere to theNyquist criterion in Eq 1 , we can accurately sample, pro-cess and recreate virtually any desired waveform. Thesampled signal will consist of a series of numbers in com-puter memory measured at time intervals equal to thesampling rate. Since we now know the amplitude of thesignal at discrete time intervals, we can process the digi-tized signal in software with a precision and flexibility notpossible with analog circuits.

From RF to a PC’s Sound Card Our objective is to convert a modulated radio-frequency

signal from the frequency domain to the time domain forsoftware processing. In the frequency domain, we measureamplitude versus frequency (as with a spectrum analyzer);in the time domain, we measure amplitude versus time (aswith an oscilloscope).

In this application, we choose to use a standard 16-bit PCsound card that has a maximum sampling rate of44,100 Hz. According to Eq 1 , this means that the maxi-mum-bandwidth signal we can accommodate is 22,050 Hz.With quadrature sampling, discussed later, this can actu-ally be extended to 44 kHz. Most sound cards have built-inantialiasing filters that cut off sharply at around 20 kHz.(For a couple hundred dollars more, PC sound cards arenow available that support 24 bits at a 96-kHz samplingrate with up to 105 dB of dynamic range.)

Most commercial and amateur DSP designs use dedicatedDSPs that sample intermediate frequencies (IFs) of 40 kHzor above. They use traditional analog superheterodyne tech-niques for down-conversion and filtering. With the advent of very-high-speed and wide-bandwidth ADCs, it is now pos-sible to directly sample signals up through the entire HFrange and even into the low VHF range. For example, the Analog Devices AD9430 A/D converter is specified withsample rates up to 210 Msps at 12 bits of resolution and a700-MHz bandwidth. That 700 -MHz bandwidth can be usedin under-sampling applications, a topic that is beyond thescope of this article series.

The goal of my project is to build a PC-based software-defined radio that uses as little external hardware as pos-sible while maximizing dynamic range and flexibility. Todo so, we will need to convert the RF signal to audio fre-quencies in a way that allows removal of the unwantedmixing products or images caused by the down-conversionprocess. The simplest way to accomplish this while main-taining wide dynamic range is to use D-C techniques totranslate the modulated RF signal directly to baseband.

We can mix the signal with an oscillator tuned to the RFcarrier frequency to translate the bandwidth-limited sig-nal to a 0-Hz IF as shown in Fig 2.

The example in the figure shows a 14.001-MHz carriersignal mixed with a 14.000 -MHz local oscillator to translatethe carrier to 1 kHz. If the low-pass filter had a cutoff of1.5 kHz, any signal between 14.000 MHz and 14.0015 MHzwould be within the passband of the direct-conversion re-ceiver. The problem with this simple approach is that wewould also simultaneously receive all signals between13.9985 MHz and 14.000 MHz as unwanted images withinthe passband, as illustrated in Fig 3. Why is that?

Most amateurs are familiar with the concept of sum anddifference frequencies that result from mixing two signals.When a carrier frequency, f c, is mixed with a local oscilla-tor, f lo, they combine in the general form:

[ ])()(2

1loclocloc f f f f f f −++=

MHz001.0MHz000.14MHz001.14

MHz001.28MHz000.14MHz001.14

loc

loc

=−=−

=+=+

f f

f f

MHz001.0MHz000.14MHz001.14loc −=+−=+− f f

(Eq 2)

When we use the direct-conversion mixer shown in Fig 2,we will receive these primary output signals:

Note that we also receive the image frequency that “foldsover” the primary output signals:

A low-pass filter easily removes the 28.001-MHz sum frequency , but the –0.001-MHz difference-frequency imagewill remain in the output. This unwanted image is thelower sideband with respect to the 14.000-MHz carrier fre-quency. This would not be a problem if there were no sig-nals below 14.000 MHz to interfere. As previously stated,all undesired signals between 13.9985 and 14.000 MHz willtranslate into the passband along with the desired signals

above 14.000 MHz. The image also results in increasednoise in the output.So how can we remove the image-frequency signals? It

can be accomplished through quadrature mixing . Phasingor quadrature transmitters and receivers—also calledWeaver-method or image-rejection mixers—have existedsince the early days of single sideband. In fact, my firstSSB transmitter was a used Central Electronics 20A ex-citer that incorporated a phasing design. Phasing systemslost favor in the early 1960s with the advent of relativelyinexpensive, high-performance filters.

To achieve good opposite-sideband or image suppression,phasing systems require a precise balance of amplitude andphase between two samples of the signal that are 90° out1Notes appear on page 21 .

Fig 2—A direct-conversion real mixer with a 1.5-kHz low-pass filter.

Fig 3—Output spectrum of a real mixer illustrating the sum, difference and image frequencies.


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of phase or in quadrature with eachother—“orthogonal” is the term usedin some texts. Until the advent of digi-tal signal processing, it was difficultto realize the level of image rejectionperformance required of modern radiosystems in phasing designs. Sincedigital signal processing allows pre-cise numerical control of phase andamplitude, quadrature modulationand demodulation are the preferredmethods. Such signals in quadratureallow virtually any modulationmethod to be implemented in softwareusing DSP techniques.

Give Me I and Q and I Can Demodulate Anything

First, consider the direct-conversionmixer shown inFig 2. When the RF sig-nal is converted to baseband audio us-ing a single channel, we can visualizethe output as varying in amplitudealong a single axis as illustrated inFig 4. We will refer to this as thein-

phase or I signal. Notice that its magni-tude varies from a positive value to anegative value at the frequency of themodulating signal. If we use a diode torectify the signal, we would have cre-ated a simple envelope or AM detector.

Remember that in AM envelope de-tection, both modulation sidebandscarry information energy and both aredesired at the output. Only amplitudeinformation is required to fully de-modulate the original signal. Theproblem is that most other modulationtechniques require that the phase ofthe signal be known. This is wherequadrature detection comes in. If wedelay a copy of the RF carrier by 90° toform a quadrature ( Q) signal, we canthen use it in conjunction with theoriginal in-phase signal and the mathwe learned in middle school to deter-mine the instantaneous phase andamplitude of the original signal.

Fig 5 illustrates an RF carrier withthe level of the I signal plotted on thex-axis and that of the Q signal plottedon the y-axis of a plane. This is oftenreferred to in the literature as a

phasor diagram in the complex plane .We are now able to extrapolate the twosignals to draw an arrow or phasorthat represents the instantaneousmagnitude and phase of the originalsignal.

Okay, here is where you will have touse a couple of those extra functionson the calculator. To compute themagnitude m t or envelope of the sig-nal, we use the geometry of right tri-angles. In a right triangle, the squareof the hypotenuse is equal to the sum

Fig 4—An in-phase signal ( I ) on the real plane. The magnitude, m (t), is easily measured as the instantaneous peak voltage, but no phase information is available from in-phase detection. This is the way an AM envelope detector works.

Fig 6—Quadrature sampling mixer: The RF carrier, f c, is fed to parallel mixers. The local oscillator (Sine) is fed to the lower-channel mixer directly and is delayed by 90° (Cosine) to feed the upper-channel mixer. The low-pass filters provide antialias filtering before analog-to-digital conversion. The upper channel provides the in-phase ( I (t)) signal and the lower channel provides the quadrature ( Q (t)) signal. In the PC SDR the low-pass filters and A/D converters are integrated on the PC sound card.

Fig 5—I + j Q are shown on the complex plane. The vector rotates counterclock- wise at a rate of 2 πππππ f c . The magnitude and phase of the rotating vector at any instant in time may be determined through Eqs 3 and 4.

of the squares of the other two sides—according to the Pythagorean theo-rem. Or restating, the hypotenuse asm t (magnitude with respect to time):

2t

2tt Q I m += (Eq 3)

The instantaneous phase of the sig-nal as measured counterclockwisefrom the positive I axis and may becomputed by the inverse tangent (orarctangent) as follows:

= −

t

t1t tan I

Qφ (Eq 4)

Therefore, if we measured the in-stantaneous values of I and Q, wewould know everything we needed toknow about the signal at a given mo-ment in time. This is true whether weare dealing with continuous analogsignals or discrete sampled signals.With I and Q, we can demodulate AMsignals directly using Eq 3 and FMsignals using Eq 4. To demodulateSSB takes one more step. Quadraturesignals can be used analytically to re-move the image frequencies and leaveonly the desired sideband.

The mathematical equations forquadrature signals are difficult butare very understandable with a littlestudy. 2 I highly recommend that youread the online article, “Quadrature

Signals: Complex, But Not Compli-cated,” by Richard Lyons. It can befound at www.dspguru.com/info/ tutor/quadsig.htm . The article de-

velops in a very logical manner howquadrature-sampling I / Q demodula-tion is accomplished. A basic under-standing of these concepts is essentialto designing software-defined radios.

We can take advantage of the ana-lytic capabilities of quadrature signalsthrough a quadrature mixer. To under-stand the basic concepts of quadraturemixing, refer to Fig 6, which illustratesa quadrature-sampling I / Q mixer.

First, the RF input signal is band-pass filtered and applied to the twoparallel mixer channels. By delayingthe local oscillator wave by 90°, we cangenerate a cosine wave that, in tandem,forms aquadrature oscillator . The RFcarrier, f c(t), is mixed with the respec-tive cosine and sine wave local oscilla-tors and is subsequently low-passfiltered to create the in-phase, I (t), andquadrature, Q(t), signals. The Q(t)

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channel is phase-shifted 90° relative tothe I (t) channel through mixing withthe sine local oscillator. The low-passfilter is designed for cutoff below theNyquist frequency to prevent aliasingin the A/D step. The A/D converts con-tinuous-time signals to discrete-timesampled signals. Now that we have the

I and Q samples in memory, we canperform the magic of digital signal pro-cessing.

Before we go further, let me reiter-ate that one of the problems with thismethod of down-conversion is that itcan be costly to get good opposite-side-band suppression with analog circuits.

Any variance in component values willcause phase or amplitude imbalancebetween two channels, resulting in acorresponding decrease in opposite-sideband suppression. With analogcircuits, it is difficult to achieve betterthan 40 dB of suppression withoutmuch higher cost. Fortunately, it isstraightforward to correct the analogimbalances in software.

Another significant drawback of di-rect-conversion receivers is that thenoise increases as the demodulated sig-nal approaches 0 Hz. Noise contribu-tions come from a number of sources,such as 1/ f noise from the semiconduc-tor devices themselves, 60-Hz and120-Hz line noise or hum, microphonicmechanical noise and local-oscillatorphase noise near the carrier frequency.This can limit sensitivity since mostpeople prefer their CW tones to be be-low 1 kHz. It turns out that most ofthe low-frequency noise rolls off above1 kHz. Since a sound card can processsignals all the way up to 20 kHz, whynot use some of that bandwidth to moveaway from the low frequency noise? ThePC SDR uses an 11.025-kHz, offsetbaseband IF to reduce the noise to amanageable level. By offsetting thelocal oscillator by 11.025 kHz, we cannow receive signals near the carrier

frequency without any of the low-frequency noise issues. This alsosignificantly reduces the effects of lo-cal-oscillator phase noise. Once wehave digitally captured the signal, it isa trivial software task to shift the de-modulated signal down to a0-Hz offset.

DSP in the Frequency Domain Every DSP text I have read thus far

concentrates on time-domain filteringand demodulation of SSB signals us-ing finite- impulse-response (FIR) fil-ters. Since these techniques have beenthoroughly discussed in the litera-ture 1, 3,3, 44 and are not currently used inmy PC SDR, they will not be coveredin this article series.

My PC SDR uses the power of the fast Fourier transform (FFT) to do al-most all of the heavy lifting in the fre-quency domain. Most DSP texts use alot of ink to derive the math so that onecan write the FFT code. Since Intel hasso helpfully provided the code in ex-ecutable form in their signal-process-ing library, 5 we don’t care how to writean FFT: We just need to know how touse it. Simply put, the FFT convertsthe complex I and Q discrete-time sig-nals into the frequency domain. TheFFT output can be thought of as alarge bank of very narrow band-passfilters, called bins , each one measur-ing the spectral energy within itsrespective bandwidth. The output re-sembles a comb filter wherein each binslightly overlaps its adjacent binsforming a scalloped curve, as shown inFig 7. When a signal is precisely at thecenter frequency of a bin, there will bea corresponding value only in that bin.

As the frequency is offset from thebin’s center, there will be a corre-sponding increase in the value of the

adjacent bin and a decrease in the value of the current bin. Mathemati-cal analysis fully describes the rela-tionship between FFT bins, 6 but suchis beyond the scope of this article.

Further, the FFT allows us to mea-sure both phase and amplitude of thesignal within each bin using Eqs 3 and4 above. The complex version allows usto measure positive and negative fre-quencies separately. Fig 8 illustratesthe output of a complex, or quadra-ture, FFT.

The bandwidth of each FFT bin maybe computed as shown in Eq 5, where

BW bin is the bandwidth of a single bin, f s is the sampling rate and N is the sizeof the FFT. The center frequency ofeach FFT bin may be determined byEq 6 where f center is the bin’s centerfrequency, n is the bin number, f s is thesampling rate and N is the size of theFFT. Bins zero through (N /2)–1 repre-sent upper-sideband frequencies andbins N /2 to N– 1 represent lower-side-band frequencies around the carrierfrequency.

N

f BW sbin = (Eq 5)

N

nf f scenter = (Eq 6)

If we assume the sampling rate ofthe sound card is 44.1 kHz and thenumber of FFT bins is 4096, then thebandwidth and center frequency ofeach bin would be:

andHz7666.104096

44100bin == BW

Hz7666.10center n f =

Fig 7—FFT output resembles a comb filter: Each bin of the FFT overlaps its adjacent bins just as in a comb filter. The 3-dB points overlap to provide linear output. The phase and magnitude of the signal in each bin is easily determined mathematically with Eqs 3 and 4.

Fig 8—Complex FFT output: The output of a complex FFT may be thought of as a series of band-pass filters aligned around the carrier frequency, f c, at bin 0. N represents the number of FFT bins. The upper sideband is located in bins 1 through (N /2)–1 and the lower sideband is located in bins N /2 to N –1. The center frequency and bandwidth of each bin may be calculated using Eqs 5 and 6.

What this all means is that thereceiver will have 4096, ~11-Hz-wide


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band-pass filters. We can thereforecreate band-pass filters from 11 Hz toapproximately 40 kHz in 11-Hz steps.

The PC SDR performs the followingfunctions in the frequency domain af-ter FFT conversion:• Brick-wall fixed and variable band-

pass filters• Frequency conversion• SSB/CW demodulation• Sideband selection• Frequency-domain noise subtraction• Frequency-selective squelch• Noise blanking• Graphic equalization (“tone control”)• Phase and amplitude balancing to

remove images• SSB generation• Future digital modes such as PSK31

and RTTYOnce the desired frequency-domain

processing is completed, it is simple toconvert the signal back to the time do-main by using an inverse FFT . In thePC SDR, only AGC and adaptive noisefiltering are currently performed in thetime domain. A simplified diagram ofthe PC SDR software architecture isprovided in Fig 9. These conceptswill be discussed in detail in a futurearticle.

Sampling RF Signals with the Tayloe Detector: A New Twist on an Old Problem

While searching the Internet forinformation on quadrature mixing, Iran across a most innovative and el-egant design by Dan Tayloe, N7VE.Dan, who works for Motorola, has de-

veloped and patented (US Patent#6,230,000) what has been called theTayloe detector. 7 The beauty of theTayloe detector is found in both itsdesign elegance and its exceptionalperformance. It resembles other con-cepts in design, but appears unique inits high performance with minimalcomponents. 8, 9 ,9 , 110 , 11 In its simplestform, you can build a complete quadra-ture down converter with only three orfour ICs (less the local oscillator) at acost of less than $10.

Fig 10 illustrates a single-balanced version of the Tayloe detector. It can be visualized as a four-position rotaryswitch revolving at a rate equal to thecarrier frequency. The 50-Ω antennaimpedance is connected to the rotor andeach of the four switch positions is con-nected to a sampling capacitor . Sincethe switch rotor is turning at exactlythe RF carrier frequency, each capaci-tor will track the carrier’s amplitudefor exactly one-quarter of the cycle andwill hold its value for the remainder of

Fig 9—SDR receiver software architecture: The I and Q signals are fed from the soundcard input directly to a 4096-bin complex FFT. Band-pass filter coefficients are precomputed and converted to the frequency domain using another FFT. The frequency- domain filter is then multiplied by the frequency-domain signal to provide brick-wall filtering. The filtered signal is then converted to the time domain using the inverse FFT. Adaptive noise and notch filtering and digital AGC follow in the time domain.

Fig 10—Tayloe detector: The switch rotates at the carrier frequency so that each capacitor samples the signal once each revolution. The 0° and 180° capacitors differentially sum to provide the in-phase ( I ) signal and the 90° and 270° capacitors sum to provide the quadrature ( Q ) signal.

Fig 11—Track and hold sampling circuit: Each of the four sampling capacitors in the Tayloe detector form an RC track-and-hold circuit. When the switch is on, the capacitor will charge to the average value of the carrier during its respective one- quarter cycle. During the remaining three- quarters cycle, it will hold its charge. The local-oscillator frequency is equal to the carrier frequency so that the output will be at baseband.

the cycle. The rotating switch willtherefore sample the signal at0°, 90°,180° and 270°, respectively.

As shown in Fig 11, the 50- Ω imped-ance of the antenna and the samplingcapacitors form an R-C low-pass filterduring the period when each respec-tive switch is turned on. Therefore,each sample represents the integral oraverage voltage of the signal during itsrespective one-quarter cycle. Whenthe switch is off, each sampling capaci-tor will hold its value until the nextrevolution. If the RF carrier and therotating frequency were exactly inphase, the output of each capacitorwill be a dc level equal to the average

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value of the sample.If we differentially sum outputs of

the 0° and 180° sampling capacitorswith an op amp (see Fig 10 ), the out-put would be a dc voltage equal to twotimes the value of the individuallysampled values when the switch rota-tion frequency equals the carrier fre-quency. Imagine, 6 dB of noise-freegain! The same would be true for the90° and 270° capacitors as well. The0°/180° summation forms the I chan-nel and the 90°/270° summation formsthe Q channel of the quadrature down-conversion.

As we shift the frequency of the car-rier away from the sampling fre-quency, the values of the invertingphases will no longer be dc levels. Theoutput frequency will vary accordingto the “beat” or difference frequencybetween the carrier and the switch-ro-tation frequency to provide an accu-rate representation of all the signal

components converted to baseband.Fig 12 provides the schematic for a

simple, single-balanced Tayloe detec-tor. It consists of a PI5V331, 1:4 FETdemultiplexer that switches the signalto each of the four sampling capaci-tors. The 74AC74 dual flip-flop is con-nected as a divide-by-four Johnsoncounter to provide the two-phase clockto the demultiplexer chip. The outputsof the sampling capacitors are differ-entially summed through the twoLT1115 ultra-low-noise op amps toform the I and Q outputs, respectively.Note that the impedance of theantenna forms the input resistance forthe op-amp gain as shown in Eq 7. Thisimpedance may vary significantlywith the actual antenna. I use instru-mentation amplifiers in my final de-sign to eliminate gain variance withantenna impedance. More informa-tion on the hardware design will beprovided in a future article.

Since the duty cycle of each switchis 25%, the effective resistance in theRC network is the antenna impedancemultiplied by four in the op-amp gainformula, as shown in Eq 7:

ant

f

4 R

RG =

(Eq 7)

For example, with a feedback resis-tance, R f , of 3.3 k Ω and antenna im-pedance, R ant , of 50 Ω , the resultinggain of the input stage is:

5.16504

3300=

×=G

Fig 12—Singly balanced Tayloe detector.

The Tayloe detector may also beanalyzed as a digital commutating fil-ter .12 , 1313 , 1, 14 This means that it operatesas a v ery-high- Q tracking filter, whereEq 8 determines the bandwidth and n is the number of sampling capacitors,


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R ant is the antenna impedance and Cs is the value of the individual samplingcapacitors. Eq 9 determines the Qdet of the filter, where f c is the center fre-quency and BW det is the bandwidth ofthe filter.

santdet

1

C nR BW

π = (Eq 8)

det

cdet BW

f Q = (Eq 9)

By example, if we assume the sam-pling capacitor to be 0.27 µF and theantenna impedance to be 50 Ω , then

BW and Q are computed as follows:

Hz5895)107.2)(50)(4)((

17det

=×

=−

π BW

23755895

10001.14 6det =

×=Q

Since the PC SDR uses an offsetbaseband IF, I have chosen to designthe detector’s bandwidth to be 40 kHzto allow low-frequency noise elimina-tion as discussed above.

The real payoff in the Tayloe detec-tor is its performance. It has beenstated that the ideal commutatingmixer has a minimum conversion loss(which equates to noise figure) of3.9 dB. 15 , 1616 Typical high-level diodemixers have a conversion loss of 6-7 dBand noise figures 1 dB higher than theloss. The Tayloe detector has less than

1 dB of conversion loss, remarkably.How can this be? The reason is that itis not really a mixer but a samplingdetector in the form of a quadraturetrack and hold. This means that thedesign adheres to discrete-time sam-pling theory, which, while similar tomixing, has its own unique character-istics. Because a track and hold actu-ally holds the signal value betweensamples, the signal output never goesto zero.

This is where aliasing can actuallybe used to our benefit. Since each

switch and capacitor in the Tayloedetector actually samples the RF sig-nal once each cycle, it will respond toalias frequencies as well as thosewithin the Nyquist frequency range.In a traditional direct-conversion re-ceiver, the local-oscillator frequency isset to the carrier frequency so that thedifference frequency, or IF, is at 0 Hzand the sum frequency is at two timesthe carrier frequency per Eq 2 . Wenormally remove the sum frequencythrough low-pass filtering, resultingin conversion loss and a corresponding

increase in noise figure. In the Tayloedetector, the sum frequency resides atthe first alias frequency as shown inFig 13. Remember that an alias is areal signal and will appear in the out-put as if it were a baseband signal.Therefore, the alias adds to the base-band signal for a theoretically loss-less detector. In real life, there is aslight loss due to the resistance of theswitch and aperture loss due to imper-fect switching times.

PC SDR Transceiver Hardware The Tayloe detector therefore pro-

vides a low-cost , high-performancemethod for both quadrature down-con-

version as well as up-conversion fortransmitting. For a complete system,we would need to provide analog AGCto prevent overload of the ADC inputsand a means of digital frequency con-trol. Fig 14 illustrates the hardware

architecture of the PC SDR receiver asit currently exists. The challenge hasbeen to build a low-noise analog chainthat matches the dynamic range of theTayloe detector to the dynamic rangeof the PC sound card. This will be cov-ered in a future article.

I am currently prototyping acomplete PC SDR transceiver, theSDR-1000, that will provide general-coverage receive from 100 kHz to54 MHz and will transmit on all hambands from 160 through 6 meters.

SDR Applications At the time of this writing, the typi-

cal entry-level PC now runs at a clockfrequency greater than 1 GHz andcosts only a few hundred dollars. Wenow have exceptional processingpower at our disposal to perform DSPtasks that were once only dreams. Thetransfer of knowledge from the aca-

Fig 13—Alias summing on Tayloe detector output: Since the Tayloe detector samples the signal the sum frequency ( f c + f s) and its image (– f c – f s) are located at the first alias frequency. The alias signals sum with the baseband signals to eliminate the mixing product loss associated with traditional mixers. In a typical mixer, the sum frequency energy is lost through filtering thereby increasing the noise figure of the device.

Fig 14—PC SDR receiver hardware architecture: After band-pass filtering the antenna is fed directly to the Tayloe detector, which in turn provides I and Q outputs at baseband. A DDS and a divide-by-four Johnson counter drive the Tayloe detector demultiplexer. The LT1115s offer ultra-low noise-differential summing and amplification prior to the wide- dynamic-range analog AGC circuit formed by the SSM2164 and AD8307 log amplifier.


9/9

Jul/Aug 2002 21

demic to the practical is the primarylimit of the availability of this technol-ogy to the Amateur Radio experi-menter. This article series attempts todemystify some of the fundamentalconcepts to encourage experimenta-tion within our community. The ARRLrecently formed a SDR Working Groupfor supporting this effort, as well.

The SDR mimics the analog world indigital data, which can be manipu-lated much more precisely. Analogradio has always been modeled math-ematically and can therefore be pro-cessed in a computer. This means that

virtually any modulation scheme maybe handled digitally with performancelevels difficult, or impossible, to attainwith analog circuits. Let’s considersome of the amateur applications forthe SDR:• Competition-grade HF transceivers• High-performance IF for microwave

bands• Multimode digital transceiver• EME and weak-signal work• Digital-voice modes• Dream it and code it

For Further Reading For more in-depth study of DSP

techniques, I highly recommend thatyou purchase the following texts inorder of their listing:

Understanding Digital Signal Pro-cessing by Richard G. Lyons (see Note6). This is one of the best-written text-books about DSP.

Digi tal Signal Processing Technol-ogy by Doug Smith (see Note 4). Thisnew book explains DSP theory andapplication from an Amateur Radioperspective.

Digi tal Signal Processing in Com-munications Systems by Marvin E.Frerking (see Note 3). This book re-lates DSP theory specifically to modu-lation and demodulation techniquesfor radio applications.

Acknowledgements I would like to thank those who have

assisted me in my journey to under-standing software radios. Dan Tayloe,N7VE, has always been helpful andresponsive in answering questionsabout the Tayloe detector. Doug Smith,KF6DX, and Leif Åsbrink, SM5BSZ,have been gracious to answer my ques-tions about DSP and receiver design onnumerous occasions. Most of all, I wantto thank my Saturday-morning break-fast review team: Mike Pendley,

WA5VTV; Ken Simmons, K5UHF; RickKirchhof, KD5ABM; and ChuckMcLeavy, WB5BMH. These guys putup with my questions every week andhave given me tremendous advice andfeedback all throughout the project. Ialso want to thank my wonderful wife, Virginia, who has been incredibly pa-tient with all the hours I have put in onthis project.

Where Do We Go From Here? Three future articles will describe

the construction and programming ofthe PC SDR. The next article in theseries will detail the software interfaceto the PC sound card. Integrating full-duplex sound with DirectX was one ofthe more challenging parts of theproject. The third article will describethe Visual Basic code and the use of theIntel Signal Processing Library forimplementing the key DSP algorithmsin radio communications. The finalarticle will describe the completedtransceiver hardware for the SDR-1000 .

11 D. H. van Graas, PA0DEN, “The FourthMethod: Generating and Detecting SSBSignals,” QEX , Sep 1990, pp 7-11. Thiscircuit is very similar to a Tayloe detector,but it has a lot of unnecessary compo-nents.

12 M. Kossor, WA2EBY, “A Digital Commu-tating Filter,” QEX, May/Jun 1999, pp 3-8.

13 C. Ping, BA1HAM, “An Improved SwitchedCapacitor Filter,” QEX, Sep/Oct 2000, pp41-45.

14P. Anderson, KC1HR, “Letters to the Edi-tor, A Digital Commutating Filter,” QEX, Jul/Aug 1999, pp 62.

15 D. Smith, KF6DX, “Notes on ‘Ideal’ Com-mutating Mixers,” QEX, Nov/Dec 1999,pp 52-54.

16 P. Chadwick, G3RZP, “Letters to the Editor,Notes on ‘Ideal’ Commutating Mixers” (Nov/Dec 1999), QEX, Mar/Apr 2 000 , pp 61-62.

Gerald became a ham in 1967 dur-ing high school, first as a Novice and then a General class as WA5RXV. He completed his Advanced class license and became KE5OH before finishing high school and received his First Class Radiotelephone license while working in the television broadcast industry during college. After 25 years of inactivity, Gerald returned to the ac-tive amateur ranks in 1997 when he completed the requirements for Extra class license and became AC5OG.

Gerald lives in Austin, Texas, and is currently CEO of Sixth Market Inc, a hedge fund that trades equities using artificial-intelligence software. Gerald

previously founded and ran five tech-nology companies spanning hardware, software and electronic manufacturing. Gerald holds a Bachelor of Science De-

gree in Electrical Engineering from Mississippi Stage University.

Gerald is a member of the ARRL SDR working Group and currently enjoys homebrew software-radio devel-opment, 6-meter DX and satellite op-

erations.

Notes 1D. Smith, KF6DX, “Signals, Samples and

Stuff: A DSP Tutorial (Part 1),” QEX, Mar/Apr 1998, pp 3-11.

2J. Bloom, KE3Z, “Negative Frequenciesand Complex Signals,” QEX , Sep 1994,pp 22-27.

3M. E. Frerking, Digital Signal Processing in Communication Systems (New York: VanNostrand Reinhold, 1994, ISBN:0442016166), pp 272-286.

4D. Smith, KF6DX, Digital Signal Processing Technology (Newington, Connecticut:ARRL, 2001), pp 5-1 through 5-38.

5The Intel Signal Processing Library is avail-able for download at developer.intel. com/software/products/perflib/spl/ .

6R. G. Lyons, Understanding Digital Signal Processing , (Reading, Massachusetts:Addison-Wesley, 1997), pp 49-146.

7D. Tayloe, N7VE, “Letters to the Editor,Notes on‘Ideal’ Commutating Mixers (Nov/Dec 1999),” QEX, March/April 2 00 1, p 61.

8P. Rice, VK3BHR, “SSB by the FourthMethod?” available at ironbark.bendigo. latrobe.edu.au/~rice/ssb/ssb.html .

9A. A. Abidi, “Direct-Conversion RadioTransceivers for Digital Communications,”IEEE Journal of Solid-State Circuits ,Vol 30, No 12, December 1995, pp 1399-1410, Also on the Web at www.icsl.ucla. edu/aagroup/PDF_files/dir-con.pdf

10 P. Y. Chan, A. Rofougaran, K.A. Ahmed,and A. A. Abidi, “A Highly Linear 1-GHzCMOS Downconversion Mixer.” Presentedat the European Solid State Circuits Con-ference, Seville, Spain, Sep 22-24, 1993,pp 210-213 of the conference proceed-ings. Also on the Web at www.icsl.ucla. edu/aagroup/PDF_files/mxr-93.pdf
http://developer.intel.com/software/products/perflib/spl/http://developer.intel.com/software/products/perflib/spl/http://developer.intel.com/software/products/perflib/spl/http://developer.intel.com/software/products/perflib/spl/http://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/mxr-93.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://www.icsl.ucla.edu/aagroup/PDF_files/dir-con.pdfhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://ironbark.bendigo.latrobe.edu.au/~rice/ssb/ssb.htmlhttp://developer.intel.com/software/products/perflib/spl/http://developer.intel.com/software/products/perflib/spl/

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