Sistema de Compresión Embebida De Audio & Video

8/4/2019 Sistema de Compresin Embebida De Audio & Video

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Design of Embedded Audio and Video Compression System

Yongqiang Zhang Bing ZhangEngineering College of Information and

Electrical

Engineering College of Information and

Electrical Hebei University of Engineering Hebei University of Engineering

HanDan, Hebei Province , China HanDan, Hebei Province , China [email protected] [email protected]

Abstract

In this paper, an ARM+GO7007SB structure is put

forward as the solution of embedded audio and video

compression system. This design proposal ischaracterized by high processing speed, low cost, goodimage quality and real-time implementation.

Combining with the forthcoming 3G technology, the

design could be applied to mobile video services, such

as mobile remote video surveillance system, with

bright market prospect.

1. Introduction

The technology of audio and video compression has

received great attention and been widely applied to

many areas such as video surveillance and digital

camera with the rapid development of computer,multimedia and data communication. Recently, rapid

development of 3G (3rd Generation) has diversified theaudio and video technologys colorful applications,

which require lower cost and shorter period with

researching and developing audio and video

compression system.

There are generally two solutions to realize audio

and video compression system: ARM (Advanced RISCMachines) +general-purposed DSP (Digital Signal

Processing) and ARM+video processing chip [6].

Because of high cost and great difficulties of the DSP

solution, we choose to implement the second solution,

which meets the requirements of low cost and short

researching and developing cycle.

2. Design of the system structure

In this design proposal, most of the main chips are

connected through I2C bus. So that, it is convenient for

the communications among the main chips, for

example, ARM processor can directly control the video

input processor SAA7113H. Meanwhile, it makes thesystem be easily upgraded, for instance, expanding

memory and updating chip.

SAA7113H converts the captured composite video

signal to ITU656 format and transmits it toGO7007SB. MSM7716 converts the audio signal

captured from microphone to PCM (Pulse Code

Modulation) format and transmits it to GO7007SB.

Then GO7007SB compresses the audio and videosignals and transmits them to ARM microprocessor

S3C2410 through the HPI (Host Parallel Interface)

interface. The block diagram of system is shown in

figure 1.

Figure 1. Block diagram of system

3. Modular design of audio and video

compression

GO7007SB is a monolithic multi-format video

compression chip, which uses multiple algorithms tobuffer and compress raw video data into video streams.

The output video stream can be MPEG-1, MPEG-2,

MPEG-4, or H.263 format.The video streams are

output through either a Host Parallel Interface (HPI) or

a Universal Serial Bus (USB) interface. The

GO7007SB is capable of delivering streaming video up

to full-D1 resolution at a full-motion frame rate.Its

Workshop on Intelligent Information Technology Application

0-7695-3063-X/07 $25.00 2007 IEEE

DOI 10.1109/IITA.2007.93

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maximum videoinput size are: 720 x 480 @ 30 frames

per second (fps) or 720 x 240 @ 60 fps (interlaced) of

NTSC, 720 x 576 @ 25 fps or 720 x 288 @ 50 fps

(interlaced) of PAL. It is ideal for a wide range ofencoding applications, from DVRs/PVRs to PC/Web

cameras [3].

The clock scheme is configured for internal PLLmode with the MPLL_BP and UPLL_BP pins both set

to low. And the main clock is generated through an on-

chip oscillator and a PLL. The MCLK frequency is

96MHz. In this case, an external R-C-Crystal tank is

required between the MXI and the MXO, just as shownin figure 2.

Figure 2. External R-C-Crystal tank

MT48LC2M32B2, which is 64Mb SDRAM

(512K324 backs), is used as an external data buffer.When compressed videl data is available, the

Go7007SB uses half of the capacity of

MT48LC2M32B2 to buffer output video data. To

improve SDRAM timing, the GO7007SB provides

clock signals for the SDRAM chip in addition to

SDRAM signals [4]. This clock is designated as

SDRAM_CLK, which drives the SDRAM device and

provides feedback to the SDRAM_CLK_LB pin.During a read cycle, the feedback clock latches the

SDRAM data, then, which can meet the 96 MHz set-up

time without a complicated PCB layout design. TheSDRAM Clock Scheme is shown in figure 3.

Figure 3. SDRAM clock scheme2Kbit EEPROM is used to store boot-up settings for

the device, which is accessed through the I2C

controller. So customers can store customized

descriptor IDs, interface and/or endpoint settings on-chip. It also makes customized internal register

settings, boot code or even self-loading firmware

possible.

The audio interface works in master mode, a simpleclock generator is used to generate a sampling rate with

reference master clock 24.576 MHz through MXAUD

pin, by which the bit clock and sync signal could be

generated.

The video streams are designed to output through

either HPI which is an Intel-style 8 or 16-bit interface

with interrupt support or USB interface. The major

difference between the HPI and USB interfaces is thatthe HPI interface provides debug capability and the

USB interface does not. Because the USB and the HPI

interfaces use the same data path, only one interfacecan be enabled at a time. The HPI interface is shown in

figure 4.

Figure 4. HPI Interface

As shown in Fig.4, the signals on the left of the

illustration above represent connections to theS3C2410. And the on the wright is attached to the

internal control bus. It has control bus and data bus

connections, in addition to an interrupt request line.

Initialization, control data, and compressed streams

pass through the HPI interface. If an unrecoverable

error occurs, the XRISC (X Reduced Instruction Set

Computer) or microprocessor is able to freeze all

Front-End blocks and initiate debug mode. Theexternal host is then able to probe inside the

GO7007SB using the HPI debugging functionality.The HPI of Inter-style 16-bit interface which is set

by the boot-up EEPROM is designed to communicate

with the microprocessor. In this mode, AD [15:0] is

Address/Data bus, onto which the address and data are

multiplexed. ALE (Address Latch Enable), which is

connected to a GPIO pin of S3C2410, indicates anaddress transfer. The HPI latches a valid address at the

falling edge of the ALE signal that the GPIO pin gives.

A positive edge of WR# or RD# activates a write or

read operation, respectively.

The HPI interface is configured for Asynchronous

mode by suspending the HCLK and SYNC_HPI pins,

which is the default access mode.

4. Modular design of audio capture

The audio capture modular of this system can be

implemented by the audio capture chip MSM7716,

which is made by OKI Company.MSM7716 works inslave mode while GO7007SB works in master mode.

Data Bus(32-Bit)

Interrupt to

XRISC

ALE

WR#

RD#

INT

HCLK

SYNC_HPI

Control Bus

(16-Bit)

AD15AD0

HPI

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The audio data is input through MAIN pin, and its

internal, as well as external circuit is shown in figure 5.

Internally, MAIN is connected to the noninverting

input of the op-amp, while MAO is connected to theoutput of the op-amp.

Figure 5. Internal and external circuit of audio inputinterface

5. Modular design of video capture

The video capture modular of this system can be

implemented by the video capture chip SAA7113H,which is made by Philips Company. This chip, whichis programmable, mainly samples the analogy signals

and converts the analogy color video signals to digitalvideo signals conforming to ITU656 standard output

format. The video signals input from the front-end can

be PAL (Phase Alternate Line), NTSC (National

Television Standards Committee) or SECAM

(Sequential Couleur Avec Memoire). This chip notonly can implement fully programmable static gain or

automatic gain control for the input signals, but also

has a programmable control adjusting brightness,

contrast, and saturation (BCS) as well as the parameter

of captured digital image. On-chip clock generatorautomatically generates working frequency required by

the internal circuit given that an external 24.576MHz

crystal oscillator is provided. [1]. SAA7113H transmitsthe digital image data of ITU 656 YUV 4:2:2 format to

GO7007SB, under the control of I2C bus timing of

GO7007SB. When the I2C bus between GO7007SB

and SAA7113H is free, ARM microprocessor can set

the internal registers of SAA7113H via I2C bus. The

PDATA bus of GO7007SB is 10-bit parallel input

interface whose clock is provided by pixel clock

(PCLK). If the video source from SAA7113H is 8-bit,they should be connected to the 8 MSBs of the 10-bit

PDATA bus. In this case, the 2 LSBs can be connected

to either high or low level. The end of analogy videoinput is designed to provide composite video interface.

The data output from the SAA70013H is set to bestandard ITU 656 4:2: YUV format. And the data of

every pixel is signed by two continuous bytes.

6. Design of communication between ARM

and GO7007SB

S3C2410 communicates with GO7007SB through

HPI, which links the GO7007SB interface with the bus

control BUSC of ARM. S3C410 opens a window of

32K words in memory mapped of GO7007SB by HPI programming, and then accesses the memory of

GO7007SB. Both of them can access SDRAM so as to

share a mass of image data blocks effectively with eachother. S3C2410 and GO7007SB share the same data

structure, which is applied to ask for and ensure

commands, as well as data communication.

7. Design of software

The hierarchy and modules of the software of the

whole system is shown in figure. 6.

Figure 6. Hierarchy and modules of the softwareThe bottom of the software is the HPI Bus Interface

Driver. There are three Linux device styles: character

device, block device and network device. In this

system, the HPI interface is grouped in the characterdevice. So when the HPI interface is being initialized,

the driver begins to regist it on linux and adds a datastruct of device_struct to the vector table of character

device. The main device describer of HPI interface is

used as the index of the vector table. The development

of the interface functions of struct file_operations is themain work in HPI interface driver, because these

functions are the entrance functions that the applicationoperates the hardware device by the kernel of linux.

The OSL (Operating System Layer) indicates the

real-time operating systems VxWorks or embedded

Linux, Windows CE, etc, while the SAL (System

Abstraction Layer) means some setting and function

designed according to given ARM.The Decoder Driver is the initialization of video

decoder SAA7113H and audio decoder MSM7716.The API (Application Programming Interface) is the

interface function by which user can operate the

GO7007SB.The GO7007SB Encoder Driver includes video

encoder scheduler, bitrate control of encoder, start and

stop of encoder, etc.

The Multimedia Application Software is the process

of compressed video and audio data, such astransmitting, decoding or display.

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8. Conclusions

GO7007SB is used to realize the audio and video

compression superiorly in real-time implementation,low cost, good image quality and high processing

speed. This system can be applied to video

surveillance, digital camera and most of theforthcoming 3G mobile video services in China and

will have a broad market.

9. References

[1] SAA7113HH 9-bit Video Input Processor Datasheet.Philips Semiconductors, 1999.

[2] MSM7716 Single Rail Linear CODEC Datasheet. OKISemiconductor, 2004.

[3] GO7007SB MPEG Encoder Datasheet. WISTechnologies, 2003

[4] GO7007SB User Manual. WIS Technologies, 2003

[5] S3C2410X 32-Bit RISC Microprocessor User's Manual,Revision 1.2, 2003

[6] Sun Xiaoling, and Yi Chunbo, Design of EmbeddedWEB Camera Based on the GO7007SB, Journal of Sichuan

University (Natural Science Edition), Editorial Office of

Journal of Sichuan University, Chengdu, 2004.10, pp. 144-147.

[7] Kong Xianggang, and Chu Jing, Hardware Design ofImage Processing Platform Based on PCI Bus and DSPChip, Application of Electronic Technique, Editorial Officeof Application of Electronic Technique, Beijing, 2003, pp.70-73.

[8] Bai Xueli, Guo Gencheng, and Liu Xudong, MPEG-4Audio and Video Compression System Based on

GO7007SB, Control & Automation, Editorial Office ofControl & Automation, Beijing, 2006, pp. 255-257.

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Sistema de Compresión Embebida De Audio & Video