SigmaDelta ADC 4-1

© 2005 Texas Instruments Inc, Slide 1

Getting Precise with MSP430 Sigma-Delta ADC Peripherals

Vincent ChanMSP430 Business Development Manager

TI [email protected]


Agenda• Sigma-Delta basics & benefits• Understanding the SD16_A• Choosing an MSP430 integrated ADC• Lab exercise: Hands-on with the SD16_A


Sigma-Delta Basics

-+ ∫

1-bit DAC

∆∑

TIME

AMPLITUDE

0

1

Simple analog: 1-bit ADC• Integration (Σ) & difference (∆) stages

Complex digital: filter stage• Over sampled input• Decimation filtered output


Σ-∆ vs. Successive Approximation• Sigma-Delta typically higher resolution• 1’s ksps Σ-∆ vs. 100’s ksps SAR• Tolerance of analog step changes sample-to-sample

Inherent for SARStep changes at the input must cycle through the Σ-∆ filter stage

• Σ-∆ architecture ~90% digital: easier to integrate

SD16 Overview• ‘F42x & ‘FE42x• Multiple

channels• Single external

input per channel

• Up to 256 OSR• 1MHz fM

SD16 Control Block

fM

ACLKTACLK

011011

MCLKSMCLK

VREF

Divider

ReferenceTemperature sensor

1.2V

Ax.0 +-+-+-+-+-+-+-+-

Ax.1Ax.2Ax.3Ax.4Ax.5Ax.6

PGA 2nd OrderΣ∆ Mod

SD16PREx

SD16MEMx

Ax.7

Group/StartConversion Logic

Channel x



SD16_A Overview

ACLKTACLK

011011

MCLKSMCLK

VREF

Divider

A0 +-+-+-+-+-+-+-+-

A1A2A3A4A5A6

SD16MEM0

Reference

A7

fM

1.2V

Start ConversionLogic

Divider

BUF

A5Temp.sensor


• ‘F42x0 & ‘F20x3• Single channel• Multiple input pairs• Input buffer• AVCC measure• 30kHz to 1.1MHz• fM divider• Up to 1024 OSR


Conversion Modes• Single conversion

• Continuous conversion

Conversion

SD16SC Set in SW Auto-clear

Conversion

SD16SC

Conversion Conversion

Set in SW

Conv

Cleared in SW

= Result written to SD16MEMx

Clearing SD16SC immediately stops conversion: The value in SD16MEMx can change and should be read prior to halting conversion


SD16_A Input Design• Four external input pairs• Fully differential• Internal channels:

TemperatureAVCC / 11Offset shunt

• Selectable current vs. speed input buffer

• PGA: 1, 2, 4, 8, 16 & 32x

• SD16AEx bits for internal AIN- connection to AVSS

* Buffer not in ‘F20x3 devices

to SD16 Ax-

SD16AEx

AVSS01 from Ax- pin

to GPIO disable

Port Pin Control

A0 +-+-+-+-+-+-+-+-

A1A2A3A4A5A6A7

BUF

A5Temp.sensor


Input Channels

*


Analog Input RangeGAIN 1 2 32

0 V

+0.6V

-0.6V

+0.5V

-0.5V

• • •

-0.015V+0.015V

• What is VREF?• What is the PGA setting?

• Applies to all inputs & modes

PGA

refFSR GAIN

VV

2/=


Input Select vs. Channel Select• SD16_A: 1 channel, 4 external inputs per channel

MSP430F42x0 & MSP430F20x3

• SD16: 3 channels, 1 external input per channelMSP430FE42x & MSP430F42x

• Channels are independent & can operate in parallel• Inputs are multiplexed into each channel & must be

selected/sampled sequentially


Using Preload: Multi-Channel Only• Offsets decimation filter for # of fM clocks• Staggers conversion results channel-to-channel• Used to introduce phase delay in the conversion flow

for signal compensation• Example: electricity meter I & V phase compensation

Delayed Conversion

40SD16OSRx = 32

Start of ConversionTime

Conversion

32

Conversion

32fM cycles:

1st Sample Ch1

SD16PRE0 = 8

SD16PRE1 = 0 Conversion

32

Conversion

32

Conversion

32

Conversion

1st Sample Ch0(erroneous) 1st Sample Ch0

Input Step Response• Key for mux switching• Decimation filter must

cycle out the delta• SD16INTDLYx sets

automatic settling time to 1st conversion interrupt

• fM = 1.048MHz; OSR = 256fSAMPLE = 4096 ksps ->tSETTLE(MAX) ~ 732usec

1.

2.

3.

4.1

0

0.2

0.4

0.6

0.8

Asynchronous Step

Conversion



Internal Reference

AVCCVREF

Reference

SD16VMIDON

SD16REFON

1.2V

AVSS

1

0

InternalExternal

AVCCVREF

Reference

SD16VMIDON

SD16REFON

1.2V

AVSS

1

0

InternalOnly

• Internal 1.2V reference• 20ppm temperature coefficient• VREF Options:

External ref: SD16REFON = 0, SD16VMIDON = 0Internal ref: SD16REFON = 1, SD16VMIDON = 0Internal ref w/ buffered output: SD16REFON = 1, SD16VMIDON = 1

• For temperature (A6): use internal reference


Internal Reference Settling Time

• CVREF = 470nF• Ref buffer = +100x faster

reference settling• Disable once settled

SD16VMIDON = 0

SD16VMIDON = 1


Modulator Clock Selection• fM comparison using D4270:

(continuous conversion mode, reference buffer enabled)

ACLK = 32.768kHz, 256 OSR, SD16INTDLY_0• ~7.8ms/conversion• ~950uA: CPU in LPM3 (~1009uA: CPU in LPM0)

SMCLK = 1.048MHz, 256 OSR, SD16INTDLY_0• ~244us/conversion• ~1095uA: CPU in LPM0

~32x Faster Conversion @ ~15% Greater Current


Interrupt Vector Generator

0

015

0000000000

Source SD16IV ContentsNo interrupt pending 0SD16MEMx overflow 02hSD16CCTL0 IFG 04hReserved 06hReserved 08hReserved 0AhReserved 0ChReserved 0EhReserved 10h

0 x x x x

• One shared interrupt vector: SD16_A IFG & overflow• Fast decoding reduces code size/CPU load


SD16IV Handling With AssemblerSD16_ISR add &SD16IV,PC ; Offset to Jump table

reti ; SD16IV = 0, no int. jmp Over_ISR ; Overflow handler

CH1_ISR ; Handle channel 1 interrupt

Over_ISR ; Handle overflow interrupt

SD16_ISR add &SD16IV,PC ; Offset to Jump tablereti ; SD16IV = 0, no int. jmp Over_ISR ; Overflow handler

CH1_ISR ; Handle channel 1 interrupt

Over_ISR ; Handle overflow interrupt


SD16IV Handling With C// SD16_ISR#pragma vector=SD16_VECTOR__interrupt void SD16_ISR(void){

switch (__even_in_range(SD16IV, 16)){

case 2: Handle overflow;break;

case 4: Channel 1 IFG;break;

}}

// SD16_ISR#pragma vector=SD16_VECTOR__interrupt void SD16_ISR(void){

switch (__even_in_range(SD16IV, 16)){

case 2: Handle overflow;break;

case 4: Channel 1 IFG;break;

}}


Using “__even_in_range()”

versus


Selecting an MSP430 ADC

min max Ref IN Ref OUT Ref I_OUT

ADC10 8 34 200+ 10 57 Vss to Vref 1.4-3.6 1.5/2.5V +/-1mA SW/Timer/Cont N/A DTCADC12 12 34 200+ 12 68 Vss to Vref 1.4-3.6 1.5/2.5V +/-1mA SW/Timer/Cont N/A Conv Mem

SD16 3 ind 16 85 +/-600mV 1.0-1.5 1.2V +/-1mA SW/Cont to 32x PreloadSD16_A 4 mux'd ~0.03 ~5 16 85 +/-600mV 1.0-1.5 1.2V +/-1mA SW/Cont to 32x Buffered input

triggering gain features

~4

f SAM PLE (ksps) referencechannels res SINAD

(typ) A IN

• Voltage range to be measured?• Max frequency for AIN?• How much resolution?• Differential inputs?• Reference range?• Multiple channels?

Slope

Bits

10 100 1k 10k 100k 1M

SAR

Sigma-Delta

Samples per Second

8

12

16

20

24


Lab Exercise 1: Measuring Voltage• Configure SD16_A• Measure variable voltage• Convert to mV’s• Update LCD with result

each second


Lab 1 Software FlowSD16_A Configuration:• 1x Gain• Slow input buffer• Channel A1+/-• Internal VREF

• fM = ACLK, 256 OSR• Single conversion• 2’s complement

MainEnable Ref, Start Conv

Enter LPM3Calculate VoltageUpdate Display

WDT ISR (1sec)Exit LPM3 on wake

InitConfigure Peripherals

SD16 ISRHandle converison

result/offsetDisable Ref

Measure OffsetSingle sample A7+/-

Reconfigure for A1+/-


Lab 1 SD16_A Setup// Add SD16_A Configuration Here

SD16CTL = _____________________________;SD16CCTL0 |= ____________________________;

// Get internal offsetSD16INCTL0 = __________________________; SD16CCTL0 |= __________________________;while(!(SD16CCTL0 & ______));offset = SD16MEM0;

// Configure for external potentiometerSD16INCTL0 = __________________________;SD16CCTL0 = __________________________;

// Add SD16_A Configuration HereSD16CTL = _____________________________;SD16CCTL0 |= ____________________________;



• Add appropriate SD16_A configuration code• Configure for single conversion from A7• Start conversion & poll IFG• Reconfigure for single conversions from A1


Lab 1 SD16_A Main// Mainwhile (1)

{SD16CTL |= _______________________;SD16CCTL0 |= _______;

_BIS_SR(LPM3_bits + GIE);

Disp_Value(2, (float)result * MV_PER_LSB);}

// Mainwhile (1)

{SD16CTL |= _______________________;SD16CCTL0 |= _______;



• Enable internal reference• Start a conversion


Lab 1 SD16_A ISR// Add SD16_A ISR Here#pragma vector=SD16_VECTOR__interrupt void SD16_isr(void){

switch (__even_in_range(SD16IV, 4)){case 2:

break; case 4:

result = _________________; SD16CTL &= ~(____________________);break;

}}

// Add SD16_A ISR Here#pragma vector=SD16_VECTOR__interrupt void SD16_isr(void){


break; case 4:

result = _________________; SD16CTL &= ~(____________________);break;

}}

• Get conversion and subtract measured offset• Turn off internal reference


Lab Exercise 2: Measuring Pressure• Configure SD16_A• Measure pressure sensor• Convert to mbar• Update LCD with result

each second

air pressure


Lab 2 Software FlowSD16_A Configuration:• 32x Gain• Medium input buffer• Channel A0+/-• External VREF

• fM = MCLK, 1024 OSR• Continuous conversion• 2’s complement

MainEnter LPM0

Calculate PressureUpdate Display

WDT ISR (1sec)Exit LPM0 on wake

InitConfigure Peripherals

SD16 ISRHandle converison

result/offset

Measure OffsetSingle sample A7+/-

Reconfigure for A0+/-(continuous)


Lab 2 SD16_A Setup// Add SD16_A Configuration Here

SD16CTL = _____________________________;SD16CCTL0 |= ____________________________;



// Add SD16_A Configuration HereSD16CTL = _____________________________;SD16CCTL0 |= ____________________________;



• Add appropriate SD16_A configuration code• Configure for single conversion from A7• Start conversion & poll IFG• Reconfigure for continuous conversions from A0


SD16_A: 1000 And 1 Uses• 16-bits with flexible input architecture• Take into account reference settling• SD16INTDLYx: Is it long enough?• Match buffer settings for optimum

power/performance• Understand fM, OSR & sampling rate relationship

Match the ADC with the application requirementsNot just a matter of resolution!


Lab 1 SD16_A Setup Solution// Add SD16_A Configuration Here

SD16CTL = SD16VMIDON+SD16REFON+SD16SSEL1;SD16CCTL0 |= SD16BUF_1+SD16DF+SD16SNGL;

// Get internal offsetSD16INCTL0 = SD16INCH_7; SD16CCTL0 |= SD16SC;while(!(SD16CCTL0 & SD16IFG));offset = SD16MEM0;

// Configure for external potentiometerSD16INCTL0 = SD16INCH_1;SD16CCTL0 = SD16BUF_1+SD16DF+SD16SNGL+SD16IE;

// Add SD16_A Configuration HereSD16CTL = SD16VMIDON+SD16REFON+SD16SSEL1;SD16CCTL0 |= SD16BUF_1+SD16DF+SD16SNGL;

// Get internal offsetSD16INCTL0 = SD16INCH_7; SD16CCTL0 |= SD16SC;while(!(SD16CCTL0 & SD16IFG));offset = SD16MEM0;

// Configure for external potentiometerSD16INCTL0 = SD16INCH_1;SD16CCTL0 = SD16BUF_1+SD16DF+SD16SNGL+SD16IE;


Lab 1 SD16_A Main Solution// Mainwhile (1)

{SD16CTL |= SD16VMIDON+SD16REFON;SD16CCTL0 |= SD16SC;



// Mainwhile (1)

{SD16CTL |= SD16VMIDON+SD16REFON;SD16CCTL0 |= SD16SC;




Lab 1 SD16_A ISR Solution// Add SD16_A ISR Here#pragma vector=SD16_VECTOR__interrupt void SD16_isr(void){


break; case 4:

result = SD16MEM0-offset; SD16CTL &= ~(SD16VMIDON+SD16REFON);break;

}}

// Add SD16_A ISR Here#pragma vector=SD16_VECTOR__interrupt void SD16_isr(void){


break; case 4:

result = SD16MEM0-offset; SD16CTL &= ~(SD16VMIDON+SD16REFON);break;

}}


Lab 2 SD16_A Setup Solution// Add SD16_A Configuration Here

SD16CTL = 0; // This is the default, delete lineSD16CCTL0 |= SD16BUF_2+SD16OSR_1024+SD16DF+SD16SNGL;

// Get internal offsetSD16INCTL0 = SD16GAIN_32+SD16INCH_7; SD16CCTL0 |= SD16SC;while(!(SD16CCTL0 & SD16IFG));offset = SD16MEM0;

// Configure for external potentiometerSD16INCTL0 = SD16GAIN_32+SD16INCH_0;SD16CCTL0 = SD16BUF_2+SD16OSR_1024+SD16DF+SD16SC+SD16IE;

// Add SD16_A Configuration HereSD16CTL = 0; // This is the default, delete lineSD16CCTL0 |= SD16BUF_2+SD16OSR_1024+SD16DF+SD16SNGL;

// Get internal offsetSD16INCTL0 = SD16GAIN_32+SD16INCH_7; SD16CCTL0 |= SD16SC;while(!(SD16CCTL0 & SD16IFG));offset = SD16MEM0;

// Configure for external potentiometerSD16INCTL0 = SD16GAIN_32+SD16INCH_0;SD16CCTL0 = SD16BUF_2+SD16OSR_1024+SD16DF+SD16SC+SD16IE;

• Make sure external reference has settled before offset measurement is made!

Documents

SigmaDelta ADC 4-1