SEMESTER- 1 - UPTU Notesuptunotes.com/wp-content/uploads/2014/01/CS-Mtech-Syllabus.pdf (For M-Tech, B-Tech, MBA, MCA) SEMESTER-1 S.N. Course Code Subject Periods Sessional Theory L

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SEMESTER-1

S.N.

Course Code

Subject

Periods

Sessional

Theory L T Lab

CT TA

1. CS/IT 11 Foundations of Computer

Science

3 1 20 30

2. CS/IT 12 Computer Organization and

Architecture

3 1 20 30

3. CS/IT 13

OS and DBMS 3 1 2 20 30*

4. CS/IT 14

Data Networks 3 1 2 20 30*

Total

12 4 4

* 30 marks are kept for tutorials, assignments, quizzes and lab

2


UPTU M. Tech. – CS/IT

SEMESTER-II

S.N.

Course Code

Subject

Periods Evaluation Scheme

Sessional

Theory L T Lab

(*)

CT TA

1. CS/IT 2xy ** Elective – 1

3 1 20 30*


3 1 20 30*

3. CS/IT 2xy ** Elective - 3 3 1 20 30*

4. CS/IT 2xy ** Elective - 4 3 1 20 30*

Total

12 4

* 30 marks are kept for tutorials, assignments, quizzes and lab ** Refer the list of streams and their respective courses for the values of x and y (*) The existence of 2 periods of lab for elective will be decided as per the nature of the elective

3



SEMESTER-III

S.N.

Course Code

Subject


Sessional

Theory L T Lab

(*)

CT TA


3 1 20 30*


3 1 20 30*

3. CS/IT 31 Professional Aspects in

Software Engineering

2 - - 50 -

4. CS/IT 32 Seminar

- - - - -

5. CS/IT 33 Dissertation

- - - -

Total 8 2 - -

* 30 marks are kept for tutorials, assignments, quizzes and lab

** Refer the list of streams and their respective courses for the values of x and y

(*) The existence of 2 periods of lab for elective/dissertation will be decided as per the nature of the elective/dissertation

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SEMESTER-IV

S.N.

Course Code

Subject


Sessional

Theory L T Lab

(*)

CT TA

1. CS/IT 41 Dissertation

- - - -

Total

(*) The existence and duration of lab will be decided as per the nature of the dissertation

Stream Subject Value of xy for

subject code

Prerequisite

Elective Subject Distributed Systems Distributed Computing 11

Mobile Computing 12 Analysis & Design of Real-

Time Systems 13

Dedicated System Design 14 VLSI Design 15

Software Engineering Engineering and Testing Structured Systems

21

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NOTE: The students are required to select courses from at least three streams.

CS students have to select at least one course each from Theoretical CS and from Distributed Systems. IT students have to select at least one course each from Software Engineering, Information Systems and Data Management.

Object-Oriented Programming

22

Engineering Object Oriented Systems

23 OOP

Multimedia System 24 Internet Programming and

Web Service Engineering 25

Information Systems Conceptual Modeling 31 Requirements Engineering 32 ETSS/CM Method Engineering 33 ETSS/CM Process Engineering 34 ETSS Simulation and Modeling 35

Data Management Distributed DBMS 41 Data Warehousing 42 Multimedia Databases 43

AI AI 51 Data Mining 52 AI Knowledge Based System 53 AI Natural Language Processing 54 AI

Theoretical CS Parallel Algorithms 61 Randomized Algorithms 62 Approximation Algorithms 63 Complexity Theory 64 Computational Geometry 65 Security Cryptography 71

Network and System Security 72 Cryptography Digital Forensic 73 Cryptography

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CS/IT 11 FOUNDATIONS OF COMPUTER SCIENCE

SECTION A: Discrete Mathematical Structure 15 Hours

Algebraic Structures: Semigroups, Monoids, Groups, Substructures and Morphisms, Rings, Fields, Lattices, distributive, modular and complemented lattice, Boolean Algebras. Formal Logic: Propositional logic: Predicate logic, limitations of predicate logic, universal and existential quantification; modus ponens and modus tollens. Proof technique: Notions of Implication, converse, inverse, contra positive, negations and contradiction Introduction to Counting Basic counting techniques, principles of inclusion and exclusion, permutations, combinations, summations, probability, Recurrence Relations, Generating Functions. Introduction to Graphs: Graphs and their basic properties, Eulerian and Hamiltonian walk, graph colouring, planar graph, enumeration, vector graph References

1. Kenneth Rosen, Discrete Mathematics and its application, TMH 2. C.L. Liu , Element of Discrete mathematics ,TMH 3. D.B. West ,Introduction to Graph Theory ,PHI 4. J.P.Trebley and R.Manohar , Discrete Mathematical Structure with Applications to

computer science, TMH

SECTION B: Data Structures and Algorithm

15 Hours Algorithm and Complexity, Notation of complexity. Sorting and Divide and Conquer Strategy: Merge-Sort, Quick Sort with average case analysis. Heaps and heap sort. Lower bound on comparison –based sorting Advanced search Structures: Representation, Insertion and Deletion operations on Red-Black trees, B-Trees, Hashing Dynamic programming , matrix multiplications, longest common subsequence, Greedy method, Knapsack Problem, 8 queens Problems , Backtracking, branch and bound , Fibonacci Heap Graph Algorithm Graphs and their representation. BFS, DFS, Minimum spanning trees, shortest paths Kruskal and Prim’s algorithms, connected components.

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References 1.Coreman ,Leiserson and Rivest, Algorithm , MIT Press 2.E. Horowithz and S. Sahni , Fundamentals of Computer Algorithm, Galgottia 3.Donald Knuth,, The Art of Computing Programming –vol-1 and 3 ,Pearson 4.V.Aho, J.E.Hopcroft and Ullman, Design and Analysis of Computer Algorithm ,Addison Wesley 5.K. Melhorrn, Datastructures and Algorithms, Vol II Springer Verlag

SECTION C: Theory of Computation

15 Hours Regular Languages Alphabet Langauges and grammars, Regular grammars, regular expressions and finite auotomata, deterministic and non-deterministic. Closure and decision properties of regular sets. Pumping lemma of regular sets. Minimization of finite automata. Context free Language Context free grammars and pushdown automata. Chomsky and Griebach normal forms. Cook, younger and Kasami Algorithm, Ambiguity and properties of context free languages pumping lemma. Deterministic pushdown automata. Closure properties of deterministic context free languages. Turing Machine Turing machines and variation of turing machine model, Halting problem, Universal turing machine, Type 0 Languages. Linear bounded automata and context sensitive languages. Turing Computable functions, Church Turing hypothesis. Recursive and recursively enumerable sets, Universal Turing machine and undecidable problems, Rice’s Theorems for RE sets, Undecidability of Post correspondence problem. Valid and invalid computations of Turing machines, undecidable properties of context free language problems, Basics of Recursive function theory. References 1. C. Papadimitrou and C.L. Lewis Elements of Theory of Computation,PHI 2. J.E. Hopcroft and J.D. Ullman, Introduction to Automata Theory,Languages of Computations, Addison-Wesley

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CS/IT 12 COMPUTER ORGANIZATION & ARCHITECTURE

Computer Organization Unit I 10 Hours Basic Computer Organization and design: Instruction set Principles: Classifying Instruction set Architectures, Memory Addressing , Type and Size of operands, Operations in the instruction set; Instruction Codes, Computer Register, Register , Register Transfer Language, time and Control , Instruction Cycle, Memory references instructions, Input Output and Interrupt, Design of Basic Computer and Arithmetic and Logic Unit. Micro programmed Control: Control Memory, address Sequencing, Design of Control unit Central Processing Unit: General Register Organization, Stack Organization, Instruction format, Data Transfer and manipulations program control. Unit 2 8 Hours Computer Arithmetic: Addition, Subtraction, Multiplication and Division Algorithms. Floating point arithmetic operation, IEEE-754, Decimal arithmetic unit and Decimal Arithmetic operations. Unit 3 Input- Output Organization: Peripheral Devices, Input–Output Interface, Asynchronous data transfer, Modes & Transfer, Priority interrupt, Direct Memory access, I/O Performance Measures, Benchmarks of Storage Performance and Availability. Memory Organization: Memory Hierarchy, Main Memory, Auxiliary Memory, Associative Memory, Shared Cache memory Cache Memory and its performance, Reducing Cache Miss Penalty, Reducing Miss Rate, Reducing cache Miss Penalty or Miss Rate via Parallelism, Reducing Hit Time, Virtual Memory

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Computer Architecture Unit 4 Principle of Scalable Performance: Performance metric and measures, speedup performance laws, scalability analysis and approaches. Parallel processing and application Advanced Processor Technology: Design space of processors, Instruction set architectures, CISC, RISC Pipelining: Linear and Non-Linear pipeline processors, Instruction pipeline design, arithmetic pipeline design, super scalar and super pipeline design, Superscalar and Vector processors. Unit 5 Multiprocessor system Interconnects, Cache coherence and synchronization and mechanisms, message passing mechanism System Interconnect Architecture: network property and routing, static connection network and dynamic connection network. REFERENCES 1. Mano M: computer System Architecture –PHI 3rd Edition 2. Henessy J L, Patterson D A: Computer Architecture: A Quantitative approach – 3rd (Elsevier) 3. Kai Hwang: Advanced Computer Architecture TMH 4. Hamacher V C, et al: Computer Organization – 4 Edition (McGraw Hill)

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CS/IT 13 OPERATING SYSTEM AND DATABASE MANAGEMENT SYSTEM

Unit I 10 Hours Operating System: Structure, Components and Services, Time Sharing and Real-Time System, process Management, Concurrency Critical Section, Semaphores, InterProcess Communication, Process scheduling producer/ consumer and reader writer problem, Concept of Distributed and Real-Time operating system. Unit II 8 Hours CPU Scheduling: Concept and Scheduling algorithm, multiprocessor scheduling, deadlock prevention, avoidance and detection, recovery from deadlock. Memory Management: Multiprogramming with fixed partition, multiprogramming with variable partition, segmentation virtual memory and demand paging. Page Replacement Policies Thrashing and pre-paging Unit III 10 Hours I/O Management, File System: File organization and access mechanism, file sharing and file directories, Case Study of Linux Kernel- File Management, Memory Management and Process Management Unit IV 10 Hours Overview of Database Management System, Data Model- Relational Algebra, Relational Calculus –Tuple Relation Calculus and Domain Relation Calculus, Normal Forms SQL, DDL, DCL DML, PL/SQL Unit V 7 Hours Deadlock – Prevention and avoidance, Transaction and Data Recovery Method. Introduction of Object Oriented DBMS, Object Relational DBMS, Distributed DBMS and Data mining & Data warehousing References: 1. A.S. Tanenbaum: “Modern Operating System” , Prentice Hall 2. William Stalling: “Operating System” Maxwell McMellon 3. J. Peterson ,A. Silberschatz and P. Galvin: Operating System Concepts, Addison Wesley ,3rd edition 4. Milenkovic :Operating System Concept ,TMH 5. Korth and Silberschatz :Database System Concept; Second Edition, Tata McgrawHill,1991 6. R. Elmasri and N.Navathe :Benjamin Cumming, Fundamental of Database System , 2nd 1994 7. Boveti et al:Understanding the Linux Kernel 3rd O’Reilly 8.C.J. Date Database management Systems.

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PCS/IT 14 DATA NETWORK Unit-I Overview of Wired and Wireless DataNetworks 8 Hours Review of Layered Network Architecture ,ISO-OSI and TCP/IP Network Model Datagram Networks and Virtual Circuit Networks, Point to Point and Point to Multipoint Networks Layer 2 Switches. IEEE 802.3U(Fast Ethernet) and IEEE 802.3Z(Gigabit Ethernet) Virtual LAN Wireless LAN: IEEE 802.11, Bluetooth Broadband Wireless LAN : 802.16, WIMAX Unit-II Internetworking 10 Hours Review of IP Addressing and Routing Internet Architecture :Layers 3 Switch, Edge Router and Core Router Overview of Control Plane, Data Plane ,Management Plane Internet Routing Protocols: OSPF, BGP Broadcast and Multicast Routing: Flooding, Reverse Path Forwarding, Pruning, Core based trees, PIM Mobility Issues and Mobile IP Adhoc Routing: Dynamic Source Routing, Destination Sequenced Distance Vector Routing, Hierarchial Routing Signalling :Introduction ,ICMP,LDP and MPLS Architecture Unit III Transport Layer Protocols 7 Hours Process to Process Delivery Review of UDP, TCP SCTP Protocol: Services, Features, Packet Format, Association, Error Control Wireless TCP and RTP, RTCP Real Time Application: Voice and Video over IP Unit-IV Traffic Control and Quality of Service 12 Hours Flow Control: Flow Model, Open Loop: Rate Control, LBAP, Closed Loop: Window scheme, TCP and SCTP Flow Control Congestion Control: Congestion Control in packet networks, ECN and RED Algorithm, TCP and SCTP Congestion Control Quality of Service: IP Traffic Models, Classes and Subclasses, Scheduling: GPS, WRR, DRR, WFQ, PGPS, VC Algorithm; Integrated Services Architecture, Differentiated Services Architecture, RSVP and RSVP- TE Traffic Management Framework: Scheduling, Renegotiation, Signaling, Admission Control, Capacity Planning

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Unit-V 8 Hours Security Issues, Symmetric Encryption: DES , TripleDES ,Modes, AES Public Key Encryption: RSA , Diffie Hellman, Elliptic Curve Hashing :MDS , SHA-1 , DSA Protocols: Kerberos,SSL/TLS, IPSec Reference

1. Srinivasan Keshav” An Engineering Approach To Computer Networking “,Pearson 2. W. Richard Stevens “TCP/IP ILLustrated “-Vol1 Pearson 3. D. Bertsekas , R Gallagar ,”Data Networks and Internets” PHI 4. W. Stalling “High Speed Networks and Internets”, Pearson 5. W. Stallings, “ Wireless Communication and Networks” Pearson 6. W. Stallings,” Cryptography and Networks Security”,Pearson 7. A. Tanenenbaum, “ Computer Network”,PHI

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Appendix II: Streams and their Courses

1. Distributed Stream

Distributed Computing Basic Concepts 6 Hours Characterization, Resource Sharing, Internet Implementations, Name Resolution, DNS Computation: Full Asynchronism and Full Synchronism, Computation on Anonymous Systems, Events, Orders, Global States, Complexity Distributed Synchronization 8 Hours Processes and Threads, IEEE POSIX.1c Mutual Exclusion: Classification, Algorithms, Mutual Exclusion in Shared Memory; Clock Synchronization, NTP Distributed Deadlock: Detection Methods, Prevention Methods, Avoidance Methods BSD Sockets 8 Hours TCP/IP Model, BSD Sockets Overview, TCP Sockets and Client/Server, UDP Sockets and Client/Server, Out of Band Data, Raw Sockets, PING & TRACEROUTE Programs, Routing, Multicasting using UDP Sockets Distributed OS 10 Hours Communication between distributed objects, RPC Model and Implementation Issues, Sun RPC, Events and Notifications, Java RMI and its Applications CORBA Architecture: Introduction and Applications Distributed File System Design and Case Studies: NFS, Coda, Google FS Distributed Databases 8 Hours Introduction, Structure, Data Models, Query Processing, Transactions, Nested Transactions, Atomic Commit Protocols, Transaction Recovery, Transactions with replicated data, Concurrency Control Methods, Distributed Deadlocks References:

1. Tanenbaum, “Distributed Systems”, Pearson 2 W Richard Stevens, “UNIX Network Programming Vol 1 & 2”, Pearson 3. Sinha, ”Distributed Operating Systems”, Prentice Hall of India/ IEEE Press 4. Barbosa, “Distributed Algorithms”, MIT Press 5. Ceri, Palgatti,”Distributed Databases”, McGraw-Hill

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Mobile Computing Introduction 8 Hours Basic Concepts, Principles of Cellular Communication, Overview of 1G, 2G, 2.5G, 3G and 4G technologies, GSM and CDMA Architecture, Mobility Management, Mobile Devices: PDA, Mobile OS: Palm OS, Mobile Linux Initiative, Symbian. Process Migration 8 Hours Kernel Support for Migration: Mobility Enhancement in modern UNIX Systems, Transparent Process Migration Design Alternatives, Removing Process Migration Bottlenecks, Task Migration Issues User Space support for Migration: Checkpointing, Process Migration Data Issues 8 Hours Workload Balancing Strategies in migration, Process lifetime distributions for dynamic load balancing, Disconnected Operations in Coda File System, Weak Connectivity for Mobile File Access, Weakly Connected Replicated Storage System. Mobile Data Networking 8 Hours Mobile IPv4 and Mobile IPv6, Mobile Internetworking Architecture, Internet Mobility Issues, Route Optimization, Performance of Wireless TCP, GPRS Services, IP over CDMA Mobile Agents 8 Hours Basic Concepts, OS support for Mobile Agents, Java Aglet API, AGENT TCL, Network Aware Mobile Programs, Mobile Objects and Agents, OMG MASIF Framework, Mobile Agent Security Issues References:

1. Richard Wheeler, ”Mobility: Processes, Computers and Agents” 2. Charles Perkins et.al.,”Mobile IP: Design Principles and Practices”, Pearson 3. Tomasz Imielinski, “Mobile Computing”, Springer Verlag

15


Analysis and Design of Real-Time Systems Basic Concepts 6 Hours IEEE Definition of Real-Time Systems, Characterization of Real-Time Systems, Process, IEEE POSIX.1c Threads, Tasks and Priorities, Pre-emptive and Non-Preemptive Tasks, Soft and Hard Real-Time Systems Scheduling 10 Hours Scheduling Paradigms: Priority Driven, Time Driven, and Share Driven Priority Driven Scheduling of Periodic, Aperiodic and Sporadic tasks Static Priority Scheduling: Rate Monotonic Scheduling Algorithm and its exact analysis using Response Time Test Dynamic Priority Scheduling: Analysis of EDF and LLF Algorithms and their open issues Specification and Verification 10 Hours Modeling Real-Time System, Requirement Specification, Assumptions, Design, Basic Duration Calculus, Specification of Scheduling Policies, Probabilistic Duration Calculus, Applications of Duration Calculus RTOS 8 Hours Introduction, Requirement of Real-Time Guarantees in industrial applications, Soft and Hard RTOS, Commercial RTOS Examples IEEE POSIX.1b: Priority Scheduling, Real-Time Signals, Timers, Binary Semaphores, Counting Semaphores, MUTEX operations and usage, Message Passing, Message Queues operations and usage, Shared Memory, Synchronous and Asynchronous I/O, Memory Locking RTOS Services, Case Studies of Real Time Capabilities of Linux Kernel 2.6, RTLinux and VxWorks Applications 6 Hours Real-Time Application Design, Real-Time Application Interface (RTAI), Real-Time Java, Real-Time Communications and Networking References:

1. JWS Liu, “Real-Time Systems”, Pearson 2. Mathai Joseph, ”Real-Time Systems: Specification, Verification and Synthesis”, Prentice-Hall 3. Qing Li, “Real-Time Concepts for Embedded Systems”, CMP Books 4. Krishna, Shin, “Real-Time Systems”, TMH 5. Burns, Wellings, “Real-Time Systems and Programming Languages”, Pearson

16


Dedicated System Design Review of Digital Computer & Digital Arithmetic 8 Hours Algorithm and Algorithmic Notation, Timing, Synchronization and Memory, Fixed and Floating point Arithmetic operations, Arithmetic primitives, Sequential and Distributed Arithmetic. Hardware Elements and Hardware Design using VHDL 8 Hours Gates, Flip-Flops, Registers, Synchronization Signals, Power Consumption and related design rules, Pulse generation and Interfacing, Chip Technology: Semiconductor Memories, Processors and Configurable Logic, Chip Level and Board Level Design Considerations Hardware Design Languages, Simulation of Hardware Elements using VHDL, Timing Behavior and Simulation, Test Benches, Synthetic Aspects Sequential Control Circuits and Processors 8 Hours Mealy and Moore Automaton, Designing the Control Automaton, Implementing Control Flow and Synchronization Designing for ALU efficiency, Memory Subsystems, Simple Programmable Processor Design, Interrupt Processing and Context Switching, Interfacing Techniques, Standard Processor Architectures System Level Design 10 Hours Aspects of System Design, Scalable System Architecture, Regular Processors, Network Architecture, Integrated Processor Networks, Static Application Mapping and Dynamic Resource Allocation, Resource Allocation on Crossbar Networks and FPGA Chips, Communication Data and Control Information, (Pi)-nets Language for Heterogeneous Programmable Systems Digital Signal Processors 8 Hours DSP Elements and Algorithms, Integrated DSP Chips, Floating Point Processors, DSPs on FPGA, Typical Applications References:

1. Mayer, Lindenberg, ”Dedicated Digital Processors”, Wiley 2. R Gupta, “Co-Synthesis of Hardware and Software for Embedded Systems”, Kluwer 3. “Digital Signal Processing”, IEEE Press

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VLSI Design & Testing Manipulation of Boolean expressions 10 Hours Two level realizations with NAND or NOR gates, Standard form of Boolean functions, Minterm & maxterm designation of functions, simplification of functions on Karnaugh Maps, Map minimization of product-of-sums expression, incompletely specified functions, logic Hazards, Elimination of Hazards. Algorithms for optimization of combinational logic, impact of logic synthesis, cubical representation of Boolean functions, determination of prime implicants selection of optimum set of prime implicates, multiple output circuit, programmed logic array, minimization of multiple output function, Tabular determination of prime implicats, field programmable logic arrays.

VLSI Realizations of Combinational Logic 10 Hours Introduction, pass transistor network realization, Steering of 0,1,X & X to the output, tree networks, negative gate realization, logic design with CMOS standard cells, pre charged clocking of CMOS PLA. Multilevel logic using complex (MSI) ports & cells:- The place for complex parts & cells, decoders, ROM as a logic element, binary adder, design with multiplexers, more than two level realizations with basic primitives, combinational MSI parts & cells, multilevel logic manipulation & optimization.

Sequential circuits 8 Hours Sequential activity, memory elements, general model for Sequential circuits, clock mode Sequential circuits., Synthesis of clock mode Sequential circuits: Analysis of a sequential circuit, design procedure, synthesis of state diagrams, equivalent state & circuits, simplification by implication tables, state assignment & memory element input equations.

VLSI Realization of Digital Systems 8 Hours Alternative Structural descriptions, levels of descriptions, Standard cell CMOS layout & delay model, Timing analysis & simulation, Event driven gate level simulations, Switch level simulation, PLD & programmable gate arrays Test Generation for VLSI 10 Hours Fault detection & diagnosis, Stuck at fault model, test generation strategy, test generation by evaluation & search, modeling CMOS, Stuck-open faults, fault simulation in sequential systems, boundary scan, built-in-self test. Fault

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Tolerant Design: Hardware redundancy, Information redundancy, time redundancy, software redundancy, system level Fault Tolerance. Self-checking sequential circuit Design: Faults in state machines, self checking state machines design Techniques, Synthesis of redundant fault-free state machines. References:

1. Parag K. Lala , “Fault-Tolerant & Fault Testable Hardware” , B-S-Publication Hyderabad 2. Parag K. Lala ,“Self checking & Fault-Tolerant Digital Design”, Morgan Kaufman Publishers 3. Frederick J. Hill and Gerald R. Peterson, “Computer Aided Logical Design with Emphasis on VLSI”, John Wiley &

Sons Inc.

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SEMESTER- 1 - UPTU Notesuptunotes.com/wp-content/uploads/2014/01/CS-Mtech-Syllabus.pdf (For M-Tech, B-Tech, MBA, MCA) SEMESTER-1 S.N. Course Code Subject Periods Sessional Theory L