Schematic Diagram

7/14/2019 Schematic Diagram

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Schematic Diagram

7. Schematic Diagram

7-1 Circuit Description

Y Main Board

PDP Panel

Logic Board

Main Board

SMPS Board

X Main Board

CP UDecoder

VideoDecoder

VideoS/ W

Speaker Ou t

Au di oProcessor

A/ DConverter

LVDSTrans

ImageEnhancer

Deinterlacer

ImageScaler

TMDSRecever

LVDS

Micom

Tuner

42” - 1024x768 Pixels

1024x768x3 Cells (R,G,B)

50” - 1365x768 Pixels

1365x768x3 Cells (R,G,B)

Main SMPS

AC Power

Source

Address Buffer

Y-Pulse

Generator

X-Pulse

Generator

Input

Data

Processor

Data

Controller

DRAM

Driver

Timing

Controller

Display

Data

Display

Timing

Row

Driver

Scan

Timing

■ SMPS BoardThe SMPS used for the PDP has been designed to be efficient, compact and lightweight. For VS and VA outputs, a LLC converter

has been used. For the other outputs, a Flyback converter has been used.

■ LOGIC BoardThe logic circuit consists of a Logic Main Board and an Address Buffer Board. The Logic Main Board decodes the video signal

encoded by the Video Board, outputs the ADDRESS data signal for each pattern and generates X and Y drive signals. The

Address Buffer Board buffers and transfers the ADDRESS data output signal using TCP IC.

- LVDS with built-in video signal processing (W/L, error diffusion, APC, FCR, etc.) applied and 1 ASIC chip.

- Outputs the address Drive IC control and data signals to the Buffer Board.

- Outputs the control signal for the X and Y Drive Boards.

- Monitors major drive voltages (Micom Circuit Block); detects if a surge voltage has been applied and protects the Drive Circuit.

- Temperature Adaptive Operating Mode (Low Temperature/Room Temperature/High Temperature); Discharge optimization for

each temperature level.



MEMO



Samsung Electronics

Schematic Diagram

7-3

STAND BY POWER

H:OFF

OO

L:POWER ON

21BD1012_P

2

1

1 5 0 1 C

2

1

0 5 0 1 C

2

1

8 4 0 1 C

2

1

7 4 0 1 C

2

1

8 0 0 1 R

2

1

5 0 0 1 R

2

1

6 0 0 1 R

2

1

7

0 0 1 R

2 1

D1002

21BD1007

2

1

C1005

2

1

6 0 0 1 C

2

1 5 3 0 1 C

1 D N G M

87654

321

IC1012

2 1

R1027

2

1

C1014

2

1 4 3 0 1 C

2

1 8 2 0 1 R 2

1

1 0 0 1 D

2

1 6 3 0 1 C

2

1 2 2 0 1 R

2

1

1 2 0 1 R

2

1 8 3 0 1 C

21

C1016

21

L1001

2

1

9 2

0 1 R

2

1C1039

21

BD1005_B25

21

BD1006_A25

2

1

R1015

2

1

C1015

21

R1001

87654

321

Q1003_L

6543

21

IC1003_L

3 2

1

IC1011

2

1

C1040 2

1

C1037

2

1

C1046

2

1

C1045

2

1

C1066

2

1

C1033

2

1

C1032

2

1

C1031

2

1

C1030

2

1

C1029

2

1

C1028

2

1

2 1 0 1 C

2

1

3 0 0 1 C

2

1

8 0 0 1 C

C1063

2

1

1 1 0 1 C

3 2

1

IC1009

TP1113

3 2

1

IC1002

1 0 1 1 P T

TP5184

4 0 1 1 P T

9876543

2423222120

2

19181716151413121110

1

CN1001

C1023

5 0 0 1 D

4 0 0 1 C

2

1

L_

4 1 0 1 R

C1022

4 1 1 1 P T

C1001

C1024

TP114

3

2

1

Q1002_L

3

2

1

Q1001

C1019

R1031

BD1004_13V_L

R1003_PNCIS_P

D1004

R1012_13V_L

3 2

1

IC1007

R1004_L

C1021

BD1010

R1030

R1010_L

3

2

1

Q1004_L

0 1 1 1 P T

L1003

R1041

R1002_L

9 0 1 1 P T

C1025

R1013_L

2 1 1 1 P T

3 0 1 1 P T

R1011_L

3 2

1

IC1005

BD1011

7 1 0 1 C

TP1105

BD1008_QAM

3 2

1

IC1006

TP11063

2

1

IC1001

C1020

2 0 1 1 P T

1 1 1 1 P T

L1004

2

1C1026_L

BD1003_5V_L

F N 5 1 . 0

F P 0 0 2 2

V 0 5

1N4148WS-F

FGND

BEAD_CHIP

47KOHM

BEAD_CHIP

BEAD_CHIP

FDS9933A

0OHM

A3.3V_T

V 6 1

SW_POWER

V 0 5

W 6 1 / 1

M H O K 0 0 1

F N 0 0 1

10V

16V

APL1117-18UC-TRL

FGND

B13VS

F U 1

10NF

10KOHM

47KOHM

-

330OHM

220UH

F N 0 1

25V

F N 0 0 1

V 5 2

-

-

FGND

FGND

PW_CNTR1

F U 1

PW_CNTR2

SW_PVCC

PANEL_VCC

BEAD_CHIP

1UF

4.7UF

2.2KOHM

A5VPDP_CIS

22OHM

4.7KOHM

A2.5V_DDR

22KOHM

100KOHM

100KOHM

M H O 0 0

1

M H O 0 0 1

M H O K 0 1

10KOHM

50V

10NF50V

10NF 50V

V 0 5

4.7NF50V

0.22NF50V

1UF10V

2200PF50V

F N 0 0 1

V 5 2

F N 0 0 1

V 5 2

25V

10UF16V

F U 0 1

V 6 1

22UH

-

A3.3V_T

B2.5V_DTV

4.7UF10V

FGND

FGND

BEAD_CHIP

10V

50V

-

M H O K 6 . 5

1UF

16V

680UH

-

-

-

-

-

3 3 C 4 8 X Z B

-

MC33269DTRK-5.0

4.7UF10V

10V4.7UF

MMBD4148SE

10V

NCP1117DT33T5

10V

KSC1623-Y

-

BEAD_CHIP

10V4.7UF4.7UF

-

4.7UF

AP1117D-A

10V4.7UF

4.7UF

10V

-

4.7UF10V

AP1117D-A

4.7UF

SMW200-24C

470UF

470UF

BEAD_CHIP

KTC3875S-Y

-

MP1583DN

BEAD_CHIP

BEAD_CHIP

16V

M H O K 5 1

M H O K 0 2

HSYNC_OUT

16V47NF

A2.5V_DDR_1

B5V_VCCT

FGND

A5V

B33V

FGND

FGND

A5V

B1.8VTB1.8V_AMP

FGND

A1.2V_VDDC

FGND

B3.3VD B1.25VD

B1.25VT

FGND

FGND

FGND

A3.3V_M

A3.3V B3.3VD

B3.3VDB3.3VD

FGND

AP1117D-A

10KOHM

B9VB5VB13V

2SC2412K-Q

V 5 2

FGND

100NF

100NF25V

A3.3V_M

SI3443BDV

FGND

-BA178M09FP

100UF

F U 0 1

V 6 1

V 6 1 F U 0 1

V 6 1

M

H O K 1

V 6 1

A3.3V_M

FGND

M H O K 1

F U 0 1

V 6 1

F U 0 1

E

BC

VIN VOUT

ADJ

FBGND

EN

SS

COMPSW

IN

BS

D

D

SG

D

D

VIN VOUT

ADJ

VIN VOUT

ADJ

VIN VOUT

ADJ

VIN VOUT

ADJ

GND

OUTIN

E

BC

E

BC

VIN VOUT

ADJ

This Document can not be used without Samsung’s authorization.

7-2 Schematic Diagram

7-2-1 Power

Power



Schematic Diagram

7-4 Samsung Electronics

PLACE ON THE TOP

DTV AUDIO R/L

5

4321

IC7403

9 0 4 7 C

4 0 4 7 R

R7412 3 1 4 7 R

1 0 4 7 C

C7405

2 0 4 7 D B

3

2

1

IC7402

7 0 4 7 C

6 0 4 7 C

2

1 1 1 4 7 C

R7405

2

1

2 1 4 7 C

4 0 4 7 C

8 0 4 7 C

7 0 4 7 R

C7410

U2202

R7406

2 0 4 7 C

1 0 4 7 D B

R7410

2

1 3 0 4 7 C

987

65432

1413121110

1

IC7401

3

2

1Q7402

RST_DMODULE

SELF_RESET

AUD_BITCLK

AUD_CLKAUD_LRCLK

AUD_DATA0

_PERI_RESET

DTV_AUDIO_R

F U 0 1

P I H C_

D A E B

10V10UF

F U 0 1

V 0 1

-

_CPU_RESET

DTV_AUDIO_L

NTARGET_RESET

RT9818C-42PV

FGND FGND

B9V

FGND

FGND

B5V

FGND

FGND

FGND

FGND

WM8521H9GED/RV

P I H C_

D A E B

B3.3VD

B3.3VD

74AHCT1G08

M H O K 1

F N 0 0 1

F N 0 0 1

V 6 1 F N 0 0 1

V 0 5 V

0 5

F N 6 5 . 0

10KOHM

10KOHMM

H O K 2 1

M H O K 2 1

4.7KOHM

4.7KOHM

10V10UF F

N 6 5 . 0

FGND

FGND

KTC3875S-GR

F N 0 3 3

V 6 1

V

6 1 F N 0 3 3

V 6 1

V 6 1

V 0 1

V 6 1 F U 1

VCC

YGND

A

B

SET,RESETVDD

GND

CAPAGND

VOUTL

AVDDVOUTR

MUTEDEEMPH

BCLK

MCLK

DVDD

FORMATDIN

LRCLK

DGND

E

BC


7-2-2 DTV Aud io R/L

Power

















Schematic Diagram



Samsung Electronics

Schematic Diagram

7-13

DDR

HOTEL OPTION

CLOSE TO MEMORY

SERVICE

OFF

ATV

SELECT

IDTV

PDP LVDS ON

PDP LVDS OFF

H

UART_SEL2

H

UART_SEL1

H

H

H

H

L

L L

L

21R52402

1R5241

87654

321

IC5250

21

C5227

21R5242

21R524321R5244

32

1

Q5214

32

1

Q5216

21R5249

21

R525121R52502

1R5248

2

1

2 0 2 5 D

21R5282

2

1

1 6 2 5 R

2

1

1 2 2 5 C

3

2

1Q5222

21R5245

21

C523087654

321

IC5251

2 1

R5260

2 1

R5230

2

1

1 0 2 5 C

2

1

6 0 2 5

C

5 2 A

_ 6 0 2 5 R

4 1 2 5 C

2 6 2 5 R

RA5204

RA5205

R5203

R5204

3 1 2 5 C

987

66656463626160

6

59585756555453525150

5

49484746454443424140

4

39383736353433

323130

3

29282726252423222120

2

19181716151413121110

1

IC5201

R5205

5 0 2 5 C

4 0 2 5 C

3 0 2 5 C

2 1 2 5

C

1 1 2 5

C

0 1 2 5

C

9 0 2 5

C

8 0 2 5

C

RA5201

RA5202

R5201

R5202

RA5203

2 0 2 5 C

7 0 2 5

C

T H

_ 3 3 2 5 R

T H

_ 2 3 2 5 R

T H

_ 1 3 2 5 R 32

1

Q5203_HT

32 1

Q5204_HT T H

_ 6 2 2 5 C

E D

_ 2 2 2 5 C

E D

_ 8 2 2 5 C

R5211R5210

3

2 2 5 R

T H

_ 4 3 2 5 R

T H

_ 5 2 2 5 C

C5218

98765432

16151413121110

1

IC5202

C5220

2 2 2 5 R

1 2 2 5 R

0

2 2 5 R

C5219

R5208R5209

4 2 2 5 C

3 2 2 5 C

R5226 3

2

1Q5201

5 1 2 5 R

4 1 2 5 R

2 1 2 5 R

3 1 2 5 R

98765432

16151413121110

1

IC5203

1 0 2 5 L

7 1 2 5 R

6 1 2 5 R

R5218

R5219

R5227

3

2

1

Q5202

7 1 2 5 C

C5216

1 0 2 5 D

5 1 2 5 C

T H N

_ 4 0 2 5 D B

T H

_ 3 0 2 5 D B

A2.5V_DDR

33OHM

MCLK F N 1

TC7WB125FK

FGND

B5V

1/16W 0OHM

SCL_RXD

0OHM1/16W

1/16W

1/16W

PC_EDID_RW

2N7002

SDA_TXD

HDMI_EDID_RW

FGND

D2_DDC_SDA

SCL1

SDA1

SDA1

SCL1

0OHM

TC7WB125FK

33OHM15

A2.5V_DDR

WALL_D

16V

B5V

1/16W

1/16W

D2_DDC_SCL

FGND

1/16W 0OHM

0OHM

1UF

10KOHM

0OHM1/16W

2N7002

FGND

10KOHM

16V

1UF

FGND

0OHM

0OHM

FGND

SERVICE_ANY_TXSERVICE_ANY_RX

HOTEL_RXDUART_SEL1

FGND

5

MCLKZ

33OHM

VDDQ_DDR

EM6A9160TS0A-5G

33OHM

FGND

V 6 1

BA1

DQS1

10KOHM

F U 1

DDC_CNTR

FGND

DDC_WP

FGND

V 5 2

F N

0 0 1

100OHM

MDATA<0..15>

1413

VDD_DDR

FGND

A5V

FGND

A3.3V

FGND

FGND

FGND

VDDQ_DDR

VDD_DDR

A3.3V

FGND

A5V

FGND

A5V

FGND

A3.3V

A5V

FGND

B5V

V 6 1

F N 1

V 0 5

0OHM

0OHM

0OHM

0OHM

DQS0

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

. 4

M H O K 7

.

4 M H O K 7

. 4

M H O K 7

. 4

LDQM

100OHM

UDQM

100OHM100OHM

100OHMHOTEL_STB_TX100OHMHOTEL_STB_RX

M H O K 0 1

M H O K 0 1

M H O K 0 1

M H O K 0 1

M H O K 0 1

10KOHM

10KOHM

UART_SEL2

F P 0 0 1

V 0 5

F P 0 0 1

V 0 5

V 0 1

F N 0 0 1

V 5 2

F N 0 0 1

V 5 2

F N 0 0 1

V 5 2

F N

0 0 1

V 5 2

F N

0 0 1

V 5 2

V 5 2

F N

0 0 1

V 5 2

F N

0 0 1

V 5 2

F N 0 0 1

F N

0 0 1

V 5 2

F U 0 1

F

U 0 1

V 6 1

F N 0 0 1

100NF 16V

100NF 16V

100NF 16V

F N 0 0 1

V 6 1

100NF16V

F N 0 0 1

V 6 1

V 0 5

F N 1

V 0 5

M H O K 1

1KOHM

CKE

F U 0 1

KTC3875S-Y

7

MCLK

MCLKZ

BA0

RASZ

WEZ

MADR<0..11>

321010

33OHM

89

11

12

10

33OHM

4

67

1198

33OHM

10

23

456

M H O K 1

. 9

WALL_C

TRANSMITTER

DTV_SERVICE_RXDLOGIC_RX_P

RECEIVER

H U 0 1

74HC4052D

V 0 1

QMAX232ECDWR

2N7002

2N7002

P I H C

_ D A E B

P

I H C_

D A E B

2 .

8 Z L R

V 0 1 F U 0 1

HOTEL_TXD

CASZ

KTC3875S-Y

LOGIC_TX_P

DTV_SERVICE_TXD

F -

S W 8 4 1 4 N 1

KTC3875S-Y

D S

G

D S

G

C1+

GND

R2IN

T2OUT T2IN

R2OUT

V-

V+

T1IN

C2-

R1IN

T1OUT

R1OUT

C2+

C1-

VCC

E

BC

A2GND

/OE2

VCC

B1B2

A1

/OE1

D S

G

D S

G

E

BC

0Y

2X

VSS

VEE A

B

/EN

2Y

3X

1Y

X-COM

1X

0X

3Y

Y-COM

VDD

A2GND

/OE2

VCC

B1B2

A1

/OE1

A6

A9

A7

A8

VSSVDD

A3

A2

A1

A0

A11

NC

A10/AP

BA1

NC

CKE

BA0

NC

UDM

VSS

CK

/CK

/CS

/RAS

/CAS

/WE

DQ10

VSSQ

VDDQ

DQ9

VSS

DQ15

NC

DQ8

VDD

NC

LDQS

VDDQ

VREF

NC

UDQS

VSSQ

NC

DQ7

VSSQ

DQ6DQ5

VDDQ

DQ14

VSSQ

DQ4

DQ3

VSSQ

DQ2

DQ11

DQ1

VDDQ

DQ13

DQ12

VDDQ

DQ0

VDD

A4

A5

LDM

NC

E

BC


7-2-11 DDR & Tuner

Power

Documents

Schematic Diagram