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TM August 2013

S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

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Page 1: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM

August 2013

Page 2: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 2

• Value proposition

• Market Trends

• Product Roadmap

• Benefits Summary

• Products details

2

Page 3: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 3

• S12 MagniV simplifies system design with the integration of High-Voltage (40V)

analog IP onto mixed-signal MCUs for automotive applications

• Building upon proven high-volume LL18 technology

• Ideal for space constraint applications like sensor and actuators

• Reduces the Total Cost of Ownership (TCO) through Bill Of Material (BOM) and

manufacturing cost reductions (PCB assembly).

Page 4: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

4 TM

• Reduction of power consumption

− LIN to reduce cables weight

− Smarter motor control techniques

− Smarter and more sensors

• Reduction of physical size

− Electro-mechanical integration

− High temperature >125°C Ta

• High Growth

− Driven by affordability of LIN

− Driven by comfort and convenience features

Page 5: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

5 TM

2015

Troll - MUX3

• 8-bit HC05 Hyper-integrated Climate Stepper Driver

908E626

• HC08 + SMOS5 AFS Stepper Driver

908E630

• 8-bit HC08 (SOG) + SMOS8 Relay Driver

912F634

• 16-bit S12I32 + SMOS8 Relay & Switch Driver

S12VR64 First S12 MagniV product:

2009 2008 2007 2006 2005 2004 2003 2002 2001 2000 1999 1998 2010 1997

Start of SiP R&D

Mechatronics Package

HC05 Microcontroller with EEPROM (IDR60% -1.2um)

SiP Architecture

HC08 Microcontroller with flash (0.5um)

SMOS5 (0.8um)

54ld SOIC Package

SMOS8 (0.25um)

QFN Package

S12 Core (0.25um)

Architecture Repartitioning

Monolithic Architecture

1st Gen 2nd Gen 3rd Gen

2011 2012 2013 2014

4th Gen

HC05PV8

• 8-bit HC05 Hyper-integrated Relay Driver

908E624

• 8-bit HC08 + SMOS5 Relay Driver

908E622/1

• 8-bit HC08 + SMOS5 Mirror Driver

LL18UHV technology

Monolithic SiP

Pro

ducts

Technolo

gie

s

S12ZVM S12ZVH

S12ZVL

S12Z Core

Page 6: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

6 TM

• Standard MCU

• Application Specific

Analog IC (ASIC)

• Single package

• Die-to-die bonding

Semi-Discrete Solution

(Multi-Chip) Multi-die SiP

• MCU and Analog on

the same die

Monolithic SiP

SiP = System in Package

Page 7: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

7 TM

Digital Logic S12, PWMs, Timers,

SRAM, SPI, SCI, GPIO,

Watchdogs, etc.

High-Voltage

Analog Low Side & High

Side Drivers,

Voltage Regulator

LIN/CAN Phy. etc.

Non-Volatile

Memory Flash, EEPROM

Existing

Low Leakage 180nm CMOS+NVM 40V UHV Devices

Page 8: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

8 TM

GPIO

Timer 16Bit

(25-64MHz)

PWM 8/16Bit

(25-64MHz)

EEPROM (ECC)

128B – 4kB

Flash (ECC)

8kB – 128kB

S12- or S12Z-CPU

25/32/50MHz bus

BDM/BDC

CAN-

PHY

VREG for tot. supply: •70mA w/o ext comp. or

•170mA with ext. ballast

Temp

Sense

RAM (ECC)

512B - 8kB

PLL RCosc.

+/-1.3%

Pierce Osc.

MS-CAN Sent

1-4ch HVI (12V-input

with ADC)

High-Voltage

Components

Digital

Components 5V Analogue

Components

MCU Core

and Memories Packaging

Win Wdog

Key

Wakeups

Motorcontrol PWM

With Fault protection

Programmable

Trigger Unit

ADC

10-12Bit resolution

1-2 S/H-units

Up to 16ch total

Current Sense (2 x Op-Amp)

PGPIO

20mA NGPIO

25mA

Stepper Motor Driver with SSD

RTC

Segment LCD (4x40)

Sound Generator

LQFP:

32/48/64/100/144-pin

QFN:

32-pin (5x5mm)

LQFP-EP:

48/64-pin

LIN-

PHY

V-SUP

SENSE

V-BAT

SENSE

HS-

drivers

LS-

drivers

Charge Pump

4-6ch MOSFET

Predriver (50-100nC)

SCI SPI IIC

32kHz low power Osc

2ch ACMP

With 1x6-Bit-DAC

Page 9: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

9 TM

< 2012 2013 2014 2015 2016 2017

Motor

control

Instrument

Cluster

General

Purpose

Next gen

Production

LL18UHV

Lighting

First

Sample Date

(left edge)

Product

Qualification

(right edge)

Proposal

Planning

Execution

S12VR

tba

S12ZVHxx

S12ZVL

S12ZVFP

S12ZVHY

S12ZVCxx High temp

(Grade 0)

No comms

(PWM-control)

PMSM/BLDC-Extension

CAN-Extension

S12VRxx

S12ZVM32

With LIN-PHY

With CAN-PHY

S12ZVML/C

25MHz, 48-64k

Relaydriven Windowlift

EMC/ESD-improved

BLDC / PMSM / 3-phase motor

50MHz, 32kB; 6ch GDU

50MHz

6ch GDU

32-128kB

H-Bridge predriver

Cluster-Extension

64-128kB, LCD, Gauge

64kB, LCD, Gauge

64kB, LCD

ambient/RGB-LED

ext/int LED-lighting

64-192kB; 32MHz

8-32kB; 32MHz

Page 10: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

10 TM

Production Proposal Planning Execution

Re

lay-d

rive

n

DC

-mo

tors

H-B

rid

ge

drive

n

DC

-mo

tors

Bru

sh

less D

C

Mo

tors

S12VR 48K-64KB; 32/48pin

LIN with PHY; LS-driver

S12ZVML 32-128KB; 64pin

LIN with PHY, 100nC S12ZVMC 64-128KB; 64pin

CAN, 100nC S12ZVM 32KB; 64pin; 100nC

S12ZVML 32-128KB; 64pin

LIN with PHY, 100nC S12ZVMC 64-128KB; 64pin

CAN, 100nC S12ZVM 32KB; 64pin; 100nC H-Bridge Predriver

With LIN-PHY

With MSCAN & 2nd Vreg

No comms (PWM-control)

With Userinterface

(HS-driver & HVI) Without Userinterface

High temp

(Grade 0)

Page 11: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

11 TM

SMTA (Surface Mount Technology Association):

• NMACPCs (Non-Material Assembly Cost Per Component) range from $0.01

to $0.10 per component assembled

• NMACPI/O (Non-Material Assembly Cost Per Input/Output) range from

$0.0005 to $0.005 per I/O assembled.

Multiple effects of eliminating ICs or passive components:

• PCB space

• Pick & place

• Testing at board level

• Inventory management

Page 12: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

12 TM

Tomar Carcassonne Knox

Pro

du

ct

sp

ecif

ic

ben

efi

ts

Bill of material

reduction

LIN phy

VREG + Vsense

2xLS for relays

2xHS

LIN phy

VREG + Vsense

Gate Driver

2xOp-amps

LIN phy

VREG +

Vsense

PCB Space 2-3cm2 2-6cm2 1-2cm2

Manufacturing

cost

- Fewer components to mount (pick & place)

- Less testing required for individual ICs

Gen

era

l

ben

efi

ts

Quality - Proven high volume LL18 base technology

- Fewer solder joints fewer points of failure

Logistics Fewer parts to qualify, source, store, track, etc…

Page 13: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 13

• S12 CPU with an integrated Voltage regulator, LIN

physical layer and HS/LS-drivers for Relay-driven

Windowlift-motor

Page 14: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

14 TM

4 HV

Inputs

48-64kB

Flash (ECC)

2 kB

RAM

512B

EEPROM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

S12 25MHz Bus 2 Low Side

Drivers

2 HS Drivers

Temp

Sense

10-Bit

ADC

Vsup

sense Vreg

70mA

LIN -PHY

SPI

1#

E-Vdd

SCI 1 SCI 0

TIM 16b

4ch

G

P

I

O

Vbat

sense

PWM 8ch 8b

or 4ch 16b

BDM KWU Win

Wdog

4 High Voltage

Inputs 12V Inputs for

Switch Monitoring

Routable to ADC

S12 CPU 16-bit,

compatible with

S12G Family

and existing SiP

Solutions.

ADC - up to 6 ext. Ch. +4 int. channels for temp

sense, supply monitors, HV

inputs, internal ref Voltages

EEPROM 512B EEPROM,

4 byte eraseable

On chip RC

OSC factory-

trimmed to +/-

1.3% , meets

LIN -needs

Up to 16 Wakeup pins Combined with Analog

Input pins and HV pins

Vbat and Vsup sense Supply sense before and

after protection diode

Up to 2 HS drivers For LED and Switch

supply

External Supply 5V / 20mA,Over curr. Ctrl

Eg. supplying Hallsensors

Packaging Options 32LQFP and 48LQFP

Voltage Regulator No Ext regulator needed

20mA to drive offchip

components

Flexible Flash

Options 48kB or 64kB

Flash version

2 Low-Side Drivers Protected LS Drivers to

drive brushed DC Motor

Relays

4ch 16bit Timer Hall inputs, SW timing

8ch PWM Routable to HS and LS

outputs, For LED lighting

SPI As alternative test Interf.

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

LIN Physical

Layer LIN 2.2 / 2.1

compliant

+/- 8kV ESD

capability

2 UARTs One linked to LIN Phy, 2nd

as independant Test Intf.

Page 15: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

15 TM

S12

Vreg

Temp

Sense

PLL

BDM

HVI

LIN

PHY

High

Side

Flash

EEPROM RAM

ADC

10bit

TIM

KWU

RTI

COP SPI

SCI0

SCI1

Ext. Osc

IRC

PWM

8ch

Low

Side

Relay

Driver

EVDD

Hallout

LIN

LG

ND

LIN

VS

EN

SE

Pinout representing functionality,

Physical pins location is not correct

VS

UP

LS1

LSGND

LS0 M M

Vbat

Hall

Sensor IOC

IOC

Switches HVI0

HS1

HVI1

HVI2

HVI3

HS0

Indicator

LED

Debug &

Programming

Connector

Altern.

SPI&UART

based Test

Connector

VD

DX

VD

DA

KWU

EVDD

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

Page 16: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 16

• 16-bit MCU with 12/5V voltage regulator, LIN physical

layer, and MOSFET pre-drivers for DC and BLDC

motors

Page 17: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

17 TM

VREG (8pin)

CAN or

LIN phy (8pin)

MCU

or

DSC (48pin)

Gate

Driver (48pin)

Op-amps

Full

Dis

cre

te

MCU

or

DSC (48pin)

ASIC (GDU+

VREG+

LIN+

Op-amps)

(48pin)

Sem

i In

tegra

ted

24+

20+

2+

2+

~50 pins less at

assembly

4 to 6 cm2 PCB

space savings

~30 pins less at

assembly

2 to 3 cm2 PCB

space savings

4cm

~1 ½ in.

Page 18: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

18 TM

LIN bus

based applications

BLDC / PMSM Motors DC Motors

CAN bus

based applications

PWM input

based applications

Multiple options to support different interface and motor types

Page 19: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

19 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

SCI 0 SCI 1

MSCAN

512B

EEPROM

(ECC)

32-128 KB

Flash (ECC)

S12Z 50MHz Bus

2-8kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

Vsup

sense Vreg

1#

E-Vdd

12-Bit

ADC

Temp

Sense

12-Bit

ADC

LIN -PHY

Current Sense

(2 x Op-Amp)

GDU 6ch MOS-FET-Predriver

Charge Pump

PTU 6ch PMF

(PWM)

TIM 16b

4ch

G

P

I

O

BDM

BDC KWU

Win Wdog

S12Z CPU 16-bit, 32b MAC,

linear addressing

Harvard architec.

compatible

within MagniV

2 x 12Bit ADC modules Simultaneous measurement

5+4ch. Ext . Plus 8ch int.

ADC with DMA

Vsup sense Monitoring supply voltage

External Supply 5V / 20mA source;

Over current control

Voltage Regulator Operating on car-battery

70mA total supply 6ch PMF (15bit PWM

with Fault-protection)

routed to GDU

LIN Physical

Layer LIN 2.2 / 2.1

compliant

+/- 8kV ESD

capability

AEC-Q100 Grade 0 Qual‘ed up to 150°C Ta

Charge Pump Supplying polarity

protection-MOS-FET

6-ch GDU 100nC total Gate charge

3-pgase Bridge predriver

2x Op-Amp for current

measurement / sensing

PTU Programmable

triggering unit.

Triggering

ADC/PWM

Page 20: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

20 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

SCI 0 SCI 1

MSCAN

512B

EEPROM

(ECC)

32-128 KB

Flash (ECC)

S12Z 50MHz Bus

2-8kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

Vsup

sense Vreg

1#

E-Vdd

12-Bit

ADC

Temp

Sense

12-Bit

ADC

LIN -PHY

Current Sense

(2 x Op-Amp)

GDU 6ch MOS-FET-Predriver

Charge Pump

PTU 6ch PMF

(PWM)

TIM 16b

4ch

G

P

I

O

BDM

BDC KWU

Win Wdog

S12Z CPU 16-bit, 32b MAC,

linear addressing

Harvard architec.

compatible

within MagniV

2 x 12Bit ADC modules Simultaneous measurement

5+4ch. Ext . Plus 8ch int.

ADC with DMA

EEPROM 512 Byte

EEPROM,

4 byte

eraseable

On chip RC

OSC factory-

trimmed to +/-

1.3% , meets

LIN -needs

Up to 18 Wakeup pins Combined with Analog

Input pins Vsup sense Monitoring supply voltage

External Supply 5V / 20mA source;

Over current control

Packaging Options 64-LQFP-EP

Voltage Regulator Operating on car-battery

70mA total supply

Flexible Flash

Options 32/64/128kB

Flash versions

Timer module - 4ch / 16Bit

6ch PMF (15bit PWM

with Fault-protection)

routed to GDU

SPI - As alternative test Interf

- Or for peripherals

(sensors, …)

LIN Physical

Layer LIN 2.2 / 2.1

compliant

+/- 8kV ESD

capability

2 UARTs One linked to LIN Phy, 2nd

as independant Test Intf.

AEC-Q100 Grade 0 Qual‘ed up to 150°C Ta

Charge Pump Supplying polarity

protection-MOS-FET

6-ch GDU 100nC total Gate charge

3-pgase Bridge predriver

MS-CAN 2.0A/B

2x Op-Amp for current

measurement / sensing

PTU Programmable

triggering unit.

Triggering

ADC/PWM

Page 21: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

21 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

SCI 0 SCI 1

MSCAN

512B

EEPROM

(ECC)

64-128 KB

Flash (ECC)

S12Z 50MHz Bus

4-8kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

Vsup

sense Vreg

1#

E-Vdd

12-Bit

ADC

Temp

Sense

12-Bit

ADC

5V Vreg

Current Sense

(2 x Op-Amp)

GDU 6ch MOS-FET-Predriver

Charge Pump

PTU 6ch PMF

(PWM)

TIM 16b

4ch

G

P

I

O

BDM

BDC KWU

Win Wdog

S12Z CPU 16-bit, 32b MAC,

linear addressing

Harvard architec.

compatible

within MagniV

2 x 12Bit ADC modules Simultaneous measurement

5+4ch. Ext . Plus 8ch int.

ADC with DMA

EEPROM 512Byte

EEPROM,

4 byte

eraseable

On chip RC

OSC factory-

trimmed to +/-

1.3% , meets

LIN -needs

Up to 18 Wakeup pins Combined with Analog

Input pins Vsup sense Monitoring supply voltage

External Supply 5V / 20mA source;

Over current control

Packaging Options 64-LQFP-EP

Voltage Regulator Operating on car-battery

70mA total supply

Flexible Flash

Options 64/128kB Flash

versions

Timer module - 4ch / 16Bit

6ch PMF (15bit PWM

with Fault-protection)

routed to GDU

SPI - As alternative test Interf

- Or for peripherals

(sensors, …)

2nd Vreg For powering

ext CAN-PHY

2 UARTs One linked to LIN Phy, 2nd

as independant Test Intf.

AEC-Q100 Grade 0 Qual‘ed up to 150°C Ta

Charge Pump Supplying polarity

protection-MOS-FET

6-ch GDU 100nC total Gate charge

3-pgase Bridge predriver

MS-CAN 2.0A/B

2x Op-Amp for current

measurement / sensing

PTU Programmable

triggering unit.

Triggering

ADC/PWM

Page 22: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

22 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

SCI 1

MSCAN

32KB

Flash (ECC)

S12Z 50MHz Bus

2kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

Vsup

sense Vreg

1#

E-Vdd

12-Bit

ADC

Temp

Sense

12-Bit

ADC

Current Sense

(2 x Op-Amp)

GDU 6ch MOS-FET-Predriver

Charge Pump

PTU 6ch PMF

(PWM)

TIM 16b

4ch

G

P

I

O

BDM

BDC KWU

Win Wdog

S12Z CPU 16-bit, 32b MAC,

linear addressing

Harvard architec.

compatible

within MagniV

2 x 12Bit ADC modules Simultaneous measurement

5+4ch. Ext . Plus 8ch int.

ADC with DMA

On chip RC

OSC factory-

trimmed to +/-

1.3% , meets

LIN -needs

Up to 18 Wakeup pins Combined with Analog

Input pins Vsup sense Monitoring supply voltage

External Supply 5V / 20mA source;

Over current control

Packaging Options 64-LQFP-EP

Voltage Regulator Operating on car-battery

70mA total supply

Flexible Flash

Options 32kB Flash

versions

Timer module - 4ch / 16Bit

6ch PMF (15bit PWM

with Fault-protection)

routed to GDU

SPI - As alternative test Interf

- Or for peripherals

(sensors, …)

2 UARTs One linked to LIN Phy, 2nd

as independant Test Intf.

AEC-Q100 Grade 0 Qual‘ed up to 150°C Ta

Charge Pump Supplying polarity

protection-MOS-FET

6-ch GDU 100nC total Gate charge

3-pgase Bridge predriver

MS-CAN 2.0A/B

2x Op-Amp for current

measurement / sensing

PTU Programmable

triggering unit.

Triggering

ADC/PWM

Page 23: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

23 TM

Flash /RAM Size 128 / 8 KB 64 / 4 KB 32 / 2 KB

Connectivity LIN CAN LIN CAN LIN PWM

Product Name S12ZVML128 S12ZVMC128 S12ZVML64 S12ZVMC64 S12ZVML32 S12ZVM32

Pin count 64 64 64 64 64 64

EEPROM (bytes) 512 512 512 512 512 0

LIN PHY 1 0 1 0 1 0

2nd VREG 0 1 0 1 0 0

GDU (HS / LS) 3 / 3 3 / 3 3 / 3 3 / 3 3 / 3 3 / 3

PWM channels 6 6 6 6 6 6

ADC (ext. channels) 4 + 5 4 + 5 4 + 5 4 + 5 4 + 5 4 + 5

MSCAN 1 1 1 1 1 0

SCI 2 2 2 2 2 1

SPI 1 1 1 1 1 1

TIM (IC/OC channels) 4 4 4 4 4 4

Page 24: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

24 TM

• Other considerations for HT option:

− Datasheet pending characterization. Potential de-rating of parameters:

IRC accuracy for LIN operation >1,3%

NVM write/erase performance/timing

− Embedded temp sensor can be used to adapt control strategies

M-Temp W-Temp

Max Ambient Temperature (Ta) 125C 150C

Max Junction Temperature (Tj) 150C 175C

Max CPU speed 50MHz 40MHz

Price adder vs V-Temp (Ta=-40/+105C) 5% 15%

AEC Qual Grade 1 Grade 0

Page 25: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

25 TM

S12ZVM Evaluation Board

RAppID ToolBox:

Rapid prototyping

with Matlab Simulink

Fre

eM

AS

TE

R:

-Gra

phic

al U

ser

Inte

rface

-Instr

um

enta

tion

Autosar

OS (SC1)

Customer Application Software

Math and Motor Control Libraries:

- Math functions

- Optimized Algorithms

LIN

2.1

Dri

vers

FSL production

Software FSL enablement

Software

3rd Party production

Software

BLDC

Motor

Co

dew

arr

ior

v10

.3:

Co

mpile

r an

d d

eb

ug

ge

r

P&E

MULTILINK

Hardware

Motor Control Dev Kit

Co

sm

ic W

inID

EA

:

Com

pile

r +

debugger

Application

framework:

Example code

NV

M D

rivers

LIN

Sta

ck

Processor Expert (integrated into CW):

-Graphical Init Tool

Page 26: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

26 TM

• Standard EVB - XS12ZVMx12EVB

Status: available

• S12ZVM PMSM/BLDC Motor Control Development Kit (covers HW & SW)

• Status:

• BLDC Sensorless – released

• PMSM Sensorless – in development

• Out-of-the-box experience for automotive customers using Freescale MCUs towards electrical motor control domain.

• Orderable from www.freescale.com

Page 27: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

27 TM

VBAT

G

P

I

O

S12Z

core

SPI

Wdog

TIM 4ch/16b

Vregs (5V VDD, VLS, VDD sensor)

PMF

6-ch

PWM

SCI

Temp

Sense

GDU

3 phase

H-Bridge

Predriver

LIN

Physical

Interface

Charge Pump 128 kB

Flash

8 kB RAM

512Bytes

EEPROM

SCI

PTU

PLL IRC

Ext Osc BDM

KWU

RTI

VBS1

VBS0

HG0

HS0

HS1

HS2

EVDD

VHD

M M

AMR/

GMR/

Hall

Sensor

AMRsin

AMRcos

Hallout VBS2

HG1

HG2

VL

SO

UT

+11V D

S

HD

CP

VCP XTAL

EXTAL

LIN

LIN

GN

D

IO/ MISO

IO/ MOSI

IO/ SCLK

IO/ SS

IO/IOC0

IO/IOC1

IO/ RXD0

IO/ TXD0

IO/ KWP0

IO/ KWP1

0V

+11V

BS

T

VS

UP

VS

SB

AN0_3

AN0_4

AN1_3

Hallout

AMRsin

AMRcos

VD

D

BK

GD

VS

S1

Reset

VS

S2

VS

SX

1

VD

DX

1

VD

DA

VD

DF

BC

TL

Dual 12bit ADC

5+4ch. Ext. (Mux‘d with Op-Amps)

+ 8ch. Int.

MSCAN

LG0

LG1

LS0

Shunt1

LG2

LS1

LS2

AM

PM

1

AM

PP

1

AM

P1

Current Sense

(2 x Op-Amp)

AM

PM

0

AM

PP

0

Shunt0

AM

P0

optional

VS

SA

IO/IOC2

IO/IOC3

VD

DX

2

VL

S0

VL

S1

VL

S2

Page 28: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 28

• General Purpose S12 MagniV 16-bit MCU with 12/5V

voltage regulator, LIN-physical layer

Page 29: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

29 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

TIM 16b

6+2ch 128B

EEPROM

(ECC)

8-32KB

Flash (ECC)

S12Z 32MHz Bus IIC

LIN-PHY 10-Bit

ADC

Temp

Sense

1kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

HV Input 1#

E-Vdd

1-3#

NGPIO

SCI 1 SCI 0

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

PWM 8ch 8b

or 4ch 16b

Vsup

sense

BDM

BDC KWU

Win Wdog

High Voltage

Input 12V Input for

Switch Monitoring

Routable to ADC

S12Z CPU 16-bit, 32b MAC,

linear addressing

Harvard architec.

compatible

within MagniV

ADC - up to 10 ext. Ch. +7 int. channels for temp

sense, supply monitors, HV

inputs, internal ref Voltages

ADC can directly write to

RAM (DMA)

EEPROM 128B

EEPROM,

4 byte

eraseable

On chip RC

OSC factory-

trimmed to +/-

1.3% , meets

LIN -needs

Up to 23 Wakeup pins Combined with Analog

Input pins and HV pins

Vsup sense Monitoring supply voltage

(sense after protection

diode)

External Supply 5V / 20mA source;

Over current control

Packaging Options 32-LQFP and 48-LQFP

32-QFN

Voltage Regulator Operating on car-battery

70mA total supply or 170mA

with external ballast

Flexible

Flash

Options 8/16/32kB

Flash version

2 Timer modules - 6ch / 16Bit

- 2ch / 16 Bit

8ch PWM Configurable to 8ch / 8Bit

or 4ch / 16Bit

SPI, IIC - As alternative test Interf

- Or for peripherals

(sensors, …)

LIN Physical

Layer LIN 2.2 / 2.1

compliant

+/- 8kV ESD

capability

2 UARTs One linked to LIN Phy, 2nd

as independant Test Intf.

NGPIO 1-3# 5V / 25mA sink

Eg. for RGB-LED

Page 30: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

30 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

5V

Switch

Bank

Backlight

Dials

Wakeup

12V

Switch

Automotive

Voltage

LIN Bus

SPI

TIM 16b

6+2ch 128B

EEPROM

(ECC)

8-32KB

Flash (ECC)

S12Z 32MHz Bus IIC

LIN-PHY 10-Bit

ADC

Temp

Sense

1kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

HV Input 1#

E-Vdd

1-3#

NGPIO

SCI 1 SCI 0

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

PWM 8ch 8b

or 4ch 16b

Vsup

sense

BDM

BDC KWU

Win Wdog

Page 31: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

31 TM

http://www.bmw.com/com/en/insights/technology

/technology_guide/articles/rain_sensor.html 5V Supply

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

SPI

TIM 16b

6+2ch 128B

EEPROM

(ECC)

8-32KB

Flash (ECC)

S12Z 32MHz Bus IIC

LIN-PHY 10-Bit

ADC

Temp

Sense

1kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

HV Input 1#

E-Vdd

1-3#

NGPIO

SCI 1 SCI 0

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

PWM 8ch 8b

or 4ch 16b

Vsup

sense

BDM

BDC KWU

Win Wdog

Rain /

Light

Sensor

ASIC

Automotive Voltage

LIN Bus

Page 32: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

32 TM

S12Z

Vreg

Temp

Sense

PLL

BDM

LIN

PHY

Flash

EEPROM RAM

ADC

10bit

RTI COP

SCI0

Ext. Osc

IRC

VDDX

LIN_In

VD

DS

VD

DX

GPIO

LIN Master

VSUP

PWM

3x16bit

Verpolschutz BC

TL

3x20mA

RGB LED

S12ZVL16/32

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

Page 33: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 33

• General Purpose S12 MagniV 16-bit MCU with 12/5V

voltage regulator, CAN-physical layer

Page 34: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

34 TM

1-2kB

EEPROM

(ECC)

64-192kB

Flash (ECC)

S12Z 32MHz Bus

CAN-PHY 12-Bit

ADC

Temp

Sense

4-8kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

2 HV Input 1#

E-Vdd

2 x SCI MSCAN

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

Vsup

sense

2x

SPI IIC

Sent tx

4 Open

Drain

BDM

BDC KWU

Win Wdog

2ch ACMP

With 1x6-Bit-DAC

Vreg for CAN PHY

with ext. ballast

HR-PWM

4ch16b

PWM

4ch16b

HR-Tim

4ch16b

Tim

8ch16b

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

2 High Voltage

Inputs 12V Inputs for

Switch Monitoring

Routable to ADC

12Bit ADC

up to 16 ext. Ch. +8ch int. for temp sense, HV

inputs, monitoring. ADC can

directly write to RAM (DMA)

Vsup sense Monitoring supply voltage

(sense after protection

diode)

External Supply 5V / 20mA source;

Over current control

Voltage Regulator Operating on car-battery

70mA total supply or 170mA

with external ballast

2 Timer modules 4ch/16bit 16ns resolution

2 PWM modules 4ch/16bit 16ns resolution

CAN Physical

Layer (HighSpeed)

Supporting

dominant Txd

timeout

SENT (tx) Sent Transmitter Module

2nd Voltage Regulator For CAN-Phy-supply

2 Analog Comparators With internal DAC

AEC-Q100 Grade 0 Qual‘ed up to 150°C Ta

Page 35: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

35 TM

CAN

BUS

Automotive Voltage

5V Supply

CAN-

PHY

VREG for tot. supply: • 70mA w/o ext comp. or

• 170mA with ext. ballast

Memory

S12Z 32MHz

NOX-

Sensor

Particle

Sensor

Humidity/Air

Mass

Hydrocarbo

n-Sensor

Urea-Sensor

Hi-temp

Sensor

MS-CAN

SPI

12-Bit

ADC

GPIO

HVIs

PWM

Timer

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

Page 36: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 36

Most integrated solution for the

instrument cluster market at the

best price

S12 MagniV portfolio simplifies system design with easy-to-use, expertly integrated mixed-signal MCUs for automotive applications

Core Efficiency – S12Z core performance improves code density which reduces system flash requirements Ease of Use – In addition to excellent support, availability of a full featured reference design and enablement facilitates ease of use and faster time to market

Improved Reliability – Reducing the number of components in a system greatly improves reliability, requires less power which provides a greener footprint

Page 37: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

37 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

4kB

EEPROM

(ECC)

64-128kB

Flash (ECC)

S12Z 32MHz Bus

CAN-PHY 10-Bit

ADC

Temp

Sense

4-8kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

2 x SCI MSCAN

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

Vsup

sense

SPI IIC

4 Open

Drain

BDM

BDC

19-24

KWU

Win Wdog

Vreg for CAN PHY

with ext. ballast

PWM

4ch16b

Tim

8ch16b

Tim

8ch16b

RTC

2-4 Stepper Motors

with SSD

Segment LCD

(Up to 4x40)

Vbat sense

Sound-

generator

1#

E-Vdd

External Supply 5V / 20mA source;

Over current control

Voltage Regulator Operating on car-battery

70mA total supply or 170mA

with external ballast

CAN Physical

Layer (HighSpeed)

2nd Voltage Regulator For CAN-Phy-supply

2-4 Stepper motor driver with stall detection (Gauge)

Realtime Counter with

calendar

Vbat and Vsup sense Supply sense before and

after protection diode

LCD controller 4x32 or 4x40 segment

Simple monotoneous sound

generator

32kHz

Osc

Page 38: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

38 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

1-2kB

EEPROM

(ECC)

32-64kB

Flash (ECC)

S12Z 32MHz Bus

10-Bit

ADC

Temp

Sense

2-4kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

2 x SCI MSCAN

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

Vsup

sense

SPI IIC

4 Open

Drain

BDM

BDC KWU

Win Wdog

PWM

4ch16b

Tim

8ch16b

Tim

8ch16b

RTC

2 Stepper Motors

with SSD

Segment LCD

(Up to 4x40)

Vbat sense

Sound-

generator

1#

E-Vdd

External Supply 5V / 20mA source;

Over current control

Voltage Regulator Operating on car-battery

70mA total supply or 170mA

with external ballast

2-4 Stepper motor driver with stall detection (Gauge)

Realtime Counter with

calendar

Vbat and Vsup sense Supply sense before and

after protection diode

LCD controller 4x32 or 4x40 segment

Simple monotoneous sound

generator

32kHz

Osc

Page 39: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

39 TM

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

2kB

EEPROM

(ECC)

64kB

Flash (ECC)

S12Z 32MHz Bus

LIN-PHY 10-Bit

ADC

Temp

Sense

4kB

RAM

(ECC)

PLL RCosc.

+/-1.3%

Pierce

Osc.

2 x SCI MSCAN

G

P

I

O

Vreg

70, or up to 170mA

with ext. Ballast

Vsup

sense

SPI IIC

4 Open

Drain

BDM

BDC KWU

Win Wdog

PWM

4ch16b

Tim

8ch16b

Tim

8ch16b

RTC

8 High Current

Outputs (20mA)

Segment LCD

(Up to 4x40)

Vbat sense

Sound-

generator

1#

E-Vdd

LIN Physical

Layer LIN 2.2 / 2.1

compliant

+/- 8kV ESD

capability Up to 8 pins with high

current drive capability

32kHz

Osc

Page 40: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

40 TM

LCD drive

4x40

CAN

Timer

(Input Capture)

16bit x 8ch

ADC

10-bit,

8-ch on pins

CAN PHY

4 x Stepper

Motor Drivers

(w/ SSD)

Coolant Temp

Speedometer

Tachometer

Fuel Level

GPIO

12V switches

(e.g.- L/R/Cancel)

SPI

Fuel Level

Input

Speed

RPM

CAN Bus

SSGM

4x40 Segment LCD

Vreg Vsup

Ignition

Signal

Condi-

tioning

LUMEN

4WL 128k Flash

(ECC)

4k EEPROM

(ECC)

8k RAM

S12Z CPU

Amp

5V

Vbat

Vsup

5V

Temperature

Sensor

Ballast Transistors

OSC

32 kHz

2xSCI

IIC

OSC

4-16 MHz

Internal

RC OSC

Timer

16bit x 8ch

RTC

PWM

8b,6ch /

16b, 3ch

Vddc

Typical MCU

S12ZVH Integration

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

Page 41: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 43

• LL18UHV = Monolithic HV technology built upon

proven high volume standard CMOS process

• Enables smaller and smarter sensors and actuators

applications

• Improves Quality

• While reducing total cost of ownership

Page 42: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM 44

• New S12Z-core with 24-bit linear address room and

improved mathematic capabilities

Page 43: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

45 TM

Improved Performance for

Motor Control

• 24-bit linear address map to ease

software development and porting

• Instructions/addressing optimized for C

programming

• Added 8- and 32-bit registers allow

further compiler code size optimization

3x

Improved Software

Friendliness

• 100 MHz CPU

@ 50 MHz bus

speed

• Harvard

architecture

accelerates

data handling

• Improved standard math instructions (32bit MAC)

• Fractional math instructions added

• Advanced Register set optimized to achieve less

memory access (improves current consumption)

Page 44: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

46 TM

• Harvard Architecture – Parallel data & code accesses

• CPU operates at 100MHz

• Fractional Math support

• Instructions/addressing optimized for C programming

• Register set optimized to reduce code size and memory access

Instructions and Addressing optimized for C-programming

Attribute S12Z S12XE

Shifter 32-Bit multi-bit 1 cycle 16-bit single-bit 2 cycles

Multiplier 32*32 2.5 cycles

16*16 1 cycle

--

16*16 1 cycle

Divider 32 = 32/32 18.5 cycles 32 = 32/16 11 cycles

MAC 32 += 32*32 3.5 cycles 32 += 16*16 13 cycles

Fractional math support Yes No

Bus speed 50MHz 50MHz

Page 45: S12 MagniV, the New Freescale 16-bit MCU Family Based on a ......KWU protection Win Wdog S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV 2 x

TM