RTL Design (2)

Memory Components

(RAMs & ROMs)

N

Memory Components

� All sequential circuit have a form of memory� Register, latches, etc

� However, the term “memory” is generally reserved for bits that are stored in a structured way.

� Memory components are generally instantiated outside of the controller and data path.

� Memory components are generally differentiated from disk storage� The RAM of a computer is the memory, not the hard

disk.

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Early Storage

� In the early days of digital circuits, memories did not exist.

� Bits were stored on a magnetic drum or disk� To read or write an address, the disk or drum has to

be rotated to the correct spot.� This was a slow process

� Bits were accessed serially.� Most hard drives still operate in this fashion.

� Memories were a major evolution over disks and drums� Any address could be accessed in any order

� Access was no longer serial.

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Memory Terminology

� Address� A code used to identify a storage location

� Word� A data element stored at a memory location.

� Word length� The number of bits that can be stored in a word.

� In most modern architectures, a word is 32-bits.

� A microprocessor may have an 8-bit word.

� M x N� M is the number of words

� N is the word length

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RAM –

Random Access Memory� A RAM is a memory structure that allows random (i.e. not

sequential) access to each word (data element) stored in the memory.

� RAM is logically structured the same as a register file� Less than approximately 512 � 1024 words

� Register File

� Greater than approximately 512 � 1024 words� RAM

� Ports� Most RAMs have a single bi-directional port that is used for both reading and

writing

� Most register files are dual ported

� Storage elements differ between register files and RAMs� RF’s use registers

� Memories need smaller elements due to the large size of the device.� We will discuss two types.

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RAM

� Due to the large size of RAMs, physical layout is important� Square shapes are most efficient to minimize wire

lengths.� Shorter wires mean smaller delays

� RAM layout is broken into word lines and bit lines� Word lines turn on all storage elements that

correspond to the word

� Each storage element is connected to a bit line where data is read and written.

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RAM Symbol

� data is bi-directional

� addr is the address of the word we wish to operate on.

� rw indicates our operation� 1 is write

� 0 is read

� en enables the requested operation.

32

10

data

addr

r w

en

1024x32

RAM

RAM Schematic

� Larger designs replicate this simple structure and enable multiple words with a single word line.� A demux is used to choose the output bits of the desired word.

32

10data

addr

rw

en

1024x32RAM

addr0addr1

addr(A-1)

clk

enrw

Let A = log2M

to all cells

wdata(N-1)

rdata(N-1)

wdata(N-2)

rdata(N-2)

wdata0

rdata0

bit storageblock(aka “cell”)

word

word

RAM cell

wordenable

wordenable

rw

data cell

data

a0a1

d0

d1

d(M-1)

a(A-1)

e

AxMdecoder

enable

rw

data(N-1) data0

wd

ata

(N-1

)

rda

ta0

rda

ta

(N-1

) wd

ata

0

Combining rd and wr

data lines

1

Static RAM (SRAM)

� Inverters create a bi-

stable storage

element

� Transistors are used

to enable access to

the cell.

� Both data and data’

must be provided to

write a value to the

cell.

data data’

d’dcell

0wordenable

1

SRAM Operations

� Write

1. Place the desired

value on the bit lines.

2. Enabled the word

line.

3. New values pass

through the

transistors and

overwrite the old

values.

1

1

1

0

0

data data’

d

wordenable

1

SRAM Operations

� Read1. Precharge both data

and data’ to 1.

2. Enable the word line.

3. Stored values cause the precharged values to raise (for a stored 1) or drop (for a stored 0).

4. A sense amplifier reads the difference of the two lines to determine the value.

data data’

d

1

1 1

wordenable

To sense amplifiers

1 0

1 <1

1

Dynamic RAM (DRAM)

� Value is stored as a

charge on the

capacitor.

� Charge must be

periodically restored

due to parasitic

resistance.

� Very compact storage

method.

word

enable

data

cell

dcapacitorslowly

discharging

1

DRAM Operations

� Read1. Pre-charge the word line with a voltage halfway

between 0 and 1.

2. Enable the word line.� The stored value alters the bit line voltage,

discharging the cap.

3. Sense the voltage change to determine the value.

4. Write the previous value back to restore the cap’s charge.

1

DRAM Operations

� Write

1. Set data to the desired value.

2. Enable the word line.

� Capacitor is charged (1) or discharged (0).

3. Parasitic resistance starts to discharge the

capacitor

� Large capacitors are used to make this a slow

process.

1

DRAM Operations

� Refresh� Due to parasitic

resistances, the value stored on a cap drains over time.

� Periodically, all storage cells must be refreshed:

1. Read the value

2. Write it back

� The requirement for a refresh means that dynamic RAM cells are slower than SRAM cells.

� Speed is traded for reduced size.

data

enable

discharges

1

Comparing Memory Types

� Register file

� Fastest

� But biggest size

� SRAM

� Fast

� More compact than register file

� DRAM

� Slowest� And refreshing takes time

� But very compact

� Use register file for small items, SRAM for large items, and DRAM for huge items

� Note: DRAM’s big capacitor requires a special chip design process, so DRAM is often a separate chip

MxN Memoryimplemented as a:

registerfile

SRAM

DRAM

Size comparison for same

number of bits (not to scale)

1

RAM Timing

� RAMs have setup and hold timing

requirements.

� Access time is the propagation delay for

reading a value.

Reading and Writing a RAM

� Writing� Put address on addr lines, data on data lines, set rw=1, en=1

� Reading� Set addr and en lines, but put nothing (Z) on data lines, set rw=0

� Data will appear on data lines

� Don’t forget to obey setup and hold times� In short – keep inputs stable before and after a clock edge

� Access time is the propagation delay for reading a value.

clk

addr

data

rw

en

1 2

9 913

999 Z 500500

3

1 means write

RAM[9]now equals 500

RAM[13]now equals 999

(b)

valid

valid

Z 500

accesstime

setuptime

holdtime

setuptime

clk

addr

data

rw

1

ROM – Read Only Memory

� ROMs are a type of memory that can only be read.� The act of writing initial values to a ROM is called

programming.

� Advantages over RAM:� More Compact – very simple storage elements

� Non-volatile – values are stored ever when power is removed.

� Increased Speed

� Low Power

� Several different storage elements can be used.

1

ROM Symbol

� data is read only.

� addr is the address of

the word we wish to

read.

� en enables the a read

operation.

32

10data

addr

en

1024x32ROM

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ROM Schematic

� Internal logical structure similar to RAM,

without the data input lines

32

10data

addr

en

1024x32ROM

ROM block symbol

ROM cell

addr0addr1

addr(A-1)

clk

en

addr

Let A = log2M

a0a1

d0

d1

d(M-1)

a(A-1)

e

AxMdecoder

wordenable

rdata(N-1) rdata(N-2) rdata0

bit storageblock(aka “cell”)

word

wordenable

wordenable

data

data

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ROM Storage Types

� Mask Programmed

� ROM is programmed at the

time of manufacture by

hardwiring values.

� Most compact type of

ROM.

� Very fast

� Impossible to change

without expensive

redesign.

� word enable (from

decoder) simply passes the

hardwired value through

transistor

cell cell

word

enable

data line data line01

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ROM Storage Types

� Fuse-Based

Programmable ROM

(PROM)

� One Time

Programmable (OTP)

� Fuses a blown to

disable connections

(programs a zero).

� ROM must be

replaced to change

stored values.

cell cell

wordenable

data line data line11

blown fusefuse

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ROM Storage Types

� Erasable PROM (EPROM)� Utilizes a “floating gate”

transistor.� Transistor has two gates. The

floating gate has no electrical connections and is surrounded by high impedance insulation.

� Unprogrammed, a floating gate transistor operates as normal.

� Stores a 1

� Programming involves placing a large voltage on the gate to trap electrons in the floating gate, disabling it’s ability to conduct.

� Stores a 0

� Programming can be erased by exposure to UV light

� Gives electrons enough energy to escape.

cell cell

wordenable

data line data line

e- e-

trapped electrons

1

floating-gate

transistor

10

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ROM Storage Types

� Electrically Erasable PROM (EEPROM)� Like an EPROM, but thinner insulation around the floating gate

allows it to be de-programmed with a high negative voltage.

� Programming is slow.

� At this point, ROMs start to resemble RAMs.

� Flash Memory� A type of EEPROM

� Words are organized in blocks

� All words in a block can be erased quickly

� Both types are in-system programmable

� Can be programmed with new stored bits while in the system in

which the ROM operates

� Requires bi-directional data lines, and write control input

� Also need busy output to indicate that erasing is in progress – erasing

takes some time

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EEPROM Symbol

� data is bi-directional

� addr is the address of the word we wish to operate on.

� en enables the a read operation.

� write = 1 write the value of data at the address.

� busy = 1 indicates that programming is not yet complete.

32

10data

addr

en

write

busy

1024x32EEPROM