RS9110-N-11-02 Module Integration Guide Version 1.39 September

Redpine Signals, Inc. Proprietary and Confidential

RS9110-N-11-02 Module Integration Guide

VVeerrssiioonn 11..3399 September 26th 2011

Redpine Signals, Inc. 2107 N. First Street, #680

San Jose, CA 95131.

Tel: (408) 748-3385

Fax: (408) 705-2019 Email: [email protected]

Website: www.redpinesignals.com

Redpine Signals Inc. Proprietary and Confidential Page 2

RRSS99111100--NN--1111--0022

MMoodduullee IInntteeggrraattiioonn GGuuiiddee

VVeerrssiioonn 11..3399

About this Document:

The RS9110-N-11-02 is an 802.11n single-stream module with built-in MAC/BBP, RF and PA, and front-end components. It interfaces to a host

processor through an SDIO or SPI interface. This document provides

information that may be used while integrating the module into an end solution.


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Table of Contents

1 Reference Schematics ....................................................... 4

1.1 SDIO Interface ................................................................... 4

1.2 SPI Interface...................................................................... 5

2 Bill of Materials ................................................................. 7

2.1 SDIO Interface Integration ................................................. 7

2.2 SPI Interface Integration.................................................... 8

3 Recommended RS9110-N-11-02 PCB Landing Pattern .... 10

4 Circuit and Layout Guidelines .......................................... 11

5 Chip Antenna Layout Recommendations.......................... 13

5.1 Antenna Matching Network............................................... 14

6 Reference Oscillator Specifications ................................. 16

6.1 List of Recommended Crystal Oscillators ........................... 17

7 Recommended Specifications for Schottky Diode ............ 18

7.1 Recommended Parts ......................................................... 18

8 Sample Layout................................................................. 19

8.1 Layer 2 ............................................................................. 20

8.2 Layer 3 ............................................................................. 20

8.3 Bottom Layer.................................................................... 21

8.4 Component Placement ...................................................... 21

9 Appendix ......................................................................... 22

9.1 SDIO connectivity for Windows OS.................................... 22

Redpine Signals, Inc. Proprietary and Confidential

1 Reference Schematics

The following is a reference circuit schematic of an Evaluation Board using RS-9110-N-11-02 WLAN Module. The schematics show both SDIO and SPI Host Interface options. The layout corresponding to this schematic is also shown in this document

as a reference

1.1 SDIO Interface

C30.1uF

PSPI_CSN1

PSPI_MISO

PSPI_MOSI

PSPI_CLK

Microwave switch is used for evaluating

the standalone Transmit/Receiveperformance of the WLAN module byproviding direct connectivity to Signalgenerator/Analyzer through RF cable

D1LED

UA

RT

2_

IN

SL

EE

P_

CL

K_

X1

SL

EE

P_

CL

K_

X1

Z1 , Z2, Z3 form the tuning network

for matching the impedance of theAntenna. The values depend uponthe layout. In case tuning network isnot implemented Z1 should be

placed as 8.2pF as default

XTAL_EN

Redpine Signals Confidential

C11

0.1uF

11

22

FB4

BEAD

VDD_EXT

C61uF

VRF33

11

22

FB2

BEAD PSPI_MISO

GPIO_0

BT_PRIORITY

PSPI_MOSI

VIN33

SPI Serial Flash

NOTE::If required C7 can be increased to22uF for further improving the Transmit

EVM

WL

AN

_A

CT

IVE

BT

_A

CT

IVE

PSPI_CLK

CE#1 SCK6 SI5 SO2

VDD8HOLD7WP#3VSS4

U3

SST25VF016B-75-4I-QAF-TL1

4.7uH

VDD_EXT

C14

10uF

PSPI_CSN1

VDD_EXT

OPTIONAL

SD

IO_

DA

TA

0

DVDD33

VMOD

SD

IO_

CM

D

SD

IO_

CL

K

SD

IO_

DA

TA

3

C8

0.1uF

SD

IO_

DA

TA

2

SD

IO_

DA

TA

1

VRF33

Power Supply Filter Section

C100.1uF

Tantalum

R84.7K

Tantalum

11

22

FB3

BEAD

11

22

FB5

BEAD

Mating Connector Part No::MXHS83QH3000

C13

0.1uF

ANT11

ANT22

ANT1

ANT-2.45G

I2C

_S

DA

ANTIN3

ANTOUT4

GN

D1

GN

D2

GN

D5

GN

D6

J2

MM8430-2610RA1

C58.2pF

I2C

_S

CL

R3 820E

CL

K_

RE

F

UART1_RTS

UART1_CTS

XTAL_IP_EN

GPIO_1

RE

SE

T_

n

HOST_WAKEUP_INT

UART1_OUT

UART1_IN

UART2_OUT

VMODC4

10uF

802.11bgn WLAN Module

C1222uF(CASE B)

VDD_EXT

C710uF(CASE B) RESET_n

C90.1uF

VIN33

RESET Circuitry

R7 100K

CLK_REF

Make:: TXC

OE1

GND2

OUT3

VDD4

U1

7C40000192 C12.2uF

XTAL_ENXTAL_ENXTAL_ENXTAL_EN

R1 33E VRF2811

22

FB1BEAD

Reference Clock Circuitry

TP1

Place Z1-Z3 Close

together and near toANT1

SDIO_CLKSDIO_DATA1

SDIO_DATA3

SDIO_DATA0

CD/DAT31

CMD2

VSS13

VDD4

CLK5

VSS26

DAT07

DAT18

DAT29 J1

SDIO Interface Connector

SDIO_DATA2

SDIO_CMD

VIN33

C210uF

R25**

SL

EE

P_

CL

K_

X2

R25** value should be adjusted basedon driver output impedance and PCBTrace Impedance,,(33E is Nominal)

TD

OR6

1K

Z1TBD

Z3TBD DVDD33Z2

TBD

Title

Size Document Number Rev

Date: Sheet of

<Doc>

RS9110-N-11-02 SDIO - Reference Schematics

Custom

2 2Tuesday, September 20, 2011

R5

1K

50 Ohm RF line

CMS02D2

R4

1K

Note:

Microwave coaxial

connector with switch

Rev6.1

Ver6.1

VRF28RF Out Circuitry

AGND56

RF_OUT57

AGND58

GND25

NC

1

DVDD3317

PS

PI_

CS

N0

40

LED_ON24

MODE_SEL_151

VRF2852

XTAL_EN23

RE

F_

CL

K1

4

PSPI_CSN146

SL

EE

P_

CL

K_

X1

35

SL

EE

P_

CL

K_

X2

34

I2C

_S

CL

6

I2C

_S

DA

7

GND30

GND26

RE

SE

Tn

15

NC

41

WL

AN

_A

CT

IVE

31

BT_PRIORITY29

SL

EE

P_

CL

K_

IN3

2

HOST_WAKEUP_INT53

NC

42

VR

F3

34

3

VR

F3

34

4

SD

IO_

DA

TA

3/S

D3

13

SD

IO_

DA

TA

2/S

PI_

INT

R1

2

SD

IO_

DA

TA

1/S

PI_

MIS

O1

1

SD

IO_

DA

TA

0/S

PI_

MO

SI

10

SD

IO_

CM

D/S

PI_

CS

9

SD

IO_

CL

K/S

PI_

CL

K8

GPIO_155

GN

D1

6

VINBCKDC27

VIN

LD

OP

12

33

9

FB

DC

1P

33

8

VO

UT

BC

KD

C1

P3

37

UA

RT

2_

IN3

6

UART1_RTS22

UART1_CTS21

UART1_OUT18

UART1_IN19

TC

K2

TD

I3

TM

S4

TD

O5

XTAL_EN_IP54

GPIO_028

BT

_A

CT

IVE

33

UART2_OUT20

PSPI_MISO47

GN

D4

5

MODE_SEL_050

PSPI_CLK49

PSPI_MOSI48

U2

RS9110-N-11-02

Figure 1 SDIO Interface Integration

NOTE: Pull up resistors should be present on SDIO CMD & SDIO Data lines according to the section 6.6.5 of SD physical layer

specification, version 2.00


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1.2 SPI Interface

C30.1uF

PSPI_CSN1

PSPI_CLK

PSPI_MOSI

PSPI_MISO

Microwave switch is used for evaluatingthe standalone Transmit/Receiveperformance of the WLAN module byproviding direct connectivity to Signalgenerator/Analyzer through RF cable

D1LED

UA

RT

2_IN

SLE

EP

_C

LK

_X

1S

LE

EP

_C

LK

_X

1

Z1 , Z2, Z3 form the tuning networkfor matching the impedance of theAntenna. The values depend uponthe layout. In case tuning network isnot implemented Z1 should beplaced as 8.2pF as default

XTAL_EN

Redpine Signals Confidential

C11

0.1uF

11

22

FB4

BEAD

VDD_EXT

C61uF

11

22

FB2

BEAD

VRF33

PSPI_MISO

SPI Serial Flash

VIN33

PSPI_MOSI

BT_PRIORITY

GPIO_0

CE#1 SCK6 SI5 SO2

VDD8HOLD7WP#3VSS4

U3

SST25VF016B-75-4I-QAF-TL1

4.7uH

PSPI_CLK

BT

_A

CT

IVE

WLA

N_A

CT

IVE

C14

10uF

VDD_EXT

VDD_EXT

PSPI_CSN1

OPTIONAL

VMOD

DVDD33

SP

I_M

OS

I

C8

0.1uF

SD

3

SP

I_C

LK

SP

I_C

S

C100.1uF

Power Supply Filter Section

VRF33

SP

I_M

ISO

SP

I_IN

TR

R84.7K

Tantalum

11

22

FB3

BEAD

11

22

FB5

BEAD

Tantalum

C13

0.1uF

Mating Connector Part No::MXHS83QH3000

ANT11

ANT22

ANT1

ANT-2.45G

ANTIN3

ANTOUT4

GN

D1

GN

D2

GN

D5

GN

D6

J2

MM8430-2610RA1

C58.2pF

I2C

_S

DA

I2C

_S

CL

R3 820E

CLK

_R

EF

UART1_RTS

UART1_CTSGPIO_1

XTAL_IP_EN

HOST_WAKEUP_INT

AGND56

RF_OUT57

AGND58

GND25

NC

1

DVDD3317

PS

PI_

CS

N0

40

LED_ON24

MODE_SEL_151

VRF2852

XTAL_EN23

RE

F_C

LK

14

PSPI_CSN146 S

LE

EP

_C

LK

_X

135

SLE

EP

_C

LK

_X

234

I2C

_S

CL

6

I2C

_S

DA

7

GND30

GND26

RE

SE

Tn

15

NC

41

WLA

N_A

CT

IVE

31

BT_PRIORITY29

SLE

EP

_C

LK

_IN

32

HOST_WAKEUP_INT53

NC

42

VR

F33

43

VR

F33

44

SD

IO_D

AT

A3/S

D3

13

SD

IO_D

AT

A2/S

PI_

INT

R12

SD

IO_D

AT

A1/S

PI_

MIS

O11

SD

IO_D

AT

A0/S

PI_

MO

SI

10

SD

IO_C

MD

/SP

I_C

S9

SD

IO_C

LK

/SP

I_C

LK

8

GPIO_155

GN

D16

VINBCKDC27

VIN

LD

OP

123

39

FB

DC

1P

338

VO

UT

BC

KD

C1P

337

UA

RT

2_IN

36

UART1_RTS22

UART1_CTS21

UART1_OUT18

UART1_IN19

TC

K2

TD

I3

TM

S4

TD

O5

XTAL_EN_IP54

GPIO_028

BT

_A

CT

IVE

33

UART2_OUT20

PSPI_MISO47

GN

D45

MODE_SEL_050

PSPI_CLK49

PSPI_MOSI48

U2

RS9110-N-11-02

UART1_IN

UART1_OUT

UART2_OUT

VMODC4

10uF

802.11bgn WLAN Module

C1222uF(CASE B)

VDD_EXT

C710uF(CASE B) RESET_n

C90.1uF

VIN33R7 100K

RESET Circuitry OPTIONAL

CLK_REF

Make:: TXC

OE1

GND2

OUT3

VDD4

U1

7C40000192 C12.2uF

R1 33E

XTAL_ENXTAL_ENXTAL_ENXTAL_EN

VRF2811

22

FB1BEAD

Reference Clock Circuitry

MODE_SEL_1MODE_SEL_1

TP1

Place Z1-Z3 Closetogether and near toANT1

SPI_CLKSPI_MISO

SD3

SPI_MOSI

CD/DAT31

CMD2

VSS13

VDD4

CLK5

VSS26

DAT07

DAT18

DAT29 J1

SPI Interface Connector

SPI_CS

SPI_INTR C210uF

R25**VIN33

SLE

EP

_C

LK

_X

2

NOTE::If required C7 can be increased to22uF for further improving the TransmitEVM

R25** value should be adjusted based

on driver output impedance and PCBTrace Impedance,,(33E is Nominal)

TD

OR6

1K

Z1TBD

Z3TBD

Z2TBD DVDD33

Title

Size Document Number Rev

Date: Sheet of

<Doc>

RS9110-N-11-02 SPI - Reference Schematics

Custom

2 2Monday, September 26, 2011

R5

1K

CMS02D2

50 Ohm RF line

R2

3.9K to 4.75K

R4

1K

Note:

RE

SE

T_n

RE

SE

T_n

RE

SE

T_n

RE

SE

T_n

Microwave coaxial

connector with switch

Rev6.1

Ver6.1

FROM HOST

RF Out CircuitryVRF28

Figure 2 SPI Interface Integration


RRSS99111100--NN--1111--0022



NOTE on SPI_CS and SPI_CLK: -

Based on the Host SPI configuration, during BOOT UP, SPI Master could be coming up as GPIO pins.In the wake of this possibility, it may be needed to add a pull up on the SPI_CS and a pull up (CPOL=1)/pull down(CPOL=0) on the SPI_CLK. The value of pull up/ pull

down resistor should follow the recommendations as given on the HOST side.


RRSS99111100--NN--1111--0022



2 Bill of Materials

2.1 SDIO Interface Integration

Item Qty Reference Value Description Jedec Mfg/ Part No

CAPACITORS

1 1 C5 8.2pF CER CHP C 8.2P +-0.25P C0G 0402 25V LF 0402 Murata GRM1555C1H8R2CZ01D

2 5 C3,C8,C9,C11,C13 0.1uF CER CHIP C 0.1U 10% X5R 0402 6.3V 0402 Murata GRM155R61A104KA01D

3 1 C1 2.2uF CER CHIP C 2.2U 20% X5R 0402 4V 0402 Murata GRM155R60G225ME15D

4 1 C6 1uF CAP CER 1.0UF 16V 10% X7R 0805 0805 Murata GRM21BR71C105KA01L

5 3 C2,C4,C14 10uF CER CHIP C 10U 20% X5R 0805 10V 0805 Murata GRM21BR61A106KE19L

6 1 C7 10uF CAP TANTALUM 10UF 6.3V 10% SMD CASE-B AVX TAJB106K006RNJ

7 1 C12 22uF CAP TANTALUM 22UF 6.3V 20% SMD CASE-B Kemet B45196H1226M209

RESISTORS

8 2 R1,R25** 33E CHIP RES 33R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ330X

9 1 R3 820E CHIP RES 820R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ821X

10 3 R4,R5,R6 1K RES 1.0K OHM 1/16W 5% 0402 SMD 0402 Yageo RC0402JR-071KL

11 1 R7 100K CHIP RES 100K 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ104X

INDUCTORS

12 1 L1 4.7uH Power Inductor 2520 FDK MIPF2520D4R7

13 5 FB1,FB2,FB3,FB4,FB5 BEAD Ferrite Beads 0805 Murata BLM21PG221SN

DIODES

14 1 D1 LED Green LED 0603 Lite-On Inc LTST-C190KGKT

15 1 D2 CMS02 Schottky Diode SMD Toshiba CMS02TE12L,Q

ANTENNA TUNING NETWORK

16 1 Z1,Z2,Z3 TBD Refer to the description in the schematic.

Sample part number for Z1 given here.

Murata GRM1555C1H8R2CZ01D

IC'S

17 1 U1 40MHz Crystal Oscillator TXC 7C40000192


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18 1 U2 RS9110-N-11-02 802.11bgn WLAN Module Redpine RS9110-N-11-02

19 1 ANT1 Antenna 2.45GHz SMD Antenna Antenna Factor ANT-2.45-CHP-T

20 1 J1 5X2 Box Header Burg Header

21 1 J2 Microwave Coaxial Connector with switch Murata MM8430-2610RA1

NO POPULATE

22 1 C10 0.1uF CER CHIP C 0.1U 10% X5R 0402 6.3V 0402 Murata GRM155R61A104KA01D

23 1 R8 4.7K CHIP RES 4K7 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ472X

24 1 U3 16MBIT Serial Flash WSON SST SST25VF016B-75-4I-QAF-T

2.2 SPI Interface Integration

Item Qty Reference Part Value

Description Jedec Mfg/ Part No

CAPACITORS

1 1 C5 8.2pF CER CHP C 8.2P +-0.25P C0G 0402 25V LF 0402 Murata GRM1555C1H8R2CZ01D

2 4 C3,C8,C11,C13 0.1uF CER CHIP C 0.1U 10% X5R 0402 6.3V 0402 Murata GRM155R61A104KA01D

3 1 C1 2.2uF CER CHIP C 2.2U 20% X5R 0402 4V 0402 Murata GRM155R60G225ME15D

4 1 C6 1uF CAP CER 1.0UF 16V 10% X7R 0805 0805 Murata GRM21BR71C105KA01L

5 4 C2,C4,C14 10uF CER CHIP C 10U 20% X5R 0805 10V 0805 Murata GRM21BR61A106KE19L

6 1 C7 10uF CAP TANTALUM 10UF 6.3V 10% SMD CASE-B AVX TAJB106K006RNJ

7 1 C12 22uF CAP TANTALUM 22UF 6.3V 20% SMD CASE-B Kemet B45196H1226M209

RESISTORS

8 2 R1,R25** 33E CHIP RES 33R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ330X

9 1 R2 3.9K to 4.7K

10 1 R3 820E CHIP RES 820R 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ821X

11 3 R4,R5,R6 1K RES 1.0K OHM 1/16W 5% 0402 SMD 0402 Yageo RC0402JR-071KL

INDUCTORS


RRSS99111100--NN--1111--0022



12 1 L1 4.7uH Power Inductor 2520 FDK MIPF2520D4R7

13 5 FB1,FB2,FB3,FB4,FB5 BEAD Ferrite Beads 0805 Murata BLM21PG221SN

DIODES

14 1 D1 LED Green LED 0603 Lite-On Inc LTST-C190KGKT

15 1 D2 CMS02 Schottky Diode SMD Toshiba CMS02TE12L,Q

ANTENNA TUNING NETWORK

16 1 Z1,Z2,Z3 TBD Refer to the description in the schematic.

Sample part number for Z1 given here.

Murata GRM1555C1H8R2CZ01D

IC'S 17 1 U1 40MHz Crystal Oscillator TXC 7C40000192

18 1 U2 RS9110-N-11-02 802.11bgn WLAN Module Redpine RS9110-N-11-02

19 1 ANT1 Antenna 2.45GHz SMD Antenna Antenna Factor ANT-2.45-CHP-T

20 1 J1 5X2 Box Header Burg Header

21 1 J2 Microwave Coaxial Connector with switch Murata MM8430-2610RA1

NO POPULATE

22 2 C9,C10 0.1uF CER CHIP C 0.1U 10% X5R 0402 6.3V 0402 Murata GRM155R61A104KA01D

23 1 R8 4.7K CHIP RES 4K7 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ472X

24 1 R7 100K CHIP RES 100K 5% 200PPM 0402 1/10W 0402 Panasonic ERJ-2GEJ104X

25 1 U3 16MBIT Serial Flash WSON SST SST25VF016B-75-4I-QAF-T


RRSS99111100--NN--1111--0022



3 Recommended RS9110-N-11-02 PCB Landing Pattern

Figure 3 PCB Landing Pattern


RRSS99111100--NN--1111--0022



4 Circuit and Layout Guidelines

The following are guidelines for integrating the RS9110-N-11-02 module into a wireless LAN solution.

1. The WLAN module has a central ground pad of size 2.5mm x 2.5mm. An application’s layout must have a provision to

include this.

a. Please provide a 2.7 mm X 2.7 mm Copper pad on the Top side of the application board. Please open the solder mask in this area so that the Cu is exposed.

b. Please provide a 2.7 mm X 2.7 mm or higher Copper pad on the bottom side of the application board. Please

open the solder mask in this area so that the Cu is exposed.

c. Please provide at least 12 via’s to connect these pads to the Ground plane. We recommend that the via’s should

be at least 10 mil x 18 mil.

2. For RESET one of the two options should be followed

a. The RESET can be Host driven. At the time of Power-on, Please ensure that the reset is held low for at least

20mSec. After this the reset should be driven high.

b. Reset may be driven by an R-C circuit. The recommended value of ‘R’ is 100 Kohms and the recommended

value of ‘C’ is 0.1uF.

3. The reference schematics shown in the previous section include the recommended power supply filtering and decoupling.

4. The RF trace on RF_OUT should have a characteristic impedance of 50 ohms. They can use any standard 50 RF trace

(Micro strip or Coplanar wave guide). The width of the 50 ohm line depends on their PCB stack like the Dielectric of the PCB, thickness of Copper , thickness of Dielectric and such other factors. The customer is advised to work with their

fabrication unit to chose the right PCB stack and width.

5. To evaluate transmit and receive performance like Tx Power and EVM, Rx sensitivity etc., a ‘microwave coaxial connector with switch’ should be placed between RF_OUT and the antenna.

6. CLK_REF is the reference clock to the module and should therefore be routed with minimum trace length and should be routed away from other switching or sensitive traces.

7. Unused pins may be left open


RRSS99111100--NN--1111--0022



8. The design of the embedded system should provide for a peak power load of 325mA.


RRSS99111100--NN--1111--0022



5 Chip Antenna Layout Recommendations

The choice of antenna will depend on the application. However, some recommendations are listed below if an on-chip antenna is desired to be used:

a. Antenna Factor ANT-2.45-CHP or equivalent.

b. Rainsun AN3216

Please make sure that the Cu is etched out in all the Layers in the Antenna region. The Ground plane should be removed

from under & either sides of the antenna. Please follow the rules listed in the picture below while doing the layout for the

chip Antenna. Removing the ground plane from the underneath the antenna is very important.

Figure 4 Antenna layout

The chosen Chip Antennae are λ/4 antennae and would require external ground plane for proper functioning and the length of

the ground plane behind the antenna (from the feedpoint of antenna to backwards) should be atleast 1 or 2 inches.

Interms of feedtrace which does not have ground underneath (3mm length), it will be resonant part of the antenna and lower its frequency. This can be a useful tuning method although this kind of short trace should have little effect which can be observed on a Network Analyzer. It is recommended to characterize the antenna portion using a Network Analyzer.


RRSS99111100--NN--1111--0022



Electrical performance of any Chip antenna is influenced by the physical characteristics of the surrounding ground plane, feed line, other devices, and materials. This can be used as an advantage by manipulating certain parameters to affect resonant frequency and match:

1. Ground plane configuration

2. Distance from antenna

3. Topology around antenna

4. Feed point transmission line impedance

5. Trace width

6. Trace length

7. Matching Network

8. PCB substrate thickness

9. PCB substrate dielectric constant.

5.1 Antenna Matching Network

Provision should be given for a pie network as shown in the schematics. The values shown below are just for example. The

values of the pie network components depends on the Antenna part, Customers layout, Gnd plane in the layout & other

components in the system which could affect the radiation pattern of the Antenna. Please use a Network Analyzer to optimize the values of the match network for the best return loss.


RRSS99111100--NN--1111--0022



L=3nHto3.9nH

C=1.5pFto3pF

C=1.5pFto3pF

L=3nHto3.9nH

Ground Plane

RF IN

ANT

Ground Plane

RF IN

ANT

Figure 5 Antenna Matching Network

Note: The radiation pattern of the Antenna can be studied in an Anechoic Chamber using a Network Analyzer & a Horn Standard Gain Antenna


RRSS99111100--NN--1111--0022



6 Reference Oscillator Specifications

Parameter Specifications Units Comments

Nominal Frequency 40 MHz

Frequency Accuracy ± 20 PPM Over operational temperature at rated

voltage.

Supply Voltage (VDD) 2.8 ± 10% or

3.3 ± 10%

V Power supply should ideally be locally

regulated, and with

adequate filtering.

Power Supply PSRR > 60 dB

Operational Temperature -40 to + 85 °C For industrial grade products.

Output Voltage ‘0’ level < 10% of VDD V

Output Voltage ‘1’ level > 90% of VDD V

Output type Square Wave

Duty cycle 45 to 55 %

Rise time/Fall time < 10 ns

Periodic Jitter 30 ps pk-pk ps Typical Spec of the Oscillator we use

Wake-up time from Standby < 1 ms

Wake-up time from power-on < 5 ms

Standby current < 20 uA


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Active current < 10 mA

Output load > 15 pF

Phase Noise at offset:

10 Hz

100 Hz 1 kHz

10 kHz

100 kHz

< -89

< -121 < -135

< -146

< - 150

dBc/

Hz

Typical Spec of the

Oscillator we use.

6.1 List of Recommended Crystal Oscillators

1. TXC part number 7C40000192 (This part was used for characterizing all our boards)

The following can also be used based on the specifications

2. Ecera part number FD4000113

3. Fox Xpresso part number FXO-HC538R

4. Kyocera part number KC25200C40C3KE00

5. Tai-Saw Technology part number TW0377E

6. Epson Toyocom SG 150-SCE

7. Epson Toyocom SG 211-SCE

8. Golledge GXO-5332L/E 40.0MHz

9. ECS EC-2532HS

Note: Before finalizing the choice of a crystal oscillator, it is advisable to carry out detailed EVM measurements on a prototype

or evaluation board.


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7 Recommended Specifications for Schottky Diode

• Forward voltage: VFM = 0.40 V (max)

• Average forward current: IF (AV) = 3.0 A

• Repetitive peak reverse voltage: VRRM = 30 V

7.1 Recommended Parts

a) Toshiba part number CMS02

b) NXP part number PMEG3030BEP


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8 Sample Layout

This section provides a sample layout of a board that instantiates RS9110-N-11-02. This reference board is an SDIO module with a standard interface into an SDIO slot.

8.1 Top Layer


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8.1 Layer 2

8.2 Layer 3


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8.3 Bottom Layer

8.4 Component Placement


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9 Appendix

9.1 SDIO connectivity for Windows OS

While using the Redpine SDIO module on an embedded windows platform, the following precautions have to be followed

1. SDIO device would be recognized and drivers would be loaded by embedded windows operating system using signal

activity on SD0_CD# and SD0_WP. SD0_CD signal has to be connected to ground through a zero ohm resistor.

SD0_WP signal has to be connected to ground through a 10K resistor.

2. Drive 3.3V voltage to Redpine module from the output of a power gate or regulator which is controlled with

SD0_PWR# as shown in the below circuit. SDIO stack on windows operating system controls the SD0 PWR# signal and is the output of application processor. As shown below, 3.3V Main is uncontrolled 3.3V signal and regulator

output +3.3VS is fed to Redpine Wi-Fi module.

3. If reset to Redpine module is from RC circuitry, 3.3V input to RC circuit should be from voltage regulator output. If

reset is controlled from microprocessor GPIO pin, then the reset has to be asserted for a minimum of 10ms after the SD0_PWR# signal.

Documents

RS9110-N-11-02 Module Integration Guide Version 1.39 September