OPTIMUM POWER FLOW CONTROL ALGORITHM FOR AN

ULTRACAPACITOR BIDIRECTIONAL DC-DC CONVERTER

O.A. Ahmed, J.A.M Bleijs

Department of Engineering, University of Leicester, University Road, Leicester LE1 7RH, (United Kingdom)

e-mail: oa49@leicester.ac.uk , jamb1@leicester.ac.uk

Keywords: Bidirectional converter, ultracapacitor energy

buffer, phase-shift modulation, circulating power flow.

Abstract

In this paper, new modulation schemes are proposed to mini-

mise the circulating power flow, minimise RMS currents and

maximise the operating efficiency of a voltage-fed phase-

shifted bidirectional DC-DC converter for an ultracapacitor

energy buffer, with an IGBT voltage doubler circuit. The

mathematical analysis to obtain an optimum power flow con-

troller of the bidirectional converter is presented. Theoretical

and simulation results show that the proposed method can

maintain minimum circulating power flow even if the ultraca-

pacitor voltage is fluctuating between 50% and 100% of the rated voltage. Furthermore, using the proposed modulation

methods a considerable improvement in converter efficiency

(up to 93.4%) is achieved in comparison to that for the con-

ventional phase-shift modulation method (around 80%). The

proposed modulation scheme is verified by PSpice/Simulink

co-simulation using SLPS.

1 Introduction

To improve the dynamic response of a fuel cell power source

in a DC microgrid, a fast response energy storage medium

such as ultracapacitor (UC) is needed. For interfacing an ul-

tracapacitor to the DC link of a DC microgrid several config-

urations have been proposed and used. One of the efficient

ways is to connect the ultracapacitor to the fuel cell power

converter at the same high voltage DC link via a bidirectional

DC-DC converter (BDC), as shown in Fig.1. Typically BDCs

use a phase-shift control strategy to control the transfer of

power in both directions. Conventional phase-shift control

(CPC) modulation as proposed in [1] is a modulation method

that has been used widely because of its simplicity of imple-mentation and the capability of realizing soft-switching op-

eration for the BDC. As shown in Fig.1b, in this modulation

scheme all BDC switches are driven at 50% duty cycle with

an additional phase-shift between the voltages across both

sides of the isolation transformer. The BDC with CPC is ca-

pable of operating with zero-voltage switching (ZVS) for the

entire phase-shift angle range, but only when the secondary

voltage reflected to the primary (V’sec) is equal to the input

voltage (Vuc) and both voltages remain essentially constant

(e.g. fixed-voltage DC-DC converters or battery

chargers/dischargers). The BDC operating under CPC has a limited soft-switching range when operated with sources that

have a wide input voltage variation, such as ultracapacitors.

In addition, the CPC method increases the RMS current and

circulating energy in the BDC.

(a)

(b) (c) (d) (e)

Fig.1 Bidirectional converter: (a) Simplified block diagram of BDC, and

voltage waveforms of different modulation scheme approaches when:

(b) D1 D2 = 50% (i.e. CPC modulation), (c) D1= 50% D2 ≤ 50%, (d) D1≤

50% D2 = 50%, (e) D1≤ 50% D2 ≤ 50%.

The disadvantages of CPC modulation have led many authors

to find an alternative modulation approach, seeking to im-

prove the performance and the efficiency of the BDC. Most

of those approaches use the phase-shift between the primary

and secondary voltages to deliver the required power (Puc)

while changing the duty cycle (D1 and D2) below 50% to

maximize operating efficiency of the BDC (Fig.1b-e).

In [2], a modified phase-shift modulation scheme is proposed

to extend the ZVS range of the BDC by shaping the current in

the primary winding to a triangular or trapezoidal waveform

based on the required power, where the two BDC bridges are

driven at a duty cycle less than 50% (Fig.1e). The soft-

switching operation range is significantly improved, but the

penalty is high peak currents, a complicated control algo-

rithm, and it cannot be used if Vuc = V’sec. Modified triangular

(TRM) and trapezoidal (TZM) modulation schemes are pre-

sented in [3], based on optimum selection of the duty cycles

D1 and D2 in respect to lower switching losses, where zero-

current switching (ZCS) is realized for the low voltage side

(LVS) switches,. However, using these modulation methods

the current through the primary winding becomes discontinu-

ous which is not appropriate in most applications due to the

higher device current stresses. A switching modulation strate-

gy based on minimization of peak currents and switching

losses with a modulation scheme employing D1=50% and

D2≤50% is presented in [4]. However, it does not reduce the circulating energy and it restricts the converter power capabil-

ity. Hybrid modulation for the BDC based on a combination

of a modified TRM scheme and CPC modulation was pre-

sented in [5]. This method has the drawback of high RMS and

peak currents especially at the transition from TRM to CPC

mode. Further efficiency enhancements were developed by a

Lt

Phase-shifted (1)

Power Flow

Converter I

Converter II

VPri V’sec Vuc Vo

DC

Lin

k

D2

D1 D1

D2 D2

D1 D1

D2

𝐈𝐨 𝐈𝝍 𝛉 = 𝛚𝐭

−𝑽𝐮𝐜

𝑽𝑪𝟏 𝟐𝒏

−𝑽𝑪𝟐 𝟐𝒏

T1

(𝑽𝑪𝟐 𝒏 + 𝑽𝐮𝐜)

𝑽𝑪𝟐 𝒏

1

π

−(𝑽𝑪𝟏

𝒏+ 𝑽𝐮𝐜)

−(−𝑽𝑪𝟐

𝒏+ 𝑽𝐮𝐜)

−𝑽𝑪𝟏

𝒏

(−𝑽𝑪𝟏 𝒏 + 𝑽𝐮𝐜)

𝐈𝝓𝟏 𝐈𝝓𝟐

𝐈𝛑

𝛉 = 𝛚𝐭

−𝑽𝑪𝟏 𝒏𝝎𝑳

−𝑽𝑪𝟏 𝒏 + 𝑽𝐮𝐜

𝝎𝑳

(𝑽𝑪𝟐 𝒏 + 𝑽𝐮𝐜)

𝝎𝑳

2π

2

𝑽𝐮𝐜

𝜓

T1 T2 T3 T4 T5 T6 T7 T8

vpri

v’sec

vLt

IS1IS4

(Vuc > V’sec)

IS1IS4

(Vuc = V’sec)

IS1IS4

(Vuc < V’sec)

1 π 1.5π

0.5π

D1=D2=50%

-0.5π ≤ 1 ≤ 0.5π

0.5π ≤ 2 ≤ 1.5π

D1

2

D1

D2

S4

Z2

S3 S2 S2

S1 S1

Volt

D1

D1

Vpri

D2

Z1 Z1 Z2

V’sec

combination of TRM, TZM, and CPC modulation schemes so

that the appropriate scheme is selected based on the required

output power [6]. To realize ZVS down to light-load and to

reduce circulating energy, a composite scheme based on se-

lecting either D1≤50% and D2≤50% for low power transfer or

D1=50% and D2≤50% for high power transfer is presented in

[7]. Using this scheme, maximum efficiency occurs only in

the light load range. [8] proposes a duty ratio control modula-

tion to improve the soft-switching operation of the BDC with

D1 set to 50% and D2 calculated as (D2 = Vuc_min/ 2Vuc), where

Vuc_min = 50% of Vuc. This means that D2 = 50% if Vuc =

Vuc_min, and D2 = 25% if Vuc = Vuc_max. This choice for D1 and D2 can provide ZVS for the ultracapacitor bridge side but

only for a limited load range. Furthermore, if Vuc = Vuc_min the

BDC has to be operated under CPC for the full power range.

Also, the effect of the conduction losses and circulating ener-

gy is not addressed.

To control the power flow of the BDC with minimum circu-lating power flow (cf. Section 3), minimum peak current and

minimum RMS current, a new modulation method is present-

ed in this paper. The proposed modulation can maintain a

minimum circulating power flow even if the UC voltage is

reduced to 50% of the rated voltage. Compared to TRM in [2,

3, 5, 6] the proposed modulation keeps the primary current

continuous for the entire output power range, resulting in

lower peak and RMS current (cf. Section 4). In comparison

with CPC modulation the proposed modulation scheme re-

sults in a higher converter efficiency (cf. Section 5).

2 Features of the Investigated BDC

The BDC topology that is analysed in this paper is depicted in Fig.2. The converter comprises a low-voltage MOSFET H-

bridge, connected to an ultracapacitor operating from 50% to

100% of its rated voltage (24V≤Vuc≤ 48V), and an IGBT

high-voltage bidirectional voltage-doubler circuit with a DC

voltage (Vo) of 650V. The rated power is 1.2kW for both

power flow directions, where the direction is defined as:

Puc > 0: power transfer from UC side to DC link side

Puc < 0: power transfer from DC link side to UC side

By combining the bidirectional voltage doubler with an H-

bridge, a converter with a lower number of active devices at

the lowest voltage rating and highest efficiency can be real-ized. However, the voltage doubler arrangement somewhat

restricts the modulation scheme that can be used on the high-

voltage side thus a limited range of optimal operating points

can be obtained. To improve the soft-switching range of the

voltage-doubler switches further, an asymmetric duty cycle,

as described in [9], could be used for switches Z1 and Z2. But

that would result in imbalanced current stresses in the switch-

es and an asymmetrical voltage across the secondary winding.

Therefore, the switching control strategy adapted in this paper

is to modify the primary voltage only by overlap of the

top/bottom switches of the ultracapacitor bridge side for a

specific period, by inserting a phase-shift angle (2) between S1 and S3 with a fixed 50% duty cycle, as shown in Fig.3a.

The switching of S2 and S4 is complementary to that of S3 and S1 respectively. This method will facilitate implementation of

the switching controller since no duty cycle variation is

Fig.2 Schematic of BDC with voltage doubler on high voltage side

(a) (b)

Fig.3 Key waveforms of: (a) Switching control strategy with fixed D1 D2,

(b) Voltage and current waveforms for arbitrary 1 and 2: T1 (0 ≤ θ ≤ψ), T2

(ψ ≤ θ ≤ 1), T3 (1 ≤ θ ≤ 2), T4 (2 ≤ θ ≤ π), T5 (π ≤ θ ≤ π + ψ), T6

(π + ψ ≤ θ ≤ π +1), T7 (π +1≤ θ ≤ π +2), T8 (π +2≤ θ ≤ 2π).

required. The waveforms of the primary voltage (vpri), sec-

ondary voltage (v’sec), leakage inductance voltage (vLt), and

the MOSFETs (S1 and S4) currents are shown in Fig.3b for

arbitrary 1 and 2 for the condition: Puc > 0 and 2nVuc > Vo. Modified waveforms apply for other ultracapacitor voltages

and reverse power flow.

3 Circulating Power Flow Analysis

It is known that circulating power flow (CPF) or circulating

energy in the converter has a major effect in increasing the

conduction losses, thereby reducing the operating efficiency

[10]. This power that occurs during a certain interval in the

cycle depends on the used modulation scheme and varies with

the load conditions. Therefore, the definition and determina-

tion of this interval is first discussed in this section, after

which a modulation scheme is investigated that provides a

minimum CPF interval.

3.1 Definition of CPF interval

To limit the RMS currents via the converter’s switches and transformer windings, an external inductance (Lext) in series

with the leakage inductance (Lσ) of the transformer is re-

quired, giving a total circuit inductance Lt = Lext+ Lσ. This

limit determines the rated power of the converter. Due to this

inductance the primary and secondary currents lag their volt-

age by an angle that varies with the required power. Conse-

quently, part of the absorbed power is circulating through the

converter and flows back to the input source. This is shown in

Fig.4 where the instantaneous power is plotted for one full

cycle of the converter operation. The interval denoted by ψ is

S4

S3

S2

iuc

C1

HF Tr.

1:n

iuco

vo

DC

-Lin

k

Lt DZ1

S1

C2

DS1

DS3

DS2

DS4

iLt Vpri

ic1

ic2

D Z2

Z1

Z2

IGBTs Voltage-Doubler

V’sec

MOSFETs H-Bridge

defined in this paper as a circulating power flow interval and

is related to the power required by the load. If the BDC is

operating with CPC modulation, this interval can be reduced

either by minimizing Lt (with a higher RMS current rating as

a consequence) or by selecting a smaller 1 (at the detriment

of the power transfer capability of BDC). Therefore, an alter-native modulation is required to minimize this period without

the above effects.

Fig.4 Instantaneous power flow of the BDC measured across the primary

side (Ppri) for Puc > 0 plotted for arbitrary 1 and 2.

3.2 CPF Determination

Using the waveforms and equations in Fig.3b, the values of

the currents Io, I1, I2, and Iπ for Puc > 0 and 2nVuc > Vo can be derived as:

− −

(1)

− −

(2)

−

(3)

− (4)

For the interval T2 in Fig.3b, the inductance current iLt is giv-

en by:

(

) (5)

Fig.5 CPF interval durations against 1 and 2 for Puc > 0

As can be seen in Fig.3b, during the CPF interval the current

through the inductance (Lt) ramps from a value of Io until it

reaches zero at = ψ, where Iψ = 0 Io ≤ 0. By substituting this condition and (1) into (5), the duration of CPF interval is

found as:

𝜓 −

(6)

Similarly the CPF interval for 2nVuc < Vo is obtained as:

𝜓 − − −

(7)

In Fig.5 the contour surface of the CPF interval in relation to

1 and 2 is depicted for two different UC voltage (Vuc = 48V

and 28V) when 0 ≤ 1 ≤ 0.5π, 0.5π ≤ 2 ≤ π, and Puc > 0, and

it can be seen that for certain combinations of 1 and 2 a zero CPF interval can be obtained.

4 Proposed Optimal Modulation Scheme

As shown in Section 3, finding the angles (1 and 2) in Fig.5 that realize a zero-CPF interval assists to develop a modula-

tion scheme leading the BDC to operate with minimum losses

and a higher efficiency as will be described next. However,

the zero-CPF interval is limited by the required power trans-

fer and the UC voltage variations (cf. Fig.11). In order to op-

erate the BDC over the full power range with minimum CPF,

RMS current, and peak current, two more operational modes

have been developed.

4.1 Zero-CPF Interval Mode (ZCPFM)

From Fig.4, (6) and (7) it is evident that for constant Vo the

CPF interval depends on 1 and 2, the UC voltage variation,

the transformer turns ratio and the required power. Hence, the

phase-shift angles 1 and 2 must be calculated in relation to

the UC voltage and the required power to ensure operation at zero CPF. From the current and voltage waveforms and equa-

tions in Fig.3b, the power transfer of the BDC for arbitrary 1

and 2 when Puc > 0 and 2nVuc > Vo can be obtained as:

( −

− ) (8)

According to (6), to realize a zero-CPF interval (i.e. ψ =0) the

phase-shift angle 2 must be equal to:

− −

(9)

Substitution of (9) in (8) shows that the required phase-shift

angle 1 in this mode is given by:

where Vc1 and Vc2 are C1 and C2 voltages equal to (Vo/2).

If the UC voltage is less than (Vo/2n) while Puc > 0, the power

transfer for arbitrary 1 and 2 is given by:

− −

(11)

To ensure zero-CPF the required values for 1 and 2 are:

−

− (12)

and

𝛉 = 𝛚𝐭

𝐏𝐩𝐫𝐢(𝐭)

𝐂𝐏𝐅

𝛑 0 𝝍 𝝓𝟏 𝝓𝟐

𝟐𝛑

𝐏𝐦𝐚𝐱

𝐏𝐚𝐯𝐠

0

50

10080100120140160180

0

20

40

60

0

50

100 50100

150200

0

20

40

60

−

−√−

(10)

Vuc=48V Vuc=28V

2 2 1 1

ψ ψ

Fig.6 Phase-shift angles required to achieve zero-CPF for Puc>0

−

−

(−

√ √

−

− −

)

(13)

Using (9), (10), (12), and (13), the required combinations of

1 and 2 that achieve zero-CPF can be plotted against the transferred power for the different UC voltages as shown in

Fig.6. The achievable power range for zero-CPF lies within

the power transfer range of the BDC. Fig.7 shows the simu-

lated waveforms of vpri, v’sec, and iLt at the boundaries of the

zero-CPF interval mode range when 2nVuc > Vo and Puc > 0.

From Fig.7a, the transferable power which can be achieved

during this mode for the low power operation can be given as:

−

(14)

It can be seen from (14), that during low power operation the

power transfer is solely controlled by 2 at this mode. The

minimum transferable power (

) in this mode of opera-

tion is equal to:

−

(15)

when the phase-shift angles are

0 and

.

As the required power increases both 1 and 2 have to be recalculated, as shown in Fig.6 and the simulation results in

Fig.7b, in order to maintain operation at zero-CPF. The power

that can be transferred is given by:

(

− −

)

(16)

By substituting (9) in (16) and equating ( ) to

zero the maximum phase-shift angles

and

for

this mode are obtained as:

(17)

and

Time (sec) Time (sec)

(a) (b)

Time (sec) Time (sec)

(c) (d)

Fig.7 Simulation results show the inductance current at the boundary of zero-

CPF interval mode when (a) Puc = 0.205kW, Vuc= 48V, (b) Puc =1.025kW,

Vuc= 48V, (c) Puc = 0.218kW, Vuc= 38V, (d) Puc = 0.781kW, Vuc= 38V.

(18)

The maximum power transfer of the BDC at high power op-

eration is given by:

(19)

Using a similar procedure the proposed zero-CPF interval

mode boundaries can be obtained when 2nVuc < Vo and Puc >

0 as depicted in Table1. The zero-CPF mode boundaries for

Puc < 0 are the mirror images of those for Puc > 0.

Table1 Zero-CPF interval boundary when 2nVuc < Vo and Puc > 0

−

− −

−

−

− −

−

−

−

It has been shown that the operation of the BDC under zero-CPF mode is only possible over a limited power range. Addi-

tional modulation schemes are therefore required to allow for

optimum operation of the BDC over the entire power range

with minimum CPF interval and losses.

4.3 Inner Single Phase-Shift Mode (ISPM)

Another mode has been developed in this paper by setting 1

= 0 and modifying 2 only, in order for the BDC to deliver a power below that of the zero-CPF interval mode. This mode

0

20

40

100120140160180

0

200

400

600

800

1000

1200

43.9V

38V

48V

31V7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

2 1

Pu

c (W

)

vpri

v’sec

iLt vpri

v’sec

iLt

iLt iLt

v’sec

vpri

v’sec

vpri

Vo

lt, A

mp

s V

olt

, A

mp

s

Vo

lt, A

mp

s V

olt

, A

mp

s

has been called inner single-phase shift mode (ISPM) as the

power is controlled by 2 only. Fig.8a shows the converter waveforms in this mode, and it can be seen that the induct-

ance current iLt increases from Io to I2 at = 2 and reduces

to –Io when = π. Based on this condition, the power transfer

during this mode is found as:

(20)

when 2nVuc > Vo and Puc > 0.

The phase-shift angle 2 is equal to:

√ √−

(21)

Operation in ISPM is similar to the TRM scheme in terms of

the current waveform shape and the ability to operate with a

minimum conduction loss. However, the proposed ISPM in-troduces a small CPF interval as shown in Fig.8, which is

needed to achieve ZVS for the UC side switches at light load

operation (cf. Table2). Unlike TRM scheme, the ISPM keeps

the inductance current of the BDC continuous for its entire

power range, as shown in Fig.8a&b. Thus, a lower current

stress is achieved. Also a change of the duty cycle is not re-

quired as in TRM scheme. In addition, this mode can be used

even if 2nVuc = Vo.

Time (sec) Time (sec)

(a) (b)

Fig.8 Simulation waveforms of the ISPM for (a) Puc = 27W, (b) Puc =200W.

It is found that ISPM can operate with a minimum CPF inter-

val until the phase-shift angle 2 is equal to 0.5π, where the maximum power achieved is:

(22)

However, due to the high peak current this mode is limited to

and

for Puc > 0, 2nVuc > Vo

4.3 Minimum-CPF Mode (MCPFM)

A third operational mode has been developed to minimise the

CPF interval and reduce the peak current at BDC operating

powers exceeding the zero-CPF interval mode range. Fig.9

shows contour surface for both the power flow and the peak

current. Fig.9a indicates that at a high power level (>1000W)

the BDC is required to operate with a large angle 1. This re-sults in a longer CPF interval and higher RMS current. How-

ever, there is no closed-form expression to calculate the com-

bination of 1 and 2 that optimises the power flow operation at the higher power level. However, the contours suggest that

a near-optimum combination is obtained by selecting 1 as (2-0.5π); 2 can then be calculated using:

(a) (b)

Fig.9 3D contour surfaces of (a) BDC power flow and (b) peak current

− √ √−

(23)

The selection of the phase-shift angles for all modes is indi-

cated by the red, yellow, and blue curves in Fig.9 a&b. As

shown in the simulation results in Fig10, a minimum CPF

interval with a lower peak current is achieved using the pro-

posed MCPFM.

Time (sec) Time (sec)

(a) (b)

Fig.10 Simulation waveforms of MCPFM for (a) Puc=1.161kW, (b) Puc=1kW.

5 Combination of Modulation Schemes

Fig.11 gives an overview of all proposed modulation schemes

and demonstrates that the BDC can be operated with a ze-

ro/minimum CPF interval for both power flow directions over

wide UC voltage variations.

Fig.11Proposed Operating mode of the BDC for different UC voltages and

different power transfer levels, n=7.4, Lσ =10μH.

Fig11 shows that the zero-CPF mode range decreases with

decreasing UC voltage and depends on the required power. In

contrast, MCPFM has a constant range for any variation in

UC voltage. The minimum range of the zero-CPF interval

mode is achieved when 2nVuc = Vo, where

is equal

zero. In comparison with the CPC modulation, it is clear from

Fig.13a that the proposed modulation scheme keeps the CPF

interval as low as possible for the full power transfer range.

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

7.71 7.72 7.73 7.74 7.75 7.76

x 104

-100

-50

0

50

100

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

7.82 7.83 7.84 7.85 7.86

x 104

-100

-50

0

50

100

-1000 -500 0 500 1000

25

30

35

40

45

vpri

v’sec

5×iLt

Vo

lt, A

mp

s

5×iLt

vpri

v’sec

Vuc=48V Vuc=48V

2 1 Vuc=48V

Puc > 0

vpri v’sec

iLt

Vo

lt, A

mp

s

Vuc=48V Vuc=38V

v’sec

iLt

vpri

2nVuc=Vo 2nVuc=Vo

Vuc

Puc>0 Puc<0

MCPFM

Puc_rated Puc_rated

MCPFM

ZCPFM ZCPFM

ISPM

ISPM

Vo

lt, A

mp

s

Vo

lt, A

mp

s

1 2

Vuc=48V

Puc > 0

ZCPFM

MCPFM

ISPM

CPC

ZCPFM

MCPFM

ISPM

CPC

I p (

A)

Pu

c(W

)

As shown in Fig.12a a further reduction in the RMS current is

achieved compared to CPC modulation. Fig.12b compares the

efficiencies obtained from simulation for CPC modulation

and the proposed modulation scheme. It can be seen that with

the proposed modulation scheme the efficiency is improve-

ment over the entire load range. The improvement over CPC

modulation is the result of a reduction in the RMS current, as

shown in Fig.12a, and lower switching losses, as shown in

Table2.

Using MCPFM the BDC converter is only operated under

CPC modulation for one operating point at the full rated pow-

er. Using ISPM a lower CPF interval has been achieved while extending the soft-switching operation (see Fig.13a and Ta-

ble2).

Power (kW) Power (W)

(b) (b)

Fig.12 Performance comparison with the proposed modulation scheme for

Puc>0: (a) RMS current comparison and (b) Efficiency comparison.

Power (kW) Time (sec)

(a) (b)

Fig.13 Simulation results of: (a) the required phase-shift angles to achieve

minimum CPF interval (blue) compared with CPC (red), (b) BDC power

changes (green: calculated; blue: simulated).

Table2 Soft-switching status for the proposed modulation scheme

Puc > 0 and 2nVuc > Vo Puc > 0 and 2nVuc <

Vo

Schemes States ZVS ZCS ZVS ZCS

ISPM

0 S1 on S2 off S1 on S2off

1

2 S3on S3on S4 on

π S2 on, Z2on

S1off S2on S1off, Z2

on

ZCPFM

0 S1 on S2off S2off

1 Z1 on Z1 on

2 S3on S3on

π S2on S1off S1off

MCPFM

0 S1 on S2off

1 Z1 on Z2 on

2 S3on S3on

π S2on S1off

In addition, the proposed modulation scheme shows a seam-

less transition between the operating modes because the in-

ductance current iLt either ends at zero (Fig.8b) or starts from

the zero (Fig. 7a and 10a). This claim is verified through the

SLPS simulation results, shown in Fig.13b, where the power

changes without chattering. Implementation of the controller

is also simplified because no hysteresis block is required to

select the appropriate mode.

6 Conclusions

A circulating power flow is the main source of the high RMS

current, conduction loss and current ripple in the phase-

shifted bidirectional DC-DC converter. The circulating power

flow has an interval related to the power required by the load

and is implicit in the operation of the phase-shifted bidirec-

tional converter. This paper presented a new modulation

scheme to minimise the circulating power flow interval in the

bidirectional DC-DC converter for the ultracapacitor energy

buffer. The proposed scheme decreases the circulating power

flow to zero over most of the power range and minimises it

over the remainder of the range for a wide variation of the

ultracapacitor voltage. In addition, the proposed modulation shows an increase in the soft-switching range and achieves a

seamless transition between the proposed modes as the power

required is increased. Use of the proposed modulation scheme

with an H-bridge voltage doubler circuit shows an improved

efficiency (up to 93.4%) in comparison to the conventional

phase-shifted BDC (typically 80%).

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