View
218
Download
3
Tags:
Embed Size (px)
Citation preview
RISC Processor I/OBy
Eric SchultzUnder Advisement of
Dr. Vinod Prasad
Outline
• What is a processor?• What is a RISC processor?• What is I/O?• Why is I/O important?• How will this I/O structure be
designed?• What progress has been
made?
What is a Processor?
• The processor is part of a computer.
• It cannot work without supplemental hardware.
• The processor does all command interpretation.
• The processor ties all other subsystems together.
A Computer Consists Of:• Processor• RAM• External Cache• Graphics
Adapter• Disk Controller• Hard Disk• Monitor• Keyboard• Bus Interface
What is a RISC Processor?
• There are two types of Processors, CISC and RISC.
• CISC – Complex Instruction Set– Executes Many tasks with one
instruction.– Each Command takes multiple Clock
Cycles.
• RISC – Reduced Instruction Set– Executes One task per instruction– Each Command takes One Clock
Cycle.
What is I/O?
• I/O is the Input/Output facilities of the processor.
• It provides For the Processors Bus interface.
• It can provide serial, parallel, and analog interfaces.
Why is I/O Important?
• I/O allows a processor to communicate with other hardware.
• Without I/O all activity in the processor would be confined to that one silicon chip.
I/O Design Structure.• I/O design Structure is dependant
on the processors design structure.
• We are assuming a three Bus Processor design structure taken from Hill and Peterson’s “Digital Systems – Hardware Organization and design.”
• Design will be done using VLSI to make a Processor mask.
Three Bus Design
Progress
• The High level concept diagrams have been completed.
• High Level Design of both Parallel and Serial I/O is in it’s final stages.
• Simulation of Parallel and serial I/O design has begun.
I/O Pin Concept Diagram
Basic Serial Port Concept Diagram
What are we doing?• We are designing a Processor
to fit into a larger system with supporting hardware.
• We are designing a Reduced Instruction Set Processor.
• I am designing the I/O hardware for the Processor.
• All high level design is finished.
RISC Processor I/OQuestions?Contact:Eric SchultzOr Dr. Vinod Prasad