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RF COURSE Final_2007

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University RF Integrated Circuit Final 2007

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ECE 6730: RF Integrated Circuit Design Spring 2007

Final Exam

May 3, 8:00-10:00am

Name:

(75 points total)

Selected Equations

Square Wave Fourier Series : f (t) = 4

π

n=1,3,5,...

1

n sin(nωt)

Trignometric Identities : cos(A)cos)B) = 1

2(cos(A + B) + cos(A−B))

sin(A)cos(B) = 1

2(sin(A + B) + sin(A−B))

sin(A)sin(B) = 1

2(cos(A−B)− cos(A + B))

Problem 1: Consider the single-balanced mixer shown in Fig. 1. You may assumethat the LO signal is large enough that M 2 and M 3 fully switch the transcon-ductor current back and forth at a frequency of ωLO. [12 points]

(a) Assume that M 1 is an ideal linear transconductor, so that I d1 = I B +gmV RF , where I B is the dc bias current. What is the conversion gain of this mixer? [8]

(b) Now assume that M 1 has a square law characteristic, so that I d1 = I B +gm(V RF )

2. Will this work as a mixer? If so, what is the conversion gain,and if not, why not? [4]

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ECE 6730: RF Integrated Circuit Design Spring 2007

Figure 1: Single-balanced mixer for Problem 1.

Problem 1 (cont’d)

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 2: Consider the VCO shown in Fig. 2, where L = 4 nH and C = 1.25 pF.You may ignore all parasitic capacitances, and assume that gm for the transistorsis sufficient to sustain oscillation. [12 points]

(a) Assuming that RIND = 0 Ω, what will be the frequency of oscillation? [5]

(b) Now assume that RIND = 20 Ω, and that the frequency of oscillation doesnot change appreciably. What is the approximate Q of the tank? [5]

(c) Is the assumption that the frequency of oscillation does not change validin this case? Why or why not? [2]

Figure 2: VCO for Problem 2.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 2 (cont’d)

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 3: Consider the integer-N PLL shown in Fig. 3, where the loop filter issimple gain element. We would like to design this PLL for use as a frequencysynthesizer in a communications system that has 10 channels centered around

1 GHz, each with a channel bandwidth of 10 MHz. [12 points]

(a) Choose a suitable reference frequency, given that the goal of our design isto maximize the loop bandwidth of the PLL. [2]

(b) What range of divide values (N min and N max) will the divider need to coverin order to access all of the channels (i.e. the PLL output must move from950 MHz to 1050 MHz in 10 MHz increments)? [2]

(c) What is the type and order of this PLL? [2]

(d) Assuming that K PD = 19 V/rad and K V CO = 2π Mrad/s, choose theloop filter gain (K LPF ) to maximize the closed loop bandwidth of the PLL

while ensuring that it never exceeds 1 MHz (2π Mrad/s) across the rangeof divide values. [6]

Figure 3: PLL for Problem 3.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 3 (cont’d)

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 4: Consider the PA shown in Fig. 4, where RA = 48 Ω represents theantenna and RP = 2 Ω represents parasitic losses due to physical connections.The BFL inductor is large enough that the current through it remains constant,

the BFC capacitor is large enough so that it appears as a short at the frequencyof interest, and the power supply is 2 V. [12 points]

(a) Assume that the amplifier is biased in class A mode for maximum powerdelivery to the load. What is the dc bias current drawn from the supply?[3]

(b) What is the efficiency (assume that power dissipated in RP is not deliveredto the load)? [6]

(c) Calculate the new efficiency if the bias current is reduced to half of thevalue calculated in part (a). [3]

Figure 4: PA for Problem 4.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 4 (cont’d)

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 5: The circuit shown in the dotted lines in Fig. 5 is an attenuator. Assumethat RS = RL = 50 Ω, R1 = 10 Ω, and R2 = 120 Ω. [12 points]

(a) Find the input resistance looking into the attenuator when RL is connectedto the output. [4]

(b) Calculate the noise factor of the attenuator. Do NOT include RL in yourcalculations. (hint: solving this circuit using current division will be easierthan using straight KCL) [8]

Figure 5: Attenuator for Problem 5.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 5 (cont’d)

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 6: Consider the down-conversion chain shown in Fig. 6. The frequencyspectra of the signals at points A and C are shown in Fig. 7 on the next page.As shown, the desired signal of interest is centered around 1 GHz. [12 points]

(a) Draw the spectrum at point B, after the LNA, into Fig. 7. Assume thatthe LNA is ideal except for a third order non-linearity, and you may assumethat the high frequency sum terms are filtered out. [3]

(b) Draw the spectrum at point D, the PLL output. The PLL reference fre-quency is at 25 MHz, and the divide ratio is N = 8. Assume that the PLLoutput is a square wave, but neglect terms above the third harmonic. [2]

(c) Draw the spectrum at point E, the mixer output. Assume that the mixeroperates as an ideal multiplier, but only consider the difference terms gen-erated in the output spectrum (e.g., ω1 − ω2) [4]

(d) Draw the spectrum at point F, assuming the IF filter is an ideal brick wallfilter centered at the IF with the bandwidth of the signal of interest. [3]

Figure 6: Receiver front end for Problem 6.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 6 (cont’d)

Figure 7: Frequency spectra for Problem 6.

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ECE 6730: RF Integrated Circuit Design Spring 2007

Problem 7: Closely examine the individuals pictured in Fig. 8. [3 points]

(a) Who are these gentlemen? [2]

(b) Which one of them is training to be a cage fighter? [1]

Figure 8: Action scene for Problem 7.

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