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Research Interests, Projects, Collaborations & Opportunities. Priyank Kalla Electrical & Computer Engineering University of Utah. Typical Design Flow & CAD Support. TLM Models. Design Spec. High-Level Analysis. Hardware Description. High-Level Synthesis. Testing for Defects. - PowerPoint PPT Presentation
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Research Interests, Projects, Research Interests, Projects, Collaborations & OpportunitiesCollaborations & Opportunities
Priyank Kalla
Electrical & Computer Engineering
University of Utah
Typical Design Flow & CAD SupportTypical Design Flow & CAD Support
TLM Models
High-LevelAnalysis
HardwareDescription
DesignSpec
High-LevelSynthesis
Optimization
Testing for Defects
Fabrication
CircuitModels
Mask High-Level + LogicSynthesis & OptimizationArea, Speed, Power
Design VerificationDesign Verification
TLM Models
PropertyVerification
HardwareDescription
DesignSpec
High-LevelSynthesis
Optimization
Fabrication
CircuitModels
Mask “Core Engines” forCorrectness Reasoning &Constraint Solving
Equivalence Verification ?
My Research Projects at the UMy Research Projects at the U
Boolean Reasoning Engines (concluded)
Million+ variables, 10s Million Constraints
2 M.S. + 1 PhD
“Exploring” Design Automation for Photonic Devices
Collaboration w/ Steve Blair + his Colleagues
1 PhD student: Learning & Exploring the issues
Synthesis & Verification of Finite-Precision Arithmetic
Focus on Hardware – but applicable to Software
2 PhDs. + 2 more for sure…
Recognition + bread-earner [3 NSF Grants]
Datapath-Dominated ApplicationsDatapath-Dominated Applications
Floating-pointModel
AutomatedFixed-pointGeneration
Fixed-pointModel
Equivalence Verification ?
Real NumberSpecification
ConversionUtility
Optimization
SynthesisFPGA
HDL Model
HDL Model
MatlabXilinxAlteraSynplicitySynopsysCalyptoGalois
DSPCryptoEmbeddedASIC
Why Verify Finite-Precision Arithmetic Why Verify Finite-Precision Arithmetic
1996 Ariane Rocket Explosion64-bit floating to fixed point rounding error
Vancouver Stock-Exchange Index1982: Value initialized to 1000; 1984: value 520
Truncation error: Should have been 1098
Gulf War, Patriot Missile (28 dead, SCUD)
German Parliament: 5.0% versus 4.97% (2-bits!)
Bug in JPEG Decode Routine (discovered in ’05)Hacker Exploited – uploaded a virus: Microsoft website
Network Routers, Filter instability errors + ……
[Peymandoust et al, TCAD '03]
MP3 Decoder: Anti-Aliasing FunctionMP3 Decoder: Anti-Aliasing Function
MAC
x = a2 + b2
a b
x
F
DFF
coefficientscoefficients
Taylor series expansion
2 2
1 1
22F
xa b
6 5 4
3 2
1 9 115
64 32 6475 279 81 85
16 64 32 64
F x x x
x x x
Example: Anti-Aliasing FunctionExample: Anti-Aliasing Function
F[15:0] = 156x6 + 62724x5 +
17968x4 + 18661x3 + 43593 x2 +
40244x + 13281
G[15:0] = 156x6 + 5380x5 +
1584x4 + 10469x3 + 27209 x2 +
7456x + 13281
F ≠ G
F[15:0] = G[15:0]
Prove that F(x) % 216 ≡ G(x)% 216
Contemporary tools model the problem at (circuit) bit-level
Too many variables/constraints – infeasibleName of the game: “Abstraction” + model the “details”
Fixed-Size (m) Data-path: ModelingFixed-Size (m) Data-path: Modeling
Control the datapath size: Fixed size bit-vectors (Control the datapath size: Fixed size bit-vectors (mm))
* +
8-bit
8-bit
16-bit17-bit
Bit-vector of size Bit-vector of size mm: integer values in : integer values in 0,…, 20,…, 2mm-1-1
Fixed-size Fixed-size ((mm) bit-vector ) bit-vector
arithmeticarithmetic
Polynomials Polynomials reduced reduced %2%2mm
Algebra over Algebra over the ring the ring ZZ22
mm
* +
16-bit
16-bit
16-bit16-bit
Why is the Problem Difficult?Why is the Problem Difficult?
Z2m is a non-Unique Factorization Domain
F = x2 + 6x in Z8 (modulo 8) can be factorized as
Easy to do over Reals, Complex numbers, Integers (modulo p)
Textbook algebra solutions are not available over Z2m
Contacted a Mathematician: Prof. Florian Enescu
Partially unsolved Problems in “classical” mathematics
F
x+6
F
x+4 x+2x
““Zero” in Finite-PrecisionZero” in Finite-Precision
F[15:0] = 156x6 + 62724x5 +
17968x4 + 18661x3 + 43593 x2 +
40244x + 13281
G[15:0] = 156x6 + 5380x5 +
1584x4 + 10469x3 + 27209 x2 +
7456x + 13281
F ≠ G
F[15:0] = G[15:0]
F[15:0] - G[15:0] = 0?
F - G [15:0] = 57344 x5 + 16384 x4 + 8192 x3 + 16384 x2 + 32768 x
Ideals in Finite RingsIdeals in Finite Rings
Test for membership in the ideal of vanishing polynomials
Standard Problem formulation in Computer Algebra
But, how to “mathematically” generate this “ideal”?
Hilbert’s & Fermat’s results (mod p): Generalize to (mod pm)
Idealx
x % 2m
% 2m
0f
gf – g ? Z2m
Z2m[x]
ContributionsContributions
Abstraction of Arithmetic Datapaths Equivalence
Verification Problem
Equivalence of Polyfunction
Equivalence of Polynomial systems
Ideal Membership Testing
Canonical Forms
Simulation Vector Generation
ADD/MULT
Generalized to cover allBit-VectorArithmetic
Significance, Impact, InterestSignificance, Impact, Interest
Computer-algebra research group, Univ. Kaiserslautern
SINGULAR: Public domain computer algebra tool
Our approach implemented in their latest release
Univ. Kaiserslautern: Math + ECE + Infineon
Extension of my work to verify production-quality design
Univ. of Tokyo + Fujitsu
Use our work for Testing SoC (ATPG)
Bay-area Start-up: Calypto (NSF GOALI Partner)
GALOIS Inc., Cryptography applications (military funding)
Invited Talk: Intl. Joint Conferences on Automated Reasoning
Theoretical Computer Science Community