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Reliability Analysis of Flexible Electronics: Case Study of Hydrogenated Amorphous Silicon (a-Si:H) TFT Scan Driver Tsung-Ching (Jim) Hua ng Tim Cheng Feb. 10th 2007

Reliability Analysis of Flexible Electronics: Case Study of Hydrogenated Amorphous Silicon (a-Si:H) TFT Scan Driver Tsung-Ching (Jim) Huang Tim Cheng Feb

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Reliability Analysis of Flexible Electronics:

Case Study of Hydrogenated Amorphous Silicon

(a-Si:H) TFT Scan Driver

Tsung-Ching (Jim) Huang

Tim Cheng

Feb. 10th 2007

2

Outline

IntroductionMotivation: Why a-Si:H TFT scan driverReliability of a-Si:H TFT circuits

Electrical degradation and self-recovery

Reliability Analysis for Flexible ElectronicsDevice degradation modelReliability simulation

Conclusion

3

Why A-Si:H TFT Scan Driver

Type of TFT Single-Crystal Poly- Si A-Si:H Organic

Proc. Temp. 1000 ºC 450 ºC 200 ºC < 100 ºC

Mobility 270 cm2/Vs 250 cm2/Vs 1 cm2/Vs 0.5 cm2/Vs

Cost/Area High High Medium Low

Maturity High Medium High Low

Flex. Sub. Transfer Transfer Direct Direct

Degrade. N/A Electrical Electrical Elec./Chem.

• Samsung Gen VII display line will produce an area of active electronics equal to ~ 10% of total worldwide IC area per year

• 60,000 1870 mm X 2200 mm panel/month

• Scan driver is used to generate scanning signal to drive TFTs

Ref: Samsung; T.N. Jackson, Penn State Univ.

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Reliability Concern of A-Si:H TFT

Ref: C.-S. Chiang et al, Jap. J. Applied Physics, 1998; AUO Taiwan

a-Si:H(Semiconductor)

Substrate

SiNx (Insulator)

SiNx

Gate

Drain Source

n+ a-Si:H

• Prolonged bias-stress to a-Si:H TFTs will induce electrical degradation which causes threshold voltage (VTH) shift

• Electrical degradation is attributed to bias-induced dangling bonds

• Charge trapping in the SiNx layer and point defect creation in the a-Si:H layer are the major mechanisms

5

Outline

IntroductionMotivation: Why a-Si:H TFT scan driverReliability of a-Si:H TFT circuits

Electrical degradation and self-recovery

Reliability Analysis for Flexible ElectronicsDevice degradation modelReliability simulation

Conclusion

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Electrical Degradation Model

VTH degradation

Pulsed-bias VGS

DC-bias VGS

Pulsed-bias VGS + pulsed-biased VDS

VTH recovery

Reverse pulsed-bias VGS

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Methodology for Reliability Simulation

InputPattern

Device Analyzer

Optimizer

Control Console

Analytical ModelSelection

Device Characterization

FittingParameters

Input SegmentSlicer

Circuit Netlist

HSPICESimulator/Interface

Transient OutputExtractor

Prediction &

Optimization

Model ParameterAdjustment

Degraded Netlist Generator

Ready For Simulation

Analyze

SPICE-level circuit simulationHigh accuracyCompatible with RPI TFT- modelCompatible with Verilog-a behavioral mo

delComprehensive model parameters

Iterative reliability simulationIncrementally change model parameters t

o mimic physical degradation processHigh-accuracy with measured device deg

radation model parameters under various conditions

Simulation time reduction Auto-regressive invariant moving average (ARIMA) model

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Case Study: A-Si:H TFT Scan Driver

A-Si:H TFT scan driver integrated with the LCD pixel circuits on the glass substrate

Save the cost of wire bonding and packaging

Eliminate the need for driver ICsCompatible with low-temperature process

for plastic substrates Device degradation depends on its bias-stress

Degradation profile for each TFT can be obtained by analyzing its bias-stress

Reliability simulation can predict circuit lifetime based on bias-stress analysis

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Comparison of Simulation and Measurement Results

Fig. 1. Before Degradation Fig. 2 After Degradation (33,000s, 85 ºC)

Reliability simulation tool provides a fast and yet accurate way of estimating circuit reliability with a-Si:H TFTs

No physical layout information is required SPICE-compatible Device degradation model and input pattern are needed

Simulation Simulation

Measured Measured

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Conclusion

Flexible electronics are emergingFuture trend in consumer electronicsPotential applications includes:

E-paper, flexible display RFID tags, Implantable IDtags Ubiquitous sensor arrays & rollable solar cells

Reliability analysis is essential Electrical degradation is severe vs. CMOSRobust circuit design and architecture is critical

Our reliability simulation tool shows:Predicting circuit reliability is possible with high accuracy with

in reasonable simulation time

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Q & A

Thank you for your attention !!