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Page 1: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:
Page 2: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:

RECENT ADVANCES in

NETWORKING, VLSI and SIGNAL

PROCESSING

Proceedings of the 12th International Conference on

NETWORKING, VLSI and SIGNAL PROCESSING (ICNVS '10)

Organized by the

Coimbatore Institute of Engineering & Information Technology

with the Technical Co-Sponsorship of WSEAS

University of Cambridge, UK

February 20-22, 2010

Mathematics and Computers in Science and Engineering

A Series of Reference Books and Textbooks

Published by WSEAS Press

www.wseas.org

ISSN: 1790-5117

ISBN: 978-960-474-162-5

Page 3: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:

RECENT ADVANCES in

NETWORKING, VLSI and SIGNAL

PROCESSING

Proceedings of the 12th International Conference on

NETWORKING, VLSI and SIGNAL PROCESSING (ICNVS '10)

University of Cambridge, UK

February 20-22, 2010

Mathematics and Computers in Science and Engineering

A Series of Reference Books and Textbooks

Published by WSEAS Press

www.wseas.org

Copyright © 2010, by WSEAS Press

All the copyright of the present book belongs to the World Scientific and Engineering Academy and

Society Press. All rights reserved. No part of this publication may be reproduced, stored in a retrieval

system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or

otherwise, without the prior written permission of the Editor of World Scientific and Engineering Academy

and Society Press.

All papers of the present volume were peer reviewed by two independent reviewers. Acceptance was

granted when both reviewers' recommendations were positive.

See also: http://www.worldses.org/review/index.html

ISSN: 1790-5117

ISBN: 978-960-474-162-5

World Scientific and Engineering Academy and Society

Page 4: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:

RECENT ADVANCES in

NETWORKING, VLSI and SIGNAL

PROCESSING

Proceedings of the 12th International Conference in

NETWORKING, VLSI and SIGNAL PROCESSING (ICNVS '10)

Organized by the

Coimbatore Institute of Engineering & Information Technology

with the Technical Co-Sponsorship of WSEAS

University of Cambridge, UK

February 20-22, 2010

Page 5: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:
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Editors:

Prof. Cornelia Aida Bulucea, University of Craiova, ROMANIA

Prof. Nagarajan Kalamani, Coimbatore Inst. of Engineering and Information Technology, INDIA

Prof. Nikos Mastorakis, Technical University of Sofia, BULGARIA

Prof. Valeri Mladenov, Technical University of Sofia, BULGARIA

International Program Committee Members:

Moe Z. Win, USA

Hamid Aghvami, UK

Andrea Conti, ITALY

Henk Wymeersch, USA

Andrea Giorgetti, ITALY

Stephen Weinstein, USA

Dharma P. Agrawal, USA

Zoran Bojkovic, SERVIA

Kartalopoulos S., USA

Wasfy M., USA

Kluev V., JAPAN

Zeadally S., USA

Jose M. F. Moura, USA

Vijayakumar Bhagavatula, USA

Gergely V. Zaruba, USA

Mohammed Ghanbari, UK

C.-C. Jay Kuo, USA

Amar Mukherjee, USA

Athanassios Manikas, UK

Dengsheng Zhang, AUSTRALIA

Xingquan Zhu, USA

Satnam Dlay, UK

W. L. Woo, UK

Gianluca Mazzini, ITALY

Gil Zussman, USA

Liang-Gee Chen, TAIWAN

Ahmed H. Tewfik, USA

N.E.Mastorakis, BULGARIA

Jenq-Neng, USA

Amir Hussain, UK

Kyungsup Kwak, KOREA

Hussein Mouftah, CANADA

Ozgur Oyman, USA

Hyundong Shin, KOREA

Alberto Zanella, ITALY

Luis Correia, PORTUGAL

Tony Quek, SINGAPORE

Paulo de Sousa, BELGIUM

Marco Chiani, ITALY

Page 7: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:
Page 8: RECENT ADVANCES in - WSEASB. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth : Low Power Input/Output Port Design Using Clock Gating Technique 63:

Preface

This year the 12th International Conference on NETWORKING, VLSI and SIGNAL

PROCESSING (ICNVS '10) was held at the University of Cambridge, UK, February 20-22,

2010, organized by the Coimbatore Institute of Engineering & Information Technology with the

Technical Co-Sponsorship of WSEAS. The conference provided a platform to discuss

localization for wireless networks, wireless broadcast, multicast, and streaming, physical layer

algorithms, ultra-wide bandwidth communication, wireless emergency and security systems,

innovative user interfaces, peer-to-peer services for multimedia, processor and memory design,

technology modeling-design-simulation, giga-scale integrated circuit manufacturing, digital

imaging, hybrid systems-on-chip, audio / speech / music processing & coding, brain-computer

interface, image and multidimensional signal processing, time-frequency analysis and

representation etc. with participants from all over the world, both from academia and from

industry.

Its success is reflected in the papers received, with participants coming from several countries,

allowing a real multinational multicultural exchange of experiences and ideas.

The accepted papers of this conference are published in this Book that will be indexed by ISI.

Please, check it: www.worldses.org/indexes as well as in the CD-ROM Proceedings. They will

be also available in the E-Library of the WSEAS. The best papers will be also promoted in many

Journals for further evaluation.

A Conference such as this can only succeed as a team effort, so the Editors want to thank the

International Scientific Committee and the Reviewers for their excellent work in reviewing the

papers as well as their invaluable input and advice.

The Editors

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Table of Contents

Analysis of Cooperative MIMO MAC Protocol in Wireless Sensor Networks 13J. Vidhya, G. Kalpana, P. Dananjayan Secured Dynamic Source Routing Protocol for Mobile Sensor Networks 19P. Samundiswary, P. Dananjayan CBERP: Cluster Based Energy Efficient Routing Protocol for Wireless Sensor Network 24Young Han Lee, Kyoung Oh Lee, Hyun Jun Lee, Aries Kusdaryono Energy Conservation for Wireless Mobile Ad hoc Networks using Hexagonal GAF Protocol 29Ankita K. Patel, Radhika D. Joshi 65 nm CMOS Devices for Low PowerApplications 35Kiran Bailey, K. S. Gurumurthy A Discrete Wavelet Transform Based Robust Watermarking for Copyright Protection 39Wen-Tzeng Huang, Sun-Yen Tan, Yuan-Jen Chang, Chin-Hsing Chen Sweeping Fingerprint Verification System Based on Template Matching 44Sun-Yen Tan, Wen-Tzeng Huang, Chin-Hsing Chen, Yuan-Jen Chang Speech Quality Evaluation in IPsec Environment 49Miroslav Voznak, Filip Rezac, Michal Halas The Novel Application of Artificial Neural Networks for a Reliable Secure Wireless Multicast Routing in Mobile Ad-Hock Networks

54

B. S. Vishwanath, Hari Kumar Naidu, K. Thanushkodi, M. B. Sanjay Pandey, G. Vasanth Low Power Input/Output Port Design Using Clock Gating Technique 63Hyeon-Mi Yang, Sea-Ho Kim, Keun-Sik Park, Hi-Seok Kim Performance of a Simple Mixed-Signal Controller of Shunt Active Power Filter using OTA-Based Circuit

67

Sombat Vanichprapa, Cherdchai Prapanavarat, Boonruk Chipipop The Design of an Asynchronous Blocksorter 73Sun-Yen Tan, Wen-Tzeng Huang Proposal for an Efficient Reconfigurable Fixed-Width Multiplier 79Aswathy Sudhakar, D. Gokila Mixed Style of Low Power Multiplexer Design for Arithmetic Architectures using 90nm Technology

83

S. Vijayakumar, B. Karthikeyan A Survey on Anonymous Routing Protocols in MANET 88Shino Sara Varghese, J. Immanuel John Raja A Survey of IP Traceback Mechanisms to overcome Denial-of-Service Attacks 93Shweta Vincent, J. Immanuel John Raja

RECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING

ISSN: 1790-5117 9 ISBN: 978-960-474-162-5

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Novel Approach Design of Elliptic Curve Cryptography Implementation in VLSI 99V. Chandrasekaran, N. Nagarajan Minimization of Crosstalk in High Speed PCB 104D. Anish, G. Kranthi Kumar, Rohita Jagdale Optimization of Reflection Issues in High Speed Printed Circuit Boards 108Rohita Jagdale, A. Venu Gopal Reddy, K. Sundeep Reordering of Test Vector Using Artificial Intelligence Approach for Power Reduction during VLSI Testing

113

K. P. Anitha, K. Paramasivam Scheduling Jobs on Computational Grid using Differential Evolution Algorithm 118S. Selvi, D. Manimegalai Injecting Various Faults for the Dependability Validation of Commercial Microcontrollers 124D. S. Shylu, Silja Purushothaman, Jyothi P. Thomas A Modified Oesophageal Speech Enhancement Using Ephraim-Malah Filter for Robust Speech Recognition

129

C. Ganesh Babu, P. T. Vanathi, Jibby Peter Dcruz A Survey of Key Predistribution Schemes for Key Management in Wireless Sensor Networks 135R. Manoj, N. Dhinakaran The Efficient Architecture Methods for Low Power Content Addressable Memory-Survey 141M. Subha Analysis of Chaos in EEG Signals for Estimation of Drowsiness and Classification of Epilepsy Risk Levels

147

T. S. Hari Vikram, P. Sreenithi, R. Harikumar Generalization of Web Log Datas Using WUM Technique 157M. Saravanan, B. Valaramathi Modified Hybrid Median Filter for Effective Speckle Reduction in Ultrasound Images 166R. Vanithamani, G. Umamaheswari, M. Ezhilarasi Analysis of Energy Consumption in Sensor Networks using Transmission Range Optimization 172R. Sudarmani, K. R. Shankar Kumar Evaluation and Analysis of Bit Error Rate due to Propagation Mechanisms of Millimetre Waves in a QAM System

177

Preethi Kumar, M. Jayakumar English to Tamil Statistical Machine Translation and Alignment Using HMM 182S. Vetrivel, Diana Baby Smart Antenna–AOA Estimation Employing Music Algorithm and Digital Beamforming by Variable Step-Size LMS Algorithm with Novel Mac Protocol for IEEE 802.11

187

T. S. Jeyali Laseetha, R. Sukanesh Asynchronous Computing in Low Power Based Sense Amplifier Pass Transistor Logic 193John Pragasam D., D. S. Shylu Sam

RECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING

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Performance Analysis of Speech Enhancement Algorithm for Robust Speech Recognition System

197

C. Ganesh Babu, P. T. Vanathi, R. Ramachandran, M. Senthil Rajaa, R. Vengatesh A Detailed Survey on Query by Image Content Techniques 204V. Vani, Sabitha Raju Configurability in SaaS for an Electronic Contract Management Application 210Pradeep Kumar Arya, V. Venkatesakumar, S. Palaniswami Enabling Data Storage Security in Cloud Computing for Banking Enterprise 217S. Biruntha, V. Venkatesa Kumar, S. Palaniswami Hydraulics of Honeycomb Type Orifices for Flow Zoning in FBR 225G. K. Pandey, D. Ramdasu, P. Anup Kumar, M. Thirumalai, G. Padmakumar, V. Prakash, C. Anandbabu, P.Kalyanasundaram, G. Vaidyanathan Retail Marketing Segmentation and Customer Profiling for Forecasting Sales 230D. Bhanu, S. Pavai Madheswari Efficient Colour Image Segmentation using Exponential Particle Swarm Optimization 240K. M. Murugesan, S. Palaniswami Paraphrase Identification using Machine Learning Techniques 245A. Chitra, C. S. Saravana Kumar Reinforcement Learning for Quality of Service in Mobile Ad Hoc Network (MANET) 250T. Kumanan, K. Duraiswamy I/Q Imbalance Compensation and Channel Equalization in OFDM Receivers 258S. Ravi, B. Rishikesh Kamath, A. Suhaas Bhargava, S. Aishwarya, S. V. Manohj, P. Sudheesh Performance Comparison of Multipliers for Power-Speed Trade-off in VLSI Design 262Sumit R. Vaidya, D. R. Dandekar VLSI Interconnect Repeater for Sub-Threshold Applications: A Novel Approach 267K. G. Sharma, Tripti Sharma, B. P. Singh, Neha Arora High Speed, Low Power 8T Full Adder Cell with 45% Improvement in Threshold Loss Problem

272

Tripti Sharma, B. P. Singh, K. G. Sharma, Neha Arora Energy Efficient Interface Circuits between Adiabatic and Standard CMOS logic at 90 nm Technology

277

Neha Arora, B. P.Singh, Tripti Sharma, K. G. Sharma Discrete State Space Channel Modeling and Channel Estimation using Kalman Filter for OFDMA Systems

283

Bhagyesh Balakrishnan, T. K. Geethu, Nithin Govindankutty, Priyanka Pradeep, Vishal Karnani, S. Kirthiga Vibrant Ambient Intelligent System for Traffic Congestion Control in Coimbatore City (VAISTC4)

288

N. Sudha Bhuvaneswari, S. Sujatha, R. Yamuna

RECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING

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A Spontaneous Content Based Filtering Approach for Network Security 294N. Sudha Bhuvaneswari, S. Sujatha, Lipika A Survey of Low Power High Speed one Bit Full Adder 302N. M. Chore, R. N. Mandavgane Advance Technology Base Domestic and Industrial Automation through AC Power Line Modem

308

Anil K. Gavane, Nitiket N. Mhala Enhanced Music+ Algorithm based Transceiver for Multicode Multicarrier CDMA 314S. Praveen Chakkravarthy, N. Nagarajan, V. Arthi Quaternion-Based Albedo Recovery for Shape Reconstruction 321B. Sathya Bama, M. Anitha, S. Raju, V. Abhaikumar Modeling and Performance Evaluation of Wide Bandgap Semiconductors Devices for High Power Applications

327

B. N. Shashikala, B. S. Nagabhushana, S. K. Shastry Literature Survey of Nonblocking Network Topologies 336S. Umarani, S. Pavai Madheswari, N. Nagarajan Authors Index 342

RECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING

ISSN: 1790-5117 12 ISBN: 978-960-474-162-5

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Authors Index

Abhaikumar, V. 321 Karthikeyan, B. 83 Ramdasu, D. 225 Aishwarya, S. 258 Kim, H.-S. 63 Ravi, S. 258 Anandbabu, C. 225 Kim, S.-H. 63 Reddy, A. V. G. 108 Anish, D. 104 Kirthiga, S. 283 Rezac, F. 49 Anitha, K. P. 113 Kumanan, T. 250 Samundiswary, P. 19 Anitha, M. 321 Kumar, C. S. S. 245 Saravanan, M. 157 Arora, N. 267, 272, 277 Kumar, G. K. 104 Selvi, S. 118 Arthi, V. 314 Kumar, K. R. S. 172 Sharma, K. G. 267, 272, 277Arya, P. T. 210 Kumar, P. 177 Sharma, T. 267, 272, 277Babu, C. G. 129, 197 Kumar, P. A. 225 Shashikala, B. N. 327 Baby, D. 182 Kumar, V. V. 210, 217 Shastry, S. K. 327 Bailey, K. 35 Kusdaryono, A. 24 Shweta, V. 93 Balakrishnan, B. 283 Laseetha, T. S. J. 187 Shylu, D. S. 124, 193 Bama, B. S. 321 Lee, H. J. 24 Singh, B. P. 267, 272, 277Bhanu, D. 230 Lee, K. O. 24 Sreenithi, P. 147 Bhargava, A. S. 258 Lee, Y. H. 24 Subha, M. 141 Bhuvaneswari, N. S. 288, 294 Lipika 294 Sudarmani, R. 172 Biruntha, S. 217 Madheswari, S. P. 230, 336 Sudhakar, A. 79 Chakkravarthy, S. P. 314 Mandavgane, R. N. 302 Sudheesh, P. 258 Chandrasekaran, V. 99 Manimegalai, D. 118 Sujatha, S. 288, 294 Chang, Y.-J. 39, 44 Manohj, S. V. 258 Sukanesh, R. 187 Chen, C.-H. 39, 44 Manoj, R. 135 Sundeep, K. 108 Chipipop, B. 67 Mhala, N. N. 308 Tan, S.-Y. 39, 44, 73 Chitra, A. 245 Miroslav Voznak, M. 49 Thanushkodi, K. 54 Chore, N. M. 302 Murugesan, K. M. 240 Thirumalai, M. 225 Dananjayan, P. 13, 19 Nagabhushana, B. S. 327 Thomas, J. P. 124 Dandekar, D. R. 262 Nagarajan, N. 99, 314, 336 Umamaheswari, G. 166 Dcruz, J. P. 129 Naidu, H. K. 54 Umarani, S. 336 Dhinakaran, N. 135 Padmakumar, G. 225 Vaidya, S. R. 262 Duraiswamy, K. 250 Palaniswami, S. 210, 217, 240 Vaidyanathan, G. 225 Ezhilarasi, M. 166 Pandey, G. K. 225 Valaramathi, B. 157 Gavane, A. K. 308 Pandey, M. B. S. 54 Vanathi, P. T. 129, 197 Geethu, T. K. 283 Paramasivam, K. 113 Vani, V. 204 Gokila, D. 79 Park, K.-S. 63 Vanichprapa, S. 67 Govindankutty, N. 283 Patel, A. K. 29 Vanithamani, R. 166 Gurumurthy, K. S. 35 Pradeep, P. 283 Varghese, S. S. 88 Halas, M. 49 Pragasam, J. D. 193 Vasanth, G. 54 Harikumar, R. 147 Prakash, V. 225 Vengatesh, R. 197 Huang, W.-T. 39, 44, 73 Prapanavarat, C. 67 Vetrivel, S. 182 Jagdale, R. 104, 108 Purushothaman, S. 124 Vidhya, J. 13 Jayakumar, M. 177 Raja, J. I. J. 88, 93 Vijayakumar, S. 83 Joshi, R. D. 29 Rajaa, M. S. 197 Vikram, T. S. H. 147 Kalpana, G. 13 Raju, S. 321 Vishwanath, B. S. 54 Kalyanasundaram, P. 225 Raju, Sab. 204 Yamuna, R. 288 Kamath, B. R. 258 Ramachandran, R. 197 Yang, .H.-M. 63 Karnani, V. 283

RECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING

ISSN: 1790-5117 342 ISBN: 978-960-474-162-5