Yi Zhang, RTDS Technologies Inc.

August 2019

Real Time Digital Simulation for Large Power Systems with Embedded Power Electronics

Outline

• Introduction of RTDS Real Time Simulator;

• Modelling of large power grids;

• Modelling of power electronics circuit;

• Post analysis of simulation results;

• Conclusions and hope

History of RTDS Technologies1986

RTDS development

project begins

1989

World’s 1st real-time digital

HVDC simulation

1993

1st commercial

installation

1994

RTDS Technologies

Inc. created

Background and History:

• Manitoba HVDC Research Centre was founded in early 80s.

• RTDS Development Project initiated in 1986

• World’s 1st real time HVDC simulation was achieved in 1989

• 1st commercial installation in 1993

• RTDS Technologies created in 1994

4

Modelling of Large Power Grids

Multi-Rate Full EMT Simulation in Real Time

Interface with ~67.5 KM TLINE

Interface with ~45 KM TLINE

Superstep

• Superstep is an alternative approach for system equivalence to model a large remote network.

Traditionally an ideal source with an impedance has been used to model such equivalents.

• Advantages for User:

1) The detail of EMT simulation is retained for the

equivalent.

2) A remote network’s control elements can be

modeled.

3) Generator dynamics can be modeled so frequency

deviations due to the load/generation imbalance can

be observed.

Superstep

Mainstep

Multi-Rate T-line

Time

Super Step Main Step

Interpolation

Aggregation

Aggregation

Interpolation

im(t)=Vm(t)/Z+Im_hist

Super Step

Z

is(t)=Vs(t)/Z+Is_hist

Vs

is

Is_hist

Is_hist --- Aggregation

from Vm and Im

Main Step

Z Vm

im

Im_hist

Im_hist --- Interpolation

from Vs and Is

7

Validation of Multi-rate TLINE

Frequency response of multi-rate transmission line shows:• Performance is accurate within 500Hz for ΔT-3ΔT combination, up to 150 us

Example: Manitoba Hydro System

(218 single phase nodes)

Kettle

Long Spruce

Limestone

DorseyRadisson

Henday

Forbes SVS

Jenpeg

Grand Rapids

St. Leon Wind

Parkdale Substation

Pine Falls

Great Falls

Seven Sisters

2x Superstep

AC System Modelled by Super Step Approach

The Architecture of Full EMT Simulation of Large Network

The main network

100 Bus

100 Bus

Interface with ~67.5 KM TLINE

100 Bus

100 Bus

100 Bus

Interface with ~45 KM TLINE

100 Bus

For an example: • One NovaCor Chassis use 5 cores to model

external network by super step box• Assume the main network has 100 bus• The total capacity of a NovaCor Chassis is to

model 600 bus

36 NovaCor Chassis can model: 3600 main network bus 18000 external network bus All in EMT and in Real Time Total 21600+ bus Already a very large system

We Are Ready to Do Full EMT Real Time

Simulation for Very Large Power Network

with 20000+ Bus!

The History of Real Time Simulation of Switching Devices

• Improve firing (local interpolation) in large time step (50 hz): Successful in LCC HVDC with slow switching (~1998)

• LC Switching algorithm avoiding G matric change (~2003)

• Low Loss Bridge with local R switching and interface transmission lines (~2007)

• Predictive Resistive Switch Algorithm on NovaCor (~2018)

Simulation of Power Electronics

Simulation of Power Electronics

• The challenge is to model the high frequency switching.

• The On and Off resistor are traditionally represented by the small and large resistors.

• The topology change causes the frequent refactorization of Y matrix.

• It becomes hard when the switch frequency is high. For instance, if the time step are 2 us, it needs to refactorize the G matrix every 2 us.

• The question is: within 2 us, how big a matrix can be refactorized?

The Representations of Switch Devices of Power

Electronics Circuits

Open

Large R

High

impedance

Close

Small R

Small

impedance

The Y matrix

changes

Due to the computational burden, real time simulators have employed LC switching

representation for high switching frequency circuits with time step size 1-4 uSec.

For a given C and ΔT, there is a

corresponding L, which

causes ΔT/2C = 2L/ΔT = Rb

Open

small C

Closed

small L

C=ΔT/2Rb L=RbΔT/2

Dommel

branch

Rb

High

impedance

Low

impedance

• LC switching method is associated with higher then expected converter losses

• Signal noise due to voltage and current oscillations

• Reduce operational bandwidth due to frequency dependent switching impedances

LC Switching Algorithm

Small Time Step Techniques

• The loss of small L and small C is not controllable

• Now return back the small R and large R method

• The solution is to pre-inverting the matrix and store it

• Limitation is the matrix cannot be large than 6 or 7

• Now we have to introduce a method to separate and

integrate the small network.

• The step line, traveling time 2 us, about 600 meters,

is used.

• Low loss bridge method can handle high frequency

switching

• Solved the loss problem but brought approximations

• Cannot work for complicated configuration, because

the firing logic is not easy to implemented

QUESTION?

Can we go back to the resistive switching?• The vast computing power from the RTDS NovaCor platforms has made it possible to perform

Nodal Admittance Matrix re-factorization (Real Time Network Solution) for very low time step

sizes (~small as 1.5 uSec)

• With Real Time Network Solution, resistive switching representation will be supported

• Low virtual losses

• High switching frequencies

• Cleaner waveformsOpen

Large R

High

impedance

Close

Small R

Small

impedance

The Y matrix changes

• Real time simulation does not use such

interpolation or iteration techniques

Simple Voltage Boost Converter example

• When the IGBT Valve 2 is fired ON, the diode

V1 should change from ON state to OFF state

for the next time step

• If not properly predicted, Both IGBT and diode

will be ON for 1 time step

• Results in a large erroneous spike in current

Difficulty of Resistive Switching

• Off line simulation tools employs interpolation techniques to eliminate numerical inaccuracies that

can arise with switching events

without proper prediction

Do we know the switching statues of next time step?

Predictive Resistive Switching

Assumptions:• Weak electrical interaction between switch devices

from different legs

• Strong electrical interaction between switch device

within a leg

As a results, predictive ON/OFF statuses can be

predicated separately for each leg

Predictive Resistive Switching

Procedure of predicting the switching status:

1. Solve the circuit and get a preliminary solution of each node voltage

2. Calculate each branch voltage

3. Predicting the switching status according to the branch voltage

Predictive resistive switching is a method of predicting the ON/OFF statuses of

switches in a VSC for the next time step when switched resistances are used

Predictive Resistive Switching

A

Ron/RoffRrcIhrc1

Ron/RoffRrcIhrc2

P

O

N

N1

RL

IhL

Ron/Roff

Example: 3 level T-type leg• 4 switches per leg in real circuit

• 2 switches connected is series with

neutral path can be combined to one

switch for EMT model

• Test circuit will have 3 switched

resistances

• 8 possible switching combination

• Test circuit will go through each

combination to find valid combination

based on latest firing pulses, history

currents, peripheral nodes voltages

• Will apply valid switching combination for

the next time step to actual T-type bridge

T-type test circuitT-type resistive switching model

Predictive Resistive Switching

Example: 3 level NPC• Each leg of an NPC configuration will

have six (6) switched resistances.

• It is possible to develop a switched-

resistance 3 level NPC VSC bridge by

using a switched-resistance T-type

bridge model as a surrogate network.

• The NPC firing pulses will be mapped to

the T-type converter.

• For monitoring purposes, the T-type

valve currents can also converted to the

currents that would exits in a NPC bridge

model.

• The execution time will be similar to a T-

type converter bridge.

Single leg for NPC and T-type converter

Example Case : Back to Back 3 phase 2 level VSC

Simulation Results

HPF

N1

I2

I1

CRTA

33kV

33/42.5 MVA

33kVY Y

N2

N3

33/42.5 MVA

Load HPF Load

• 22 nodes system• 18 conductance values (12 IGBTs and 6 breakers)• 16 nodes are connected to a switch resistive branch

• The entire circuit runs on a single core• The entire circuit runs at 1.563 usec times• High level controls are at 25 usec

Simulation Results

Plots 1. AC side load currents2. Voltage of internal phase A node

N13. Upward current through Valve 14. Current through Valve 2 and

Valve 3 directed to the load5. Upward current through valve 4.

• The plots are clear and without noise• No interpolating or iteration

techniques• predictive resistive switching method

is used

Switching Frequency (Hz)

Losses (%)

3060 0.259

9900 0.333

• Losses likely lower then in real physical t-type converter• Losses can be increased by modifying the ON and OFF

resistances – User configurable losses.

3060 Hz switching frequency

Application Prospective

Available Model with Predictive Switching Methods:

• 2 Level VSC

• 3 Level T Type VSC

• 3 Level NPC• Buck and Boost Converters

Meets the requirement of most high

and medium level voltage power

electronics circuit used in renewable energy sources.

Post analysis of simulation results

Frequency scanning is a “microscope” to examine the results of simulation

• Extract mode of oscillation to analyze system dynamics, such as SSCI;

• Valid the simulation results

• RTDS can provide the frequency scanning for external controllers

Frequency domain analysis

Ac system

Dc converter 1

Dc control 2

Dc converter 2 Dc control 1

• Here the system is cut into I and II (for example);

• Assuming both H1 and H2 are available;

• The interconnected I and II are forming a closed loop system (the input of I is the output of II, vice-versa)

H1(f)

H2(f)

I II

Frequency response scanning

System to be scanned

Signal Perturbation, Frequency f

U(t) = U*cos(2𝜋𝑓𝑡)

OutputFrequency f

Y(t) = Y*cos(2𝜋𝑓𝑡+𝜑)

𝐻𝑠𝑦𝑠 𝑓 =ሶ𝑌

ሶ𝑈=

𝑌

𝑈∠ 𝜑

Basic principle:

TM Lb

Lb

Pac =-800MWQac = 0Mvar

Ldc=0.03H Rdc=2ohm

Cdc=40uF Vdc=202kV

Ls=0.075H Rs=2.4ohm

SCR=7.62(84Deg)880MVA(Xl=18% )

CIGRE DCS1 Stability AnalysisOperation Mode: AC active power and reactive power control

Pac_ref = -800MW; Qac_ref = 0Mvar

MMC and AC System Interaction (1) Sub-synchronous Interaction

(2) High Frequency Interaction

Impedance looking from here

CIGRE DCS1 Stability Analysis (1)DCS1 MMC Impedance Scanning from AC side

CIGRE DCS1 Stability Analysis (1)The ac side admittance can be easily obtained as:

Vs (s)

+_ Yac(s)I(s)E(s)

Zmmc(s)

Vmmc(s)

𝑇_𝑜𝑝(𝑠) = Yac s Zmmc(s)

T_cl(s) =Yac s

1 + Yac s . Zmmc(s)

Open loop transfer function

Closed loop transfer function

The DCS1 system stability and margin can be determined by the calculation of matrix

Yac(s)Zmmc(s) eigenvalues.

𝒀𝒂𝒄 𝒔 =𝑠𝐿 + 𝑅 𝜔0𝐿−𝜔0𝐿 𝑠𝐿 + 𝑅

−1

CIGRE DCS1 Stability Analysis (1)Yac(s)Zmmc(s) Eigenvalue Bode Plot

The magnitude margin: @26 Hz is 3.693; @2 Hz is 7.4

CIGRE DCS1 Stability Analysis (1)DCS1 Closed Loop Representation

Vs

+_ Yac(s)

I(s)E(s)

Zmmc(s)

Vmmc(s)

𝑇_𝑜𝑝 𝑠 = K ∗ Yac s Zmmc(s)

T_cl(s) =K ∗ Yac(s)

1 + K ∗ Yac s . Zmmc(s)

Open loop transfer function

Closed loop transfer function

By changing the proportion K, i.e., changing ac system strength, the

critical SCR can be found.

K

CIGRE DCS1 Stability Analysis (1)DCS1 Critical SCR (CSCR) and Time Domain Validation

CSCR =SCR

𝐾=

7.62

3.693= 2.063

The All-in-One Real Time Simulator

The Goal of RTDS Technologies is to provide:

An All-in-One Real Time Simulator for Power System and Power Electronics.

• Largest system possible

• Smallest time step and details of switching

• Most detailed modelling

• All-in-One simulator covers from small to large scale circuits

• Continual Innovation and Research & Development

• Interacting and collaborating with users of simulation practice and applications.

Covers from nanosecond to hundred microsecond time scale

Questions