29
5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for S3C2450X Date 1. PCB Revision CPU Board Page Function 01 S3C2450(Addr/Data) 02 S3C2450(Camera/LCD..) 03 S3C2450(Power) 04 Memory(mSDR,mDDR,DDR2) 05 Memory(OneNand)/JTAG/CLK 06 Buffers(SROM I/F) 07 USB/HS_MMC/HS_SPI 08 CPU B/D Power(ARM, INT) 09 CPU B/D Power(Alive, I/O) 0A Board to Board Connector (CPU) 0B PMIC DC-DC/Audio 0C PMIC Power Base Board 01 NOR/SRAM/NAND/CONFIG 02 CF+/External Bus IF 03 Ethernet Controller(CS8900) 04 Ethernet Controller(LAN91C115) 05 LCD General/SPI/ADC 06 LCD:TFT RGB Parallel 07 LCD:TFT RGB Serial/CPU 08 Camera IF/I2C 09 Audio(Demux&Conn) 0A Audio(AC97&Power) 0B Audio(I2S 5.1ch/I2S&PCM) 0C UART/IrDA 0D External I/O 0E Base B/D Power 0F Board to Board Connector (Base) Ext. OneNand Rev 0.0 2007. 11. 22 Preliminary Version 3. Part Reference <Component><Number> U - COMPONENT IC & REGURATOR IC C - CAPACITOR CT- TANTAL CAPACITOR R - RESISTER RP - RESISTOR PACK VR - VARIABLE RESISTER J - JUMPER L - INDUCTOR F - FERRITE BEAD Y - OSCILLATOR X - CRYSTAL Q - TRANSISTOR/FET D - DIODE SW - TACT/PUSH SWITCH CON - CONNECTOR CFG - DIP SWITCH TITLE BLOCK 0.0 SMDK2450 (S3C2450 Evaluation Board) A3 1 13 Friday, January 25, 2008 SAMSUNG ELECTRONICS CO.,LTD Title Size Document Number Rev Date: Sheet of

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Page 1: read.pudn.comread.pudn.com/downloads156/doc/project/695518/smdk2450_rev0_… · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

2. Table of Contents

Description

SMDK2450 Evaluation Board for S3C2450XDate1. PCB Revision

CPU BoardPage Function01 S3C2450(Addr/Data)02 S3C2450(Camera/LCD..)03 S3C2450(Power)04 Memory(mSDR,mDDR,DDR2)05 Memory(OneNand)/JTAG/CLK06 Buffers(SROM I/F)07 USB/HS_MMC/HS_SPI08 CPU B/D Power(ARM, INT)09 CPU B/D Power(Alive, I/O)0A Board to Board Connector (CPU)0B PMIC DC-DC/Audio0C PMIC Power

Base Board01 NOR/SRAM/NAND/CONFIG02 CF+/External Bus IF03 Ethernet Controller(CS8900)04 Ethernet Controller(LAN91C115)05 LCD General/SPI/ADC06 LCD:TFT RGB Parallel07 LCD:TFT RGB Serial/CPU08 Camera IF/I2C09 Audio(Demux&Conn)0A Audio(AC97&Power)0B Audio(I2S 5.1ch/I2S&PCM)0C UART/IrDA0D External I/O0E Base B/D Power 0F Board to Board Connector (Base)

Ext. OneNand

Rev 0.0 2007. 11. 22 Preliminary Version

3. Part Reference

<Component><Number>

U - COMPONENT IC & REGURATOR ICC - CAPACITORCT- TANTAL CAPACITORR - RESISTERRP - RESISTOR PACKVR - VARIABLE RESISTERJ - JUMPERL - INDUCTORF - FERRITE BEADY - OSCILLATORX - CRYSTALQ - TRANSISTOR/FETD - DIODESW - TACT/PUSH SWITCHCON - CONNECTORCFG - DIP SWITCH

TITLE BLOCK 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

1 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

Page 2: read.pudn.comread.pudn.com/downloads156/doc/project/695518/smdk2450_rev0_… · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

nBATF<Silk>

<Silk>

nRESET

S3C2450 (SROM_BUS/DRAM_BUS/SYSTEM) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

2 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

SDATA29

SDATA26

SDATA20

SADDR5

RAD

DR

25

RAD

DR

13

SDATA21

SDATA8

RD

ATA

1

RAD

DR

15SDATA4

RD

ATA

15R

DA

TA14

SDATA27

SDATA24

SDATA6

SADDR11

SADDR9

RAD

DR

17

RAD

DR

14

RAD

DR

11

RAD

DR

5

SADDR10

SADDR2

RD

ATA

9

RD

ATA

5

SDATA3

RD

ATA

8

RAD

DR

22

RAD

DR

4

RAD

DR

2

SDATA28

SDATA15

SDATA0

SADDR0

RAD

DR

19

RAD

DR

16SDATA5

SADDR14

SADDR4SADDR3

RAD

DR

1R

ADD

R0

SDATA30

SADDR7

RD

ATA

13

RD

ATA

10

SDATA17

RD

ATA

0

RAD

DR

12

RAD

DR

8

RAD

DR

6

SDATA14

SADDR8

RD

ATA

6

RD

ATA

4

RAD

DR

9

RAD

DR

3

SDATA22

SDATA13

SADDR6

RD

ATA

12

RAD

DR

23

SDATA31

SDATA16

SDATA1

SDATA18

SDATA12

SDATA9

SADDR12

RD

ATA

7

RAD

DR

20

RAD

DR

10

RAD

DR

7

SDATA25

SDATA23

SDATA11

SADDR1

SDATA19

SDATA10

RD

ATA

2

SDATA7

SDATA2

SADDR15

RD

ATA

11

RD

ATA

3

RAD

DR

24

RAD

DR

21

RAD

DR

18

DQM25

nSWE5

nWAIT 11

nSCLK5

OM0 6

DQS05

nSCAS5

nSCS15

DQM15

nRCS0 6

nRSTOUT 11,12

SCLK5

OM2 6

RSMCLK 6

nFWE 7

RDATA[15:0]6,7

DQM05

DQS15

RSMBWAIT 6

OM1 6

nFRE 7nSRAS5

FCLE 7

nWE_CF 7

RSMAVD 6

nOE_CF 7

RnB 11

nRCS1 7

OM4 6

nFCE 7

FALE 7

PWR_EN 9,12

SCKE5

DQM35

OM3 6

nSCS05

CLKOUT1 10,11

nRESET 6,9,11,12

SADDR[12:0]5

SDATA[31:0]5

SADDR145SADDR155

CLKOUT0 11

nXBACK 11

nRESET 6,9,11,12

RADDR[25:0]6,7

nBATT_FLT 12

nBATT_FLT 12

nROE 6,7

nRBE0 7

nRCS5 7

nRCS3 7nRCS4 7

nRCS2 7

nRWE 6,7

nRBE1 7

nXDACK1_IICSDA1 11nXDREQ1_IICSCL1 11nXDACK0_I2S0_SDO1 11nXDREQ0_I2S0_SDO2 11

RTCK6 nXBREQ11

VDD_D

VDD_MEMORY VDD_D

VDD_D

VDD_MEMORY

VDD_MEMORY

DRAM BUS(mSDR/mDDR/DDR2)PWR:VDD_SDRAM

EBI BUS(NOR/NAND/ONENAND/CF)PWR:VDD_SRAM

SYSTEM CONTROLPWR:VDD_OP2

EBI BUS CONTROLPWR:VDD_SRAM

DRAM BUS CONTROLPWR:VDD_SDRAM

IIC1/IIS0/RTCK/CLKOUTPWR:VDD_OP2

PWR:VDD_OP1

U2A

S3C2450X

A17

H16

C16

G16

C17

B17

AC9AB10

D3

F3 F2

R20

F4E1

G4

A4D5

A2A1B3C1C4E4

P22M16

B4A3

H15

D17

B15

C14

G14

B16

D2

H11

B11

AC4Y5

AB6

AC5

U8

AA5

V22V23W23U17Y20

R23

C5

D6

B5

A5

B6

G8

A6

B7

C7

A7

B8

C8

A8

D8

B9

H9

A9

G9

C9

J10

B10

G10

A10

J11

C10

D10

J1 K8

K3

J7 K4

H1

J3 J4 H3

J8 H2

H7

G1

G3

G2

H4

B1

B2

C2

H14A14G13D15B13A13H13D14G12B12C12A12H12D12G11D11

A15

A16C18D18B18B19A20D20A21A22B20B21B22C21A23B23C23D21E22D23G20E21F20E23F23G22F21G21H21H22J17H23K15J22

DQ

M0

DQ

M1

DQ

M2

DQ

M3

DQ

S0D

QS1

CLKOUT0/GPH13CLKOUT1/GPH14

FALE

/GP

A18

FCLE

/GP

A17

FRnB

/GP

M1

nBATT_FLT

nFC

E/G

PA

21nF

RE

/GP

A20

nFW

E/G

PA

19

nRBE0nRBE1

nRCS0nRCS1/GPA12nRCS2/GPA13nRCS3/GPA14nRCS4/GPA15nRCS5/GPA16

nRESETnRSTOUT

nROEnRWE

nSC

S0

nSC

S1

nSC

LKnS

CA

SnS

RA

SnS

WE

nWAIT

nOE

_CF/

GP

A11

nWE

_CF/

GP

A27

nXBACK/GPB5nXBREQ/RTCK/GPB6

nXDACK0/I2S0_SDO1/GPB9

nXDACK1/IICSDA1/GPB7

nXDREQ0/I2S0_SDO2/GPB10

nXDREQ1/IICSCL1/GPB8

OM0OM1OM2OM3OM4

PWR_EN

RA

DD

R0/

GP

A0

RAD

DR

1R

ADD

R2

RAD

DR

3R

ADD

R4

RAD

DR

5R

ADD

R6

RAD

DR

7R

ADD

R8

RAD

DR

9R

ADD

R10

RAD

DR

11R

ADD

R12

RAD

DR

13R

ADD

R14

RAD

DR

15R

AD

DR

16/G

PA

1R

AD

DR

17/G

PA

2R

AD

DR

18/G

PA

3R

AD

DR

19/G

PA

4R

AD

DR

20/G

PA

5R

AD

DR

21/G

PA

6R

AD

DR

22/G

PA

7R

AD

DR

23/G

PA

8R

AD

DR

24/G

PA

9R

AD

DR

25/R

DA

TA_O

EN

RD

ATA

0R

DA

TA1

RD

ATA

2R

DA

TA3

RD

ATA

4R

DA

TA5

RD

ATA

6R

DA

TA7

RD

ATA

8R

DA

TA9

RD

ATA

10R

DA

TA11

RD

ATA

12R

DA

TA13

RD

ATA

14R

DA

TA15

RS

MB

WA

IT/G

PM

0R

SMC

LKR

SM

VA

D/G

PA

24

SADDR0SADDR1SADDR2SADDR3SADDR4SADDR5SADDR6SADDR7SADDR8SADDR9SADDR10SADDR11SADDR12SADDR13SADDR14SADDR15

SC

KE

SC

LKSDATA0SDATA1SDATA2SDATA3SDATA4SDATA5SDATA6SDATA7SDATA8SDATA9SDATA10SDATA11SDATA12SDATA13SDATA14SDATA15SDATA16/GPK0SDATA17/GPK1SDATA18/GPK2SDATA19/GPK3SDATA20/GPK4SDATA21/GPK5SDATA22/GPK6SDATA23/GPK7SDATA24/GPL8SDATA25/GPK9SDATA26/GPK10SDATA27/GPK11SDATA28/GPK12SDATA29/GPK13SDATA30/GPK14SDATA31/GPK15

C1

100nF

R9 4.7K

TP1

nXBACK

1

TP5

CLKOUT1

1

SW1

push

1

4

2

3

TP2

nXBREQ

1

TP3

SADDR131

R7

4.7K

R1

100K

C3

100nF

U1SN74LVC1G17DBV

5

2

3

4

C2 100nF

R3NC

R41K

TP4

CLKOUT0

1

U3

MAX6412UK22

1

4

5

3

2

nRESET

SRT

VCC

nMR

GND

R8 4.7K

SW2

push

1

4

2

3

R51K

R20

R6100K

TP6

nXDACK0

1

TP7

nXDREQ0

1

Page 3: read.pudn.comread.pudn.com/downloads156/doc/project/695518/smdk2450_rev0_… · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(nLCD_RESET)

RGB CPU

-VD[17:0]= R/G/B

RGB Serial

- VD[23:16] = 1st Red = 2nd Green = 3rd Blue

RGB Parallel

- VD[23:16] = Red - VD[15: 8] = Green - VD[ 7: 0] = Blue

[1-4]

OFF

useI2S1/PCM1

ON

CFG6SDO only(Def.)

[5]

[6]

ON

OFF

OFF

ON

<Silk>

S3C2450 (LCD/CAM/USB/UART/IIS/IIC/TIMER..) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

3 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

VD

21

VD

13

VD

11

SD

1_D

AT4

SD1_DAT5

VD

22

VD

10

VD

4

CAMDATA7

VD

15

SD

1_D

AT3

SD

1_D

AT1

CAMDATA4

CAMDATA1

SD1_DAT6

VD

6

VD

1

VD

19

VD

14

CAMDATA5

VD

9

VD

3

SD

1_D

AT5

SD0_DAT3

SD

1_D

AT7

CAMDATA2

VD

8

VD

2

VD

18V

D17

CAMDATA3

SD0_DAT0

SD1_DAT4

VD

7

SD0_DAT1

SD

1_D

AT6

CAMDATA6

VD

20

VD

0

VD

23

SD0_DAT2

SD1_DAT7

VD

16

SD

1_D

AT0

CAMDATA0

VD

12

VD

5

SD

1_D

AT2

SPIMISO18,11

I2S0_SDO_PCM0_SDO_AC_SDO11

TXD111

TCK6

RTS111

SPICLK18,11

nTRST6

RXD011

SPIMISO08,11

I2S0_SCLK_PCM0_SCLK_AC_SYNC11

TXD011

IICSCL11,12

SPIMOSI08,11

TDO6

CTS011RTS011

SPICLK08,11

I2S0_LRCK_PCM0_FSYNC_AC_nRESET11

TMS6

RXD111

nSS18,11

I2S0_CDCLK_PCM0_CDCLK_AC_BIT_CLK11

UARTCLK11

IICSDA11,12

nSS08,11

TDI6

CTS111

SPIMOSI18,11

I2S0_SDI_PCM0_SDI_AC_SDI11

TOUT111nDIS_OFF11

PWREN_USBH8

VD[23:0] 11

VBUS_DET 8

EINT2 11

PWREN_CF 11RESET_CF 11

nINPACK_CF 11

nCD_SD0 8EINT0 11

nONE_RST 6

nREG_CF 7,11

nIRQ_CF 11

nLED89,11

RGB_VCLK11RGB_HSYNC11RGB_VSYNC11

RGB_VDEN11

SD1_LED/I2S1_LRCK/PCM1_FSYNC

SD1_nWP8SD1_nCD8

SD1_CMD8SD1_CLK8

AIN0 11

CAMDATA[7:0] 11

TSXP 11

AIN5 11AIN4 11

DN0 8DM_UDEV 8

CAMHREF 11

TSXM 11

DP0 8

TSYM 11

AIN3 11

AIN1 11

VREF 10

CAMRESET 11

AIN2 11

CAMPCLKOUT 11

CAMVSYNC 11

TSYP 11

CD_CF_CAM_FIELD_A 11

SD0_CLK8SD0_CMD8

SD0_DAT[3:0]8

SD1_DAT[7:0]8

SD1_LED/I2S1_LRCK/PCM1_FSYNC

SD1_DAT[7:0]8I2S1_SCLK_PCM1_SCLK 11I2S1_CDCLK_PCM1_CDCLK 11I2S1_SDI_PCM1_SDI 11I2S1_SDO_PCM1_SDO 11I2S1_LRCK_PCM1_FSYNC 11SD1_LED 8

TXD311

TXD211

RXD311

RXD211

TOUT29,11

EINT10 7

nINT_REG_LE 9

EINT13 7

EINT9 7

EINT11 7

EINT14 7EINT15 7

nARM_REG_LE 9

EINT8 7

CORE_REG_OE 9

IRQ_LAN 11

LCD_PWREN 11

nLED49,11,12nLED29,11,12

nLED19,11,12

EINT3 11

ONE_INT 6

BACKLIGHT_PWM11

EXTCLK 6

XI_UDEV 8

XTIRTC 6XTOPLL 6XTIPLL 6

XTORTC 6EPLLCAP 6

CAMPCLK 11

REXT 8

XO_UDEV 8

MPLLCAP 6

DP_UDEV 8

VDD_D

R141K

TP10TOUT1

CFG6

SW-SLIDE6

1234

876

59101112

SD/MMC/HS_MMCPWR:VDD_SD

SPIPWR:VDD_SD

UARTPWR:VDD_SD

PWM TIMERPWR:VDD_OP2

JTAGPWR:VDD_OP1

IIC0PWR:VDD_OP2

I2S0/PCM0/AC97PWR:VDD_OP2

EINTPWR:VDD_OP2

PLLPWR : /VDD_OP1/VDD_RTC/VDD_EPLL/VDD_MPLL/VDD_OP1

USBPWR : /VDDA33T1/VDDA33C/VDD_OP1

CAMERAPWR:VDD_CAM

ADCPWR:VDDA_ADC

LCDPWR:VDD_LCD

I2S1/PCM1PWR:VDD_SD

UARTPWR:VDD_OP2

OP3/LCDPWR:VDD_OP3

EINTPWR:VDD_OP1

U2B

S3C2450X

Y22AA23AA21AB23AA22AB22AB21AC23Y19AA20

K1L8L2L7M2L9M3M8

K2

K9

N3M7

K7

L17L23M23K17

T22

T20

R17

T23

P15

R22

P16

T21

N22

N16

N23

P21

N20

N17

N21

M15

R9

AB

9T1

0A

A9

R10

AC

10T1

1A

A10

R11

AA

11Y

11A

A12

T12

U11

AC

11

AB7

T9

AA6

AB8N

15P

20P

17P

23R

21

AA7

AA8

AB13

AA13

AC7

U9

T13

U13AC6

AB12

T14

AC12

Y14

U12

AB14

AC14R13

AA

4A

C1

AC

2A

B3

AA

3

R14

AB

15

AC

16A

A15

U15

AA

16R

15A

B16

U16

AC

17

AA

14U

14A

C15

Y16AC18

Y17AB18AA18AC19

N8

P1

N9

N1

M9

P3

R4

N7

P2

P7

T1 P9

R3

T2 T3 R7

U1

R8

V1

T7 U3

T8 V2

V3

W1

W3

W2

Y3

Y4

AB

1A

B2

AA

2

L21L15

R16U23W22V20AC22

W20

Y18V21

K23

AIN0AIN1AIN2AIN3AIN4AIN5

AIN6/YMAIN7/YPAIN8/XMAIN9/XP

CAMDATA0/GPJ0CAMDATA1/GPJ1CAMDATA2/GPJ2CAMDATA3/GPJ3CAMDATA4/GPJ4CAMDATA5/GPJ5CAMDATA6/GPJ6CAMDATA7/GPJ7

CAMHREF/GPJ10

CAMPCLK/GPJ8

CAMPCLKOUT/GPJ11CAMRESET/GPJ12

CAMVSYNC/GPJ9

DM_UDEVDN0DP0

DP_UDEV

EIN

T0/G

PF0

EIN

T1/G

PF1

EIN

T2/G

PF2

EIN

T3/G

PF3

EIN

T4/G

PF4

EIN

T5/G

PF5

EIN

T6/G

PF6

EIN

T7/G

PF7

EIN

T8/G

PG0

EIN

T9/G

PG1

EIN

T10/

GPG

2EI

NT1

1/G

PG3

EIN

T12/

GP

G4/

LCD

_PW

RE

NEI

NT1

3/G

PG5

EIN

T14/

GPG

6EI

NT1

5/G

PG7

EIN

T16/

GPG

8EI

NT1

7/G

PG9

EIN

T18/

GP

G10

/CA

M_F

IELD

_AE

INT1

9/G

PG

11/n

IRQ

_CF

EIN

T20/

GP

G12

/nIN

PA

CK

EIN

T21/

GP

G13

/nR

EG

_CF

EIN

T22/

GP

G14

/RE

SE

T_C

FE

INT2

3/G

PG

15/C

AR

D_P

WR

EN

I2S

0_C

DC

LK/P

CM

0_C

DC

LK/A

C_B

IT_C

LK0/

GP

E2

I2S

0_LR

CK

/PC

M0_

FSY

NC

/AC

_nR

ES

ET0

/GP

E0

I2S

0_S

CLK

/PC

M0_

SC

LK/A

C_S

YN

C0/

GP

E1

I2S

0_S

DI/P

CM

0_S

DI/A

C_S

DI0

/GP

E3

I2S

0_S

DO

/PC

M0_

SD

O/A

C_S

DO

0/G

PE

4

IICS

CL/

GP

E14

IICS

DA

/GP

E15

nCTS0/GPH8

nCTS1/GPH10

nRTS0/GPH9

nRTS1/GPH11nT

RS

TTC

KTD

ITD

OTM

S

RXD0/GPH1

RXD1/GPH3

RXD2/GPH5

RXD3/GPH7/nCTS2

TXD0/GPH0

TXD1/GPH2

TXD2/GPH4

TXD3/GPH6/nRTS2UCLK/GPH12

SPICLK0/GPE13

SPICLK1/GPL10

SPIMISO0/GPE11

SPIMISO1/GPL12

SPIMOSI0/GPE12

SPIMOSI1/GPL11

SS0/GPL13SS1/GPL14

TCLK

/GP

B4

TOU

T0/G

PB

0TO

UT1

/GP

B1

TOU

T2/G

PB

2TO

UT3

/GP

B3

SD

1_C

LK/G

PL9

SD

1_C

MD

/GP

L8

SD

1_D

AT0

/GP

L0S

D1_

DA

T1/G

PL1

SD

1_D

AT2

/GP

L2S

D1_

DA

T3/G

PL3

SD

1_D

AT4

/I2S

1_S

CLK

/PC

M1_

SC

LK/G

PL4

SD

1_D

AT5

/I2S

1_C

DC

LK/P

CM

1_C

DC

LK/G

PL5

SD

1_D

AT6

/I2S

1_S

DI/P

CM

1_S

DI/G

PL6

SD

1_D

AT7

/I2S

1_S

DO

/PC

M1_

SD

O/G

PL7

SD

1_LE

D/I2

S1_

LRC

K/P

CM

1_FS

YN

C/G

PJ1

3S

D1_

nCD

/GP

J14

SD

1_nW

P/G

PJ1

5

SD0_CLK/GPE5SD0_CMD/GPE6SD0_DAT0/GPE7SD0_DAT1/GPE8SD0_DAT2/GPE9SD0_DAT3/GPE10

LCD

VF0

/GP

C5

LCD

VF1

/GP

C6

LCD

VF2

/GP

C7

RG

B_L

EN

D/S

YS

_OE

/GP

C0

RG

B_V

CLK

/VE

N_F

IELD

/SY

S_W

E/G

PC

1

RG

B_V

SY

NC

/VE

N_V

SY

NC

/SY

S_C

S1/

GP

C3

RG

B_H

SY

NC

/VE

N_H

SY

NC

/SY

S_C

S0/

GP

C2

RG

B_V

DE

N/V

EN

_HR

EF/

SY

S_R

S/G

PC

4

VD

0/G

PC

8V

D1/

GP

C9

VD

2/G

PC

10V

D3/

GP

C11

VD

4/G

PC

12V

D5/

GP

C13

VD

6/G

PC

14V

D7/

GP

C15

VD

8/G

PD

0V

D9/

GP

D1

VD

10/G

PD

2V

D11

/GP

D3

VD

12/G

PD

4V

D13

/GP

D5

VD

14/G

PD

6V

D15

/GP

D7

VD

16/G

PD

8V

D17

/GP

D9

VD

18/G

PD

10V

D19

/GP

D11

VD

20/G

PD

12V

D21

/GP

D13

VD

22/G

PD

14V

D23

/GP

D15

XI_UDEVXO_UDEV

XTIPLLXTOPLLXTIRTC

XTORTCEPLLCAP

VREF

MPLLCAPEXTCLK

REXT

TP9TOUT0

TP11TOUT2

TP8TCLK

R16 NC

R151K

TP12TOUT3

Page 4: read.pudn.comread.pudn.com/downloads156/doc/project/695518/smdk2450_rev0_… · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S3C2450 (POWER) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

4 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

VDD_ARM

VDD_SMOP

VDD_RMOP

VDD_OP1

VDD_USB33

VDD_CAM

VDD_MPLL

VDD_RTC

VDD_ADC

VDD_INT

VDD_OP2

VDD_ALIVE

VDD_LCD

VDD_USB12

VDD_SD

VDD_EPLL

VDD_OP1VDD_LCD VDD_OP2

VDD_CAMVDD_SDVDD_RTC

VDD_RMOP

VDD_INT

VDD_ARM

VDD_SMOP

VDD_ADC VDD_MPLL VDD_EPLL VDD_ALIVE

VDD_USB12

VDD_USB33

VDD_OP3

VDD_OP3VDD_USB33

C46

100nF

+CT6

10uF

+CT5

10uF

C16

100nF

C23

100nF

+CT12

10uF

C53

100nF

+CT19

10uF

C42

100nF

+CT57

10uF

C7

100nF

C47

10nF

12

C19

100nF

+CT15

10uF

C8

100nF

C48

1nF

12

+CT14

10uF

C13

100nF

C29

1nF

12

+CT1

10uF

+CT3

10uF

+CT2

10uF

C158

100nF

C56

100nF

C39

100nF

+CT8

10uF

C10

100nF

C37

100nF

C35

100nF

C30

1uF

12

C55

100nF

C24

100nF

C32

100nF

C43

100nF

R202 0

+CT17

10uF

C25

100nF

C58

100nF

C34

100nF

C45

100nF

+CT25

10uF

+CT22

10uF

+CT23

10uF

C26

100nF

C28

10nF

12

+CT11

10uF

+CT20

10uF

+CT10

10uF

C27

100nF

R83

0

C12

100nF

+CT9

10uF

+CT4

10uF

C49

1uF1

2

VSS

VDD

U2C

S3C2450X

M4

W4P8

AC20

M20U22

U10AB5

Y23

AA17AC13

G17D13C13J15C15C20C22E20H20

F1C3

C6

H10

J2

AA19Y21

L16

K16

K20

M22

U20

T15

Y12

H8

C11

B14

A19

G23

T16

L3D1

J23

AB

11A

C8

Y6

AC

3Y

1V

4U

4T4P

4M

1

L1R2

AA1

AB19T17M21

U7Y9

R12AB17

J16F22D22D19G15J14

J12J13

A18D

4E

3J9 D

9G

7

AC

21

AB

20

L22

K22

K21

J20

U21

M17

E2

L4 W21

H17

C19

D16

A11

D7

Y13

Y15

N4

N2

R1

U2

Y2

AB

4Y

7Y

8Y

10

J21

L20

VDD_CAM

VDD_LCDVDD_LCD

VDDA_MPLL

VDD_OP1VDD_OP3

VDD_USB_OSCVDD_OP2

VDD_RTC

VDD_SDVDD_SD

VDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAMVDD_SDRAM

VD

D_S

RA

MV

DD

_SR

AM

VD

D_S

RA

MV

DD

_SR

AM

VD

D_S

RA

M

VDDA_EPLLVDDA_ADC

VD

DA

33C

VD

DA

33T1

VD

DA

33T1

VD

DA

LIV

EV

DD

ALI

VE

VDD

IVD

DI

VDD

IV

DD

I/PV

GA

TEVD

DI

VDD

IVD

DI

VDD

IVD

DI

VDD

I

VD

DI_

UD

EV

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VD

DIA

RM

VSS_CAMVSS_LCDVSS_LCD

VSSA_MPLLVSS_OP3VSS_OP1VSS_OP2VSS_OP2VSS_SDVSS_SD

VSS_SDRAMVSS_SDRAMVSS_SDRAMVSS_SDRAMVSS_SDRAMVSS_SDRAM

VSS_SDRAMVSS_SDRAM

VSS_SDRAMV

SS

_SR

AM

VS

S_S

RA

MV

SS

_SR

AM

VS

S_S

RA

MV

SS

_SR

AM

VS

SA

_UP

LL

VS

SA

_AD

C

VS

SA

33C

VS

SA

33T2

VS

SA

33T2

VS

SA

33T2

VS

SA

LIV

EV

SS

ALI

VE

VS

SI

VS

SI

VS

SI

VS

SI

VS

SI

VS

SI

VS

SI/P

FSO

UR

CE

VS

SI

VS

SI

VS

SI

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIA

RM

VS

SIP

_UD

EV

VD

DA

LIV

E

C54

100nF

+CT21

10uF

C20

100nF

C4

100nF

C33

100nF

+CT26

10uF

C17

100nF

C40

100nF

R82

0

C18

100nF

C15

100nF

+CT13

10uF

C36

100nF

C21

100nF

C52

100nF

C44

100nF

C51

100nF

C14

100nF

C50

100nF

C5

100nF

C57

100nF

C6

100nF

+CT7

10uF

+CT24

10uF

+CT18

10uF

C9

100nF

C38

100nF

+CT27

10uF

C22

100nF

C31

100nF

+CT16

10uF

C41

100nF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

100010(D) 010100 001100

!!SAMEROUTELENGTH

Just Only PADS on Lines

CFG4

mSDR mDDR DDR2

mSDR/mDDR 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

5 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

SADDR14

SDATA0

SADDR15

SADDR0

SDATA1

SADDR12

SDATA6

SDATA8SDATA14

SADDR7SDATA0

SADDR8

SADDR6

SADDR6

SDATA29

SDATA25

SDATA9

SDATA2

SADDR12

SDATA6

SDATA12

SDATA15

SADDR5

SADDR3

SADDR4

SDATA8

SDATA19

SDATA16

SDATA11

SDATA4

SDATA2

SDATA7

SADDR2

SDATA13

SDATA11

SADDR2

SADDR3

SADDR11

SADDR9

SDATA10

SADDR8

SADDR7

SDATA28

SDATA26

SDATA17

SDATA4

SDATA15

SADDR0

SADDR9

SDATA27

SDATA13SDATA12

SDATA7

SADDR4

SDATA15

SADDR8

SDATA13

SDATA11

SDATA14

SDATA30

SDATA24

SDATA18

SADDR6

SDATA10

SDATA14

SDATA5

SADDR15

SDATA0

SADDR2

SADDR12

SDATA31

SDATA23

SADDR14

SDATA10

SDATA0

SADDR3

SADDR11SDATA5

SADDR4

SDATA7

SDATA3

SDATA4

SADDR10

SDATA5

SDATA1

SADDR0

SADDR5

SDATA22SDATA21

SDATA3

SADDR11

SADDR9

SDATA12SADDR5

SDATA6SADDR7

SADDR0

SDATA9SADDR10

SADDR1

SDATA9SDATA8

SDATA2SDATA1

SADDR10

SADDR1

SDATA3

SDATA20

SADDR1

nSCS12

nSCS02

SADDR[12:0]2

SADDR02

mDDR_CS

DQS02

SDATA[31:0] 2

DQS02

nSCLK2

DQM12

SCKE2

SADDR152

SCLK2

nSCAS 2nSWE 2

SCKE2

SADDR142

DQS12

SCLK2

nSCLK2

SADDR152

mSDR_CS

nSCAS2

SDATA02

SDATA[31:0] 2

DQM22

DQS12

DDR2_CS

SADDR142

SADDR[12:0]2

nSRAS2

DQM02

nSWE2

DQM02

nSRAS 2mDDR_CS

nSWE2nSCAS2

DQM12DQM02

SDATA[31:0]2

SCLK2

DQM32

SCKE2

nSRAS2

DQM22

SADDR[12:0]2

SADDR152SADDR142

nSCAS2

DDR2_CS

nSWE2

nSRAS2

DQS02

DQM12nSCLK2

DQM02

SCLK2

SCKE2

DQS12

mSDR_CS

SADDR102

SDATA162

VDD_SMEM

DDR_VREF

VDD_SMEM

VDD_SMEM

DDR_VREF

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_SMEM

VDD_MEMORY

VDD_D

VDD_SMEM

VDD_SMEMVDD_SMEM

TP18 nSCAS

CFG4

SW-DIP6

1234

876

59101112

C72

100nF

C86

100nF

12

C82

100nF

TP23 SDATA16

R17

NC

C69

100nF

C87

100nF

12

TP17 nSWE

C70

100nF

R18

NC

C75

100nF

C84

100nF

12

TP14 SDATA0

C60100nF

C74

100nF

C81

100nF

U4

DDR2 K4T51163QC-ZCD5

M8M3M7N2N8N3N7P2P8P3M2P7R2

L2L3

A8

G8

J2K9

G2H7H3

H9H1

F1F9C8C2D7D3D1

B1D9

B9

L8K2K3

B2

B7

K8J8

K7L7

H8H2A7B8D2D8E7F2F8

P9N1J3E3A3

A9E9G1G9C9G7G3C7C3C1

R1M9A1E1J9

E2A2L1R3R7R8

J1J7

E8

F7

F3B3

A0A1A2A3A4A5A6A7A8A9A10/APA11A12

BA0BA1

nUDQS

DQ0

VREFODT

DQ1DQ2DQ3

DQ5DQ4

DQ6DQ7DQ8DQ9

DQ10DQ11DQ12

DQ14DQ13

DQ15

nCSCKEnWE

VSSQ

UDQS

nCKCK

nRASnCAS

VSSQVSSQVSSQVSSQVSSQVSSQVSSQVSSQVSSQ

VSSVSSVSSVSSVSS

VDDQVDDQVDDQVDDQVDDQVDDQVDDQVDDQVDDQVDDQ

VDDVDDVDDVDDVDD

NCNCNCNCNCNC

VDDLVSSDL

nLDQS

LDQS

LDMUDM

C6110uF/10V

U7

K4S51323PF-F75

G8G9F7F3G1G2G3H1H2J3G7H9

H8

K8

J9J8

K7

K9K1

J2J1

R8N7R9N8P9M8M7L8L2M3M2P1N2R1N3R2

B2

R3

L3F1 E9

D1

C1

B3

J7R

7

E1

C9

B7

F8F2

E8D7D8B9C8A9C7A8A2C3A1C2B1D2D3E2

A7

F9 L7 L1 N9

P2

P7

A3

L9 M1

N1

P3

M9

D9

P8

B8

H3

A0A1A2A3A4A5A6A7A8A9A10A11

BA1

nWE

nRASnCS

nCAS

DQM0DQM1

CKECLK

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15

VDD

Q0

VS

SV

SS

VS

S

VS

SQ

VS

SQ

VS

SQ

VS

SQ

BA0VD

D3

VDD

Q3

VDD

Q2

VDD

Q1

DQM2DQM3

DQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23DQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31

VDD

0VD

D1

VDD

2

VDD

Q4

VDD

Q5

VDD

Q6

VDD

Q7

VS

S

VS

SQ

VS

SQ

VS

SQ

VS

SQ

VDD

Q8

VDD

Q9

VS

SQ

VS

SQ

A12

C77

100nF

C68100nF

TP15 SCKE

C80

100nF

C88

100nF

12

R9610K

C6310uF/10V

C76

100nF

TP22 DQM2

U5

LP2997M1

2

3

4

5

6

7 8

GN

D

nSD

Vsense

VREF

VDDQ

AVIN

PVIN VTT

C66100nF

R9710K

TP20 DQM0

R19

10K

R21

NC

C78

100nF

C89

100nF

12

R16210K

C59100nF

C73

100nF

C6410uF/10V

C79

100nF

TP21 SADDR10

R22

10K

C71

100nF

U6

K4X51163PC-LGC3

J8J9K7K8K2K3J1J2J3H1J7H2H3

H8H9

F8F2E8

A9

E2

G1G2G3

A8

H7G9G8G7

F3

K1

F7

A1F1F9

K9

C9E9A7B1D1 D9

B9A3E1C1

B7B8C7

D7C8

D8E7E3D2D3C2C3

B3B2

A2

A0A1A2A3A4A5A6A7A8A9A10/APA11A12

BA0BA1

LDMUDMLDQS

VDD

UDQS

CKECKnCK

DQ0

nCSnRASnCASnWE

NC

VSS

NC

VSSVSSVDD

VDD

VDDQVDDQVDDQVDDQVDDQ VSSQ

VSSQVSSQVSSQVSSQ

DQ1DQ2DQ3

DQ5DQ4

DQ6DQ7DQ8DQ9

DQ10DQ11DQ12

DQ14DQ13

DQ15

R20

10K

TP25 DQS1

C65100nF

C6210uF/10V

TP16 nSCLK

TP24 DQS0

C85

100nF

12

TP13 SADDR0

TP19 nSRAS

C83

100nF

12

TP26 SCLK

C67100nF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

[4]

OFF

[3]

1:ON, 2:OFF

EXTCLK (MPLL/UPLL)

[5]

One NAND& SROM I/F

XTiPLL (MPLL/UPLL)

Base B'd

OFF

Ext. OneNAND

ON

CFG1:CS0

QTH/QSH Series ( 0.5mm)

ON

ON

OFF

<Silk>

CFG2

[1]

[2]

0110(D) 1001

CFG3

"Silk"Clocksetting

Crystal OSCClocks

1:OFF, 2:ON

16 bit

8 bit

ROM / Demuxed OneNAND

OFF

[5] : ON & [4] : OFF

ON

OneNAND/ROM

16 bit

MuxedOneNAND

NAND /iROM/SecurityNormal

NAND/iROM/Security

NANDAdvanced

ON

ADDR4 ADDR3

page 2KB

page 4KB

ADDR4

OFF

OFF

ADDR5

NANDpage512B

OFF

iROM/Security

OFF ON

iROMSecurityeFUSE

128

192

ON

CFG7 : Type Page Addr Cyc [2]

MMC(Movi/iNand)

Reserved

Nand 512

-

-

-

-

2048

4096

3

4

4

5

5

0

0

1

1

0

0

1

0

0

1

1

0

[1]

1

0

0

1

1

1

0

0

0

[3]

MEMORY(OneNAND)/JTAG/CLK 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

6 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

RDATA8

RDATA1RDATA3

RDATA13

RDATA6

RDATA11

RDATA14

RDATA2RDATA5

RDATA10

RDATA4

RDATA0

RDATA9

RDATA7

RDATA15RDATA12

RADDR15

RADDR10

RADDR0

RADDR6

RADDR9

RADDR7

RADDR11RADDR13

RADDR4

RADDR8

RADDR14

RADDR1

RADDR12

RADDR2 RADDR3RADDR5

RDATA[15:0] 2,7

B_ONE_INT

RDATA[15:0]2,7

OM42

OM12

RADDR[15:0]2,7 RADDR[15:0] 2,7

nCS_EXT_ONE

OM22

OM32

OM02

RSMBWAIT 2

nRWE2,7 nROE 2,7RSMAVD2

RSMCLK2

ONE_INT3

nRESET2,9,11,12B_nONE_RST

B_ONE_INT

B_nONE_RST

nCS_EXT_ONEnRCS02nCS_SROM0 7

nONE_RST3

TDI3nTRST3

TCK3

TDO3

TMS3

nRESET2,9,11,12

EXTCLK 3

EPLLCAP 3

XTOPLL 3

MPLLCAP 3

XTIRTC 3

XTIPLL 3

XTORTC 3

RTCK2

nLED43,9,11,12

nLED83,9,11

nLED23,9,11,12

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_D

VDD_D

VDD_D

VDD_D

VDD_RMEM

VDD_D

VDD_RMEM

VDD_D

VDD_D

VDD_D

R23

410

K

CFG2Slide SW5

R37

4.7K

C91

15pF

12

R231 100K

R32

10K

OSC1

OSCILLATOR 12MHz(SMD)

1 2

34

OE GND

OUTVDD

X132.768KHz(SMD)

C98100nF

12

R23 100K

+CT28

10uF

R33

10K

X212MHz(SMD)

R35 0

J1

QSH-030-01-F-D-A

24681012141618202224262830323436384042444648505254565860

13579

11131517192123252729313335373941434547495153555759

R40 NC

R26 100K

R24 100K

C97

15pF

12

R31

10K

R30

0

R230 100K

C90

100nF

C95

160pF 5%

12

J2

2.54mm pitch header

1 23 45 67 89 10

11 1213 1415 1617 1819 20

1 23 45 67 89 1011 1213 1415 1617 1819 20

R25 100K

R36 NC

R229 100K

UM2SN74LVC1G17DBV5

2

3

4

CFG7SW-SLIDE4

1 2 3 4

8 7 6 5

C93100nF

12

C92

15pF

12

R28

100K

C94

1.8nF 5%

12

C96

15pF

12

R29

NC

R23

310

K

UM1SN74LVC1G17DBV5

2

3

4

R39 0

R23

210

K

R27 100K

CFG1

SW-SLIDE2

12

43

CFG3

R38

NC

R34

10K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DIR L : B->ADIR H : A->B

Propagation DelayA->B 1.6nS ~ 4.3nSB->A 1.8nS ~ 5.5nS

sn74AVCA164245(A(1.8V) <-> B(3.3V))A->B 1.6nS ~ 4.3nSB->A 1.8nS ~ 5.5nS

SN74AUC2G08Propagation Delay (CL30pF)Typ: 1.5nS ( 1.2 ~ 2.1)

(RDATA_OEN)

SN74AUC2G08Propagation Delay (CL30pF)Typ: 1.5nS ( 1.2 ~ 2.1)

BUFFERS(SROM IF) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

7 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

RADDR0

RADDR16

RADDR7

RADDR2

RADDR15

RADDR11

RADDR19

RADDR9

RADDR12

RADDR20

RADDR24

RADDR18

RADDR1

RADDR17

RADDR13

RADDR6

RADDR22

RADDR5

RADDR3

RADDR23

RADDR4

RADDR14

RADDR8

RADDR21

RADDR10

RADDR25

B_ADDR11

B_ADDR25

B_ADDR3

B_ADDR13

B_ADDR22

B_ADDR20

B_ADDR9

B_ADDR21

B_ADDR0

B_ADDR19

B_ADDR8

B_ADDR7

B_ADDR18B_ADDR17

B_ADDR10

B_ADDR16

B_ADDR24

B_ADDR5

B_ADDR23

B_ADDR14

B_ADDR6

B_ADDR4

B_ADDR2

B_ADDR15

B_ADDR1

B_ADDR12

B_DATA5

B_DATA11

RDATA6RDATA7

B_DATA2

RDATA0

RDATA4

B_DATA13

B_DATA10

B_DATA3

RDATA11

B_DATA14

RDATA1

B_DATA15

B_DATA7

B_DATA1

RDATA14

RDATA8

RDATA12

RDATA3

B_DATA9B_DATA8

B_DATA6

B_DATA4

RDATA9

RDATA2

RDATA10

RDATA13

RDATA5

RDATA15

B_DATA12

B_DATA0

BCtrl_I1

BCtrl_I0

BCtrl_I1

BUF_DIR

BCtrl_I0

BUF_DIR

RADDR25

B_nCS4 11

B_SROM_nCS0 11

nROE2,6nRWE2,6

B_nCS3 11B_nCS2 11B_SROM_nCS1 11

B_nCS5 11

nRBE02

RADDR[25:0]2,6

nRBE12B_nRBE0 11B_nROE 11

B_nRBE1 11

B_ADDR[25:0] 11

B_nRWE 11

B_DATA[15:0] 11RDATA[15:0]2,6

B_nFCE 11

nOE_CF2

FALE2

nWE_CF2

nFWE2

FCLE2B_nOE_CF 11B_nWE_CF 11

B_nFWE 11

B_FCLE 11B_FALE 11

nFRE2 B_nFRE 11

nRCS12nCS_SROM06

nRCS42nRCS52

nRCS32nRCS22

nFCE2

nRCS42

nFCE2

nRCS52

nRCS32

nRCS22

nRCS12

nCS_SROM06

nREG_CF3,11

nFRE2nOE_CF2

nROE2,6

EINT93EINT8_OP3_GPO0 11

EINT14_OP3_GPO6 11

EINT113EINT10_OP3_GPO2 11

EINT133EINT11_OP3_GPO3 11

EINT153

EINT9_OP3_GPO1 11EINT83

EINT13_OP3_GPO5 11EINT143

EINT15_OP3_GPO7 11

EINT103

EINT10 3

EINT9 3

EINT13 3

EINT8 3

EINT14 3

EINT11 3

EINT15 3

VDD_D

VDD_RMEM VDD_DVDD_D

VDD_RMEM

VDD_D

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEM

VDD_RMEMVDD_RMEM

VDD_RMEM

C_PWR_5VR41

100K (NC)

R10 0

U16A

SN74AUC2G08

1

2

84

7

U9

SN74AVCA164245

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

U15B

SN74AUC2G08

6

53

R51 0

U11

SN74AVCA164245

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

R11 0

R54

100K

R52100K

CON8

QSE-020-01-L-D-A-OP3

13579

111315171921232527293133353739

246810121416182022242628303234363840

41 4243 44

R58 100K

U14B

SN74AUC2G08

6

53

R50

100K (NC)

R12 0

C100 100nF

R56

100KR59 100K

R48 0

R57

100K

R13 0

C105 100nF

U13A

SN74AUC2G08

1

2

84

7

R60 100K

U16B

SN74AUC2G08

6

53

R84 0

C106 100nF

R43 100K

U15A

SN74AUC2G08

1

2

84

7

U12

SN74AVCA164245

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

R42

100K (NC)

C102 100nF C99 100nF

R46

0

R85 0

R45

0

R55

100K

R47 NC

U10B

SN74AUC2G08

6

53

R44100K

CT56

100uF/16V

R94 0 C103 100nF

U10A

SN74AUC2G08

1

2

84

7

R53

0

C101 100nFU8

SN74AVCA164245

4746444341403837

3635333230292726

124

4825

2356891112

1314161719202223

3142 7

18

45393428

4101521

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1DIR2DIR

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCCA1VCCA0 VCCB0

VCCB1

GND0GND1GND2GND3

GND7GND6GND5GND4

C104 100nF

C157

1uF

R49

100K (NC)

U14A

SN74AUC2G08

1

2

84

7

R61 100K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB(Device)SOCKET

For USB Clock

fundermentalOscillatortolerance +-100ppmpeak jitter 100psduty cycle40/60~60/40swing 3.3V

DN and DP should be routed evenly

SDDATA & CLK path mustbe same length androute

DN and DP should be routed evenly

USB(HOST)SOCKET

USB(HOST)SOCKET

USBHOST

SDDATA & CLK path mustbe same length androute

4bit only<Silk>

For HS-SPI test

OFF

LOOP 0-1

ON

[1~4]

CFG5

SPI_CON

USB/HS_MMC/HS_SPI 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

8 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

SD1_DAT4

SD1_DAT1SD1_DAT0

SD1_DAT2SD1_DAT3

SD1_DAT6SD1_DAT7

SD1_DAT5

SD0_DAT3

SD0_DAT0SD0_DAT1

SD0_DAT2

DP_UDEV3DM_UDEV3

REXT3

VBUS_DET3

XO_UDEV 3

XI_UDEV 3

SD1_DAT[7:0]3

SD1_nWP3

SD0_CLK3

SD1_CLK3

SD0_CMD3

SD1_nCD3

SD0_DAT[3:0]3

SD1_CMD3

SD1_LED3

DP03DN03

nCD_SD03

PWREN_USBH3

SPIMISO03,11nSS03,11

SPIMOSI1 3,11SPICLK1 3,11

SPIMOSI03,11SPIMISO1 3,11nSS1 3,11

SPICLK03,11

VBUS

VDD_USB33

VDD_USBH_5V

VDD_USBH_5V

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

VDD_D

C_PWR_5V

VDD_USBH_5V

L2

ferrite Bead EXC-3225U

R160

523K 1%

CON4IEEE1394-4

1 2 3 4

D1+

D1-

D2+

D2-

C156

NC

R95

NC

R76 15K

R91

10K

R73

10K

R161

169K 1%

R81

200K

C108

100nF

C159

NC

OSC2

OSCILLATOR 48Mhz

1 2

34

OE GND

OUTVDD

TP301

U18

SD Socket [Taisol]

12

3

4

56789

101112

131415

16171819202122232425

26

27

28

2930

NCNC

DAT2

DAT3

DAT4NCCMDNCDAT5NCVSSNC

NCVDDNC

NCCLKNCDAT6NCVSSNCDAT7NCDAT0

DAT1

SD_CD

SD_WP

P29

/GN

DP

30/G

ND

CON1

USB-MINIAB

12345

VBUSD-D+IDGND

D5

MBRM120LT3

1 2

CON2B

Dual USB Port - A type

5678

VBUSD-D+GND

C152 15nF

R79

NC

C160

NC

R72

10K U17

SD Socket [Taisol]

12

3

4

56789

101112

131415

16171819202122232425

26

27

28

2930

NCNC

DAT2

DAT3

DAT4NCCMDNCDAT5NCVSSNC

NCVDDNC

NCCLKNCDAT6NCVSSNCDAT7NCDAT0

DAT1

SD_CD

SD_WP

P29

/GN

DP

30/G

ND

L7 LQH32C 10uH

R86

10K

L1

ferrite Bead EXC-3225U

TP331

C161

NC

R78

0

U31

LTC3440EMS

3

7

8

2

1

4

6

9

10

5

SW1

VIN

SHDN/SS

MODE/SYNC

RT

SW2

VOUT

FB

VC

GND

C15347uF

C112

NC

R92

10K

R74

10K

R93

44.2 1%

C107

100nF

R75 22

R89

10K

R63 22

C15447uF

C111

NC

CON3

USB Port B type

1234

56

VBUSD-D+GND

BG1

BG2

R88

10K

C109

100nF

C15547uF

R87

10K

R62 15K

CFG5

SW-SLIDE4

1234

8765

R69

10K

D1SMD TYPE (BLUE)

12

R70

10K

R157100K

R66

10K

R68

10K

TP311

R90

10K

TP321

R80

300K

R15860.4K 1%

TP281

CON2A

Dual USB Port - A type

1234

VBUSD-D+GND

R71

10K

R77330

R65

10K

R67

10KTP27

1

C110

100nF

R15915K

TP291

R64

10K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1SDR1005-6R8M

6

8

5

2

4

7

3

Default 1.2V

6

2

SDR1005-6R8M5

4

8

1

7

3

Default 1.2V

CPU B'D POWER(ARM/INT) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

9 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

nRESET2,6,11,12

PWR_EN2,12

nARM_REG_LE3

nINT_REG_LE3

CORE_REG_OE3

TOUT23,11

TOUT23,11

nLED13,11,12nLED23,11,12nLED43,11,12nLED83,11

nLED13,11,12

nLED43,11,12nLED23,11,12

nLED83,11

PWR_EN2,12

VDD_D

VDD_INT

C_PWR_5V

VDD_EPLL

VDD_MPLL

VDD_D C_PWR_5V

VDD_ARM

U22A

74LV00/SO

1

23

J512

C129 470pF

+C118

220uF/6V

R101

10K

C122100nF

C128

100nF

R133 NC

C115100nF

J3

12

R132 120K

R134 0

U22C

74LV00/SO

9

108

R100

10K

R108 0

R111 120K

R98 20

D3

CMPSH-3

R107 NC

R120

10K

R11610K

R113 0

C113100nF

R12310K

R124

0J6

12

C130 0.22uF

Q3BFDS6982

Q2AFDS6982

TP34S0

11

R11710K

Q2BFDS6982

TP35S1

11

+C126

220uF/6V

R118 20

R127

10K

Q3AFDS6982

C121 0.22uF

R125 0

R106 0C119

100nF

R102 5

U21

74LVC573/SO

111

1918171615141312

23456789

OELE

Q1Q2Q3Q4Q5Q6Q7Q8

D1D2D3D4D5D6D7D8

R121

10K

R122 5

R105

10K

R104

10K

+ C114100uF/16V

TP38S1

11

R130 0

+C117

220uF/6VR110 0

C116100nF

R126

10K

U24

74LVC573/SO

111

1918171615141312

23456789

OELE

Q1Q2Q3Q4Q5Q6Q7Q8

D1D2D3D4D5D6D7D8

J412

D4

CMPSH-3

R131 0

TP36

VGATE-PAD

1 1

R136 NC

C125100nF

C124100nF

L4 6.8uH

R103 0

C120 470pF

R128 0

R135 0

L3 6.8uH

R119

10K

R129 NC

R109

0

R112 NC

U22B

74LV00/SO

4

56

U23

MAX1718

2

10

2524232221

19

17

9

1

26

2827

16

15

18

78

3

6

11

4

513

14

2012

SKP/SDN

TON

D0D1D2D3D4

ZMODE

VDD

VCC

V+

BST

DHLX

DL

GND

SUS

S0S1

TIME

CC

REF

FB

NEGPOS

VGATE

OVPILIM

R99

10K

TP37S0

11

TP39

VGATE-PAD

1 1

U20

MAX1718

2

10

2524232221

19

17

9

1

26

2827

16

15

18

78

3

6

11

4

513

14

2012

SKP/SDN

TON

D0D1D2D3D4

ZMODE

VDD

VCC

V+

BST

DHLX

DL

GND

SUS

S0S1

TIME

CC

REF

FB

NEGPOS

VGATE

OVPILIM

R115 NC

+ C123100uF/16V

R114 0

+C127

220uF/6V

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(3.3V)

Vo = 1.1834[Vref] x (1 + R1/R2)(R1 : OUT-FB, R2 : FB-GND)

(1.2V)

(1.2V)

(3.3V)

R1=R2[(Vout/0.8)-1]

2-3

IO(3.3V)

1-2(Def.)J23

OP3(1.8V)OP3 power

Vo = 0.8V x (1 + R2/R1)(R1 : FB-GND, R2 : FB-OUT)R1 < 200, R2 <332 isrecommanded.

CPU B'D POWER(ALIVE/IO) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

10 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

VREF 3

USB20_EN

CLKOUT12,11 USB20_EN

VDD_D

VDD_RTC

VDD_D

VDD_ADC

C_PWR_5V

VDD_OP2

VDD_ALIVE

VDD_OP1

VDD_DVDD_RMOP

VDD_USB12

VDD_D

VDD_USB33

VDD_SMEM

VDD_SMOP

VDD_RMEM

VDD_USBS

VBUS

VDD_USBS

VDD_USBS

VDD_USBS

VDD_MEMORY

VDD_D

VDD_OP3VDD_D

VDD_LCD

VDD_CAM

VDD_SD

R145 150K

R140 150K

R155 75.0K, 1%

R143 15.0K 1%

+C138

10uF/16V

J14

12

R183 0

C140 22pF1 2

R146

120K

R14430.1K 1%

+C139

10uF/16V

J19

12

+

C14133uF/6.3VJ16

12

VR1

NC

13

2

U28

LTC3405A

1

6

5

34

2

RUN

MODE

Vfb

SWVIN

GN

D

J18

12

J21

12

U29

MAX1806EUA15

1

3

2

8

6

4

7

5

IN

POK

IN

OUT

SET

SHDN

OUT

GND

R137 240K

R141 100K

R138 53.6K 1%

R15230.1K 1%

J17

12

R142

120K

L6 4.7uH LQH3C4R7M34

+C144

10uF/16V

C134 22pF1 2

R150 15.0K 1%

+C143

4.7uF/6.3V

C133

100nF

12

J912

R147 0

J1312

J22

12

J12

12

U25

TPS76801QPWP

76 16

13

53

14

15129

101112

1920

481718

ININ PG

OUT

ENGND

OUT

FB/NCGNDGNDGNDGNDGNDGND

GNDGND

NCNCNCNC

J8

12

+C146

10uF/16V

+C132

100uF/16V

R149 100K

U30

MAX1806EUA15

1

3

2

8

6

4

7

5

IN

POK

IN

OUT

SET

SHDN

OUT

GND R15624.3K 1%

+C137

4.7uF/6.3V

U27

MAX1806EUA15

1

3

2

8

6

4

7

5

IN

POK

IN

OUT

SET

SHDN

OUT

GND

C142

4.7uF

12

L5 4.7uH LQH3C4R7M34

J23

13

2

C136

4.7uF

12J10

12

+C145

10uF/16V

+C147

10uF/16V

J7

12

R139 30.1K 1% J11

12

R151 NC

+C131

100uF/16V

+

C13533uF/6.3V

R148

10k

J15

12

U26

LTC3405A

1

6

5

34

2

RUN

MODE

Vfb

SWVIN

GN

D

R153 0

R154 100K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

place TPs to eachcorner.

C0B. PMIC DC-DC/Audio 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

11 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_DATA8

B_DATA1

B_ADDR23

B_ADDR20

B_ADDR11

B_ADDR22

B_ADDR19

B_ADDR24

B_DATA7

B_ADDR3B_ADDR4

B_DATA11

B_ADDR25

B_ADDR2

B_ADDR9

B_ADDR17

B_DATA0

B_DATA12

B_ADDR5

B_DATA14

B_ADDR8

B_DATA13

B_ADDR13

B_DATA15

B_DATA2

B_ADDR1

B_ADDR7

B_DATA9

B_ADDR0

B_ADDR14

B_ADDR18

B_DATA10

B_ADDR6

B_ADDR16

B_DATA3

B_ADDR21

B_ADDR12

B_DATA5B_DATA4

B_DATA6

B_ADDR15

B_ADDR10

VD7

CAMDATA0

VD0

VD8

VD20

VD18

CAMDATA6

VD17

CAMDATA3

VD16

VD2

CAMDATA2

VD6

VD21

VD19

VD3

VD5

VD23

VD13

VD10

CAMDATA1

VD12

CAMDATA5

VD9

CAMDATA4

VD22

VD15

CAMDATA7

VD4

VD1

VD14

VD11

B_DATA[15:0] 7

EINT13_OP3_GPO5 7

EINT10_OP3_GPO2 7

nXBREQ 2

B_nRBE0 7

B_nCS37

SPIMOSI13,8

B_SROM_nCS07

B_nCS47

B_SROM_nCS17

RESET_CF 3

SPIMOSI03,8

B_nCS57

nXBACK 2

B_FCLE 7

B_nROE 7

IRQ_LAN3

EINT11_OP3_GPO3 7

B_nWE_CF 7

SPICLK13,8

B_nRBE1 7

nINPACK_CF 3

EINT8_OP3_GPO0 7SPIMISO03,8

B_ADDR[25:0]7

B_nOE_CF 7

TOUT23,9

nXDREQ1_IICSCL1 2

B_nRWE 7

EINT14_OP3_GPO6 7

nREG_CF 3,7

nSS03,8EINT15_OP3_GPO7 7

B_nFRE 7

EINT23

CLKOUT02

nWAIT 2

B_FALE 7

CLKOUT12,10

nSS13,8

nRESET2,6,9,12nRSTOUT2,12

PWREN_CF 3

SPIMISO13,8

SPICLK03,8

RnB 2B_nFWE 7

nIRQ_CF 3

EINT9_OP3_GPO1 7

B_nFCE 7

B_nCS27

nXDACK1_IICSDA1 2

UARTCLK 3

TXD2 3CAMHREF3

RGB_VSYNC 3

CAMVSYNC3

RXD2 3

TXD1 3

RGB_HSYNC 3

I2S0_SDO_PCM0_SDO_AC_SDO3

TSYM3

CTS0 3

CAMPCLK3

RXD1 3

TSXP3

AIN43

RGB_VDEN 3

I2S1_CDCLK_PCM1_CDCLK3

LCD_PWREN3

nXDREQ0_I2S0_SDO22

IICSDA3,12

TXD3 3

EINT33

VD[23:0] 3

I2S1_SDO_PCM1_SDO3I2S1_LRCK_PCM1_FSYNC3

CTS1 3

nDIS_OFF3BACKLIGHT_PWM3

nLED8 3,9

TXD0 3

AIN23

I2S1_SCLK_PCM1_SCLK3

TOUT13

CAMPCLKOUT3

IICSCL3,12

AIN03

EINT03

nXDACK0_I2S0_SDO12

RXD3 3

AIN13

RTS0 3

AIN53

CAMRESET3

RXD0 3

TSXM3

I2S1_SDI_PCM1_SDI3

I2S0_SDI_PCM0_SDI_AC_SDI3

I2S0_LRCK_PCM0_FSYNC_AC_nRESET3

CD_CF_CAM_FIELD_A3

AIN33

TSYP3

RTS1 3

I2S0_SCLK_PCM0_SCLK_AC_SYNC3I2S0_CDCLK_PCM0_CDCLK_AC_BIT_CLK3

CAMDATA[7:0]3

RGB_VCLK 3

nLED2 3,9,12nLED1 3,9,12

nLED4 3,9,12

C_PWR_5VC_PWR_5V

C_PWR_5V C_PWR_5V C_PWR_5VC_PWR_5V

TP43TP PROBE

+C150

10uF/16V

12

+C148

10uF/16V

12

CON7

BSE-060-01

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120

12345678910

1112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100

101102103104105106107108109110111112113114115116117118119120

TP40TP PROBE

+C149

10uF/16V

12

TP41TP PROBE

TP42TP PROBE

+C151

10uF/16V

12

CON6

BSE-060-01

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120

12345678910

1112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100

101102103104105106107108109110111112113114115116117118119120

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

B2B CONNECTOR(CPU) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

12 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

PWR_EN2,9

nRSTOUT2,11

nLED43,9,11

nRESET2,6,9,11

nLED23,9,11

nBATT_FLT2

nLED13,9,11

IICSCL3,11IICSDA3,11

VDD_OP2_PMIC

System_VCC

System_VCC

System_VCCVLD04

System_VCC

VLD01p8

VDD_OP2_PMIC

VDD_OP2_PMICVLD01p8

VLD04

R222 NC

C1961nF

C187 10uF

L12 3.3uH

C16510uF

R165 NC

C202

1uF

C168

22uF

R217 NC

R223 NC

C1971nF

C188 10uF

R214 10K

L13 2.2uH

C16610uF

C203

1uF

C169

22uF

R163

1KR224 NC

C189 10uF

R215 10K

L14 2.2uH

C16710uF

R167 NCC204

1uF

C170

22uF

R164

1K

AUDIOS5M8750

U38C

S5M8750

E6

C4

D5

D4

B4C10

B9B10

A10E9D9E11E10A8

A9

C9D10

A4

C5

B6

B5

A5

D6

C6

E7

A6

D7

G10

C12

C11

C7

F8

B7

G11

F12

F13

D12

E13

D13

E12

A13

C13

B13

B11

A7E8

F11F10

F9D3

G7

G8

H7

H8

J7 J8

A12B12A11D11

SYSCLKI

DV

DD

_PLL

AV

DD

_PLL

PLL_FILTER

VSS_PLLAVSS_MIC

VREF_TxVMID_Tx

MIC_BIASMIC_IN1_PMIC_IN1_NMIC_IN2_PMIC_IN2_NAVSS_Tx

AV

DD

_Tx

LINE_IN_LLINE_IN_R

DVD

D

DVSS

DV

DD

_I2S

TxS

DA

TAO

1

MC

LK1

SC

K1

LRC

K1

RxSDATAI1

TxS

DA

TAO

2

MC

LK2

AV

DD

_Rx

AV

DD

_HP

AV

DD

_SP

K

SC

K2

LRC

K2

RxSDATAI2

AV

SS

_Rx

LIN

E_O

UTL

LIN

E_O

UTR

HP

_OU

TLH

P_O

UTR

HP_

VM

ID

AV

SS

_HP

PV

DD

_SP

K_1

PV

DD

_SP

K_2

PV

SS

_SP

KA

VS

S_S

PK

TEST1TEST2TEST3TEST4TEST5TEST6

TVS

S1

TVS

S2

TVS

S3

TVS

S4

TVS

S5

TVS

S6

SPK_OUTPSPK_OUTNSPK_VMID

MONO

R225 NC

VDD_INT_PMIC

C212 1uF

C190 1uF

R168 NC

C205

1uF

R218 NC

VDD_MEMORY_PMIC

C208 1uF

R226 NC

C213 1uF

DC/DC ConverterS5M8750

U38A

M2M1M4

N4

M6J6

K6 N7J9K9

N2

N1

L1 L2 K5

J5 N5

N6

K8

K7

M7

M8

L7

L8

C8D8

L3 H6

B3

E5

A3

BKL1_1BKL1_2FB_BK1

EN_BK1

BKL2FB_BK2

EN_BK2 BKL3FB_BK3EN_BK3

PV

SS

_BK

1_1

PV

SS

_BK

1_2

PV

DD

_BK

1_1

PV

DD

_BK

1_2

AV

DD

_BK

1

AV

SS

_BK

1P

VS

S_B

K2

PV

DD

_BK

2

AV

DD

_BK

2

AV

SS

_BK

2P

VS

S_B

K3

PV

DD

_BK

3A

VD

D_B

K3

AV

SS

_BK

3

SDASCL

Pw

rkey

1bnB

AT_

FLT

PW

R_E

NR

ES

ETB

HR

ES

ETB

C191 1uF

R203

100K

R169 NC

R219 NC

R2046.2K

C206

1uF

VDD_ARM_PMIC

L16 beadTP561

C209 1uF

R227 NC

C214 1uF

C192 1uF

R170

NC

C217 NC

C207

2.2uF

TP571

C198

1uF

L17 bead

C210 50pF

R228 NC

C215 1uF

TP53

1

C193 1uF

TP581

JP9

JUMPER

12

R213 6.2K

JP3 JUMPER

12

C218 NC

C1620.1uF

C199

1uF

C211 50pF

TP54

1

R220 NC

C216 1uF C194 1uF

C185 120nF

C1630.1uF

C200

1uF

TP631

R221 NC

C195 1uF

C186 9.1nF

TP621

C1640.1uF

C201

1uF

R216 NC

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

max 2A

PMIC Power 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

13 13Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

VDD_ADC_PMIC

VDD_OP2_PMIC

System_VCC

System_VCC

System_VCC

VLD04

System_VCC

VLD01p8

VDD_OP2_PMIC

VDD_OP2_PMICVDD_OP2_PMIC

VDD_OP2_PMICVDD_ADC_PMIC

TP96VDD_SD_PMIC 1

TP97VDD_ADC_PMIC 1Pin

R205 100K

Pin

Pin

Pin

C184

10uF

R208

100K

TP86VDD_OP1_PMIC 1

JP7

JUMPER

1 2

Pin

R206 100K

C171100nF

TP87VDD_OP2_PMIC 1

C1794.7uF

R210

R1608

Pin

C172 1pF

MP2

Si3443DV

TP88VDD_ALIVE_PMIC 1

TP521

R211R1608

C173 100nF

TP98 VDD_USBH_5V_PMIC1

TP89VDD_USB33_PMIC 1

C177

100nF

PMICS5M8750

U38B

S5M8750

A2B1B2C1F1F3G1G3G4H2H1

M9

N9

N10

N11

M12N12

M10M11

L12L13

M13H10H12H13G13

K11K13

N13

J11

J13

H9

D1

D2

F7E2

E1

F6F5F4

M3N3L4K4L5L6

M5

K12

G6

L10

J1 K1

J3 K3

H5

G5

J4L11

VLDO1p8VLDO1VLDO2VLDO3VLDO4VLDO5VLDO6VLDO7VLDO8VLDO9VLDO10

CP_

OU

TC

PT

CP

B

VCHG_ADP_1

VCHG_ADP_2VCHG_ADP_3

VCHG_USB_1VCHG_USB_2

VBAT_2VBAT_3

VBAT_1VLDO11VLDO12VLDO13VLDO14

ISENSE_CHGVBACKUP

P_DRV

LED

1LE

D2

LED

3

GP_

IN1

GP_

IN2

GP_

IN3

GP_

IN4

GP_

IN5

GP_

IN6

GP_

IN7

GP_

IN8

Pwerkey2bPwerkey3Pwerkey4Pwerkey1b_bufferExt_WakeupSLEEPB

IRQ

BC

HG

_STA

TEB

VR

EF

USB_HP_LP

OV

P_W

LED

ND

RV_

WLE

DIS

EN

P_W

LED

ISE

NN

_WLE

DFB

_WLE

DE

N_W

LED

PW

MC

C_W

LED

SW_DRV

POWER/GNDS5M8750

U38D

S5M8750

A1C2F2G2H4H3

N8

L9K10J12E3

E4

H11C3

G12G9

J10B8

J2

K2

AVDD_LDO1AVDD_LDO23AVDD_LDO45AVDD_LDO67AVDD_LDO89AVDD_LDO10

AVDD_CP

AVSS_CPAVSS_CHGDVSS_LEDAVSS_GPADC

AVDD_GPADC

AVDD_LDO1213AVSS_LDO1

AVDD_LDO14AVSS_LDO_2

VDD_RTCLDODVDD_IIC

AVDD_WLED

AVSS_WLED

C176C1608

TP90VDD_USB12_PMIC 1

R209 2K

MP1

Si3443DV

Pin

TP91VDD_PLL_PMIC 1

TP511

C1811uF

JP8 JUMPER1 2

Pin

TP92VDD_LCD_PMIC 1Pin

TP711

C182

0.1uF

Q1

ZXMN4A06G

C1801uF

TP93VDD_OP3_PMIC 1

TP721

C178

10uF

D9

LED-WHITE

C1830.22uF

C219

47uF

D6

DL5817

12

C174 4.7uF

TP94VDD_RTC_PMIC 1

R212 330

D10

LED-WHITE

TP95VDD_CAM_PMIC 1

L15

LQH32C

C220 47uF

C175 0.47uF

R191 100K

Pin

TP471

R207

100K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AMD FlashMemory(SOCKET)

OR AM29LV160BB

SRAM

NAND Flash memory(SOCKET )

Socket

XD PICTURE CARD

[5] SRAM

[4] External

NAND

CFG3: nCS1

[2]

NOR(AMD)[1]

SROM Selector

[3] XD card

<Silk>

[6] CS8900(CS1)

S3C2450Addition : NAND CS1 & RnB1

S3C2450Addition : NAND CS1 SW(To Select Ethernet or Additional Nand CS)

R281~R284 place on top

[NAND]16-bit: connected to NC8-bit: connected to 0 ohm

NAND

XD card

[1]

[2]

CFG1: nFCE SROM Selector

[2]

CFG2: nCS0

NOR(AMD)

SROM Selector

External[3]

[1]

SRAM

<Silk>

<Silk>

NOR/NAND/SRAM/CONFIG 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

1 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_DATA15

B_DATA11IO2/IO10

B_DATA8

B_DATA2

B_DATA0

IO7/IO6

B_DATA5 B_DATA13

B_DATA3

IO4/IO12

IO7/IO6

IO0/IO9

B_DATA7

IO1/IO2IO2/IO10

B_DATA10

IO6/IO13

B_DATA9

B_DATA7

IO1/IO2 B_DATA2

IO6/IO13

IO0/IO9

IO4/IO12

B_DATA14

B_DATA1

B_DATA6

B_DATA14

B_DATA0

B_DATA5

B_DATA3

B_DATA11B_DATA10

B_DATA13B_DATA13B_DATA12

B_DATA6

B_DATA1

B_DATA0

B_DATA3

B_DATA7

B_DATA9

B_DATA2

B_DATA0

B_DATA4

B_DATA4

B_DATA4

B_DATA6

B_DATA4

B_DATA0

B_DATA3

B_DATA12

B_DATA6

B_DATA14B_DATA15

B_DATA7

B_DATA9B_DATA8B_DATA8

B_DATA6

B_DATA1

B_DATA2

B_DATA7

B_DATA11

B_DATA1

B_DATA1

B_DATA4

B_DATA10

B_DATA2

B_DATA5

B_DATA5

B_DATA12

B_DATA15

B_ADDR17

B_ADDR3

B_ADDR12

B_ADDR1

B_ADDR7B_ADDR8B_ADDR9

B_ADDR3

B_ADDR14

B_ADDR11

B_ADDR7

B_ADDR2

B_ADDR14

B_ADDR2

B_ADDR5

B_ADDR9

B_ADDR20

B_ADDR5

B_ADDR12

B_ADDR8

B_ADDR13

B_ADDR18

B_ADDR0B_ADDR1

B_ADDR15B_ADDR16

B_ADDR4

B_ADDR10

B_ADDR0

B_ADDR13

B_ADDR6

B_ADDR15

B_ADDR4

B_ADDR6

B_ADDR10B_ADDR11

B_ADDR16B_ADDR17

B_ADDR19

B_ADDR[25:0] 2,3,4,16

B_nROE 2,3,4,16B_nRWE 2,3,4,16

nRESET 16

B_DATA[15:0] 2,3,4,16

B_nRWE 2,3,4,16

B_ADDR[25:0]2,3,4,16

B_nROE 2,3,4,16

B_nFRE16

B_FCLE16

RnB16

nCS_XD

B_nFWE16B_FALE16

B_DATA[15:0]2,3,4,16

B_DATA[15:0]2,3,4,16

B_nCS516

B_SROM_nCS016

B_SROM_nCS116

B_nCS416

nCS_SRAM

B_nFWE16

B_FCLE16

B_FALE16

B_nFRE16

RnB16

nCS_AMD

B_nCS316B_nCS216 nCS_CF0 2

nCS_AMD

nCS_CF1 2

nCS_SRAMnCS_EXT 2

B_nRBE1 2,3,16B_nRBE0 2,16

B_nFWE16B_FALE16

RnB16

B_nFRE16nCS_NANDnCS_NAND1

B_FCLE16

nCS_EXT 2

nCS_NANDnCS_AMD

nCS_XD

B_DATA[15:0] 2,3,4,16

nCS_NAND1nCS_LAN91C115 4

nCS_SRAMnCS_CS8900 3

B_nFCE16 nCS_XDnCS_NAND

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

C1

100nF

+C5

10uF/16V

R2

100K

R15 NC

R36 0

R26 NC

CFG2

SW-SLIDE4

1234

8765

TP2 nFRE1 1

R3

100K

R1710K

R23 0

TP1 RnB1 1

U1

K6X4016T3F_1

54321

4443422726252423222120

78910131415162930313235363738

6

17

41

3940

1234

1133

1918

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15

I/O1I/O2I/O3I/O4I/O5I/O6I/O7I/O8I/O9

I/O10I/O11I/O12I/O13I/O14I/O15I/O16

CS

WE

OE

LBUB

VSSVSS

VCCVCC

A16A17

C4

100nF1

2

R37 0

U3

KM29U128T(8/16)

123456789

101112131415161718192021222324

484746454443424140393837363534333231302928272625

NC0NC1NC2NC3NC4NC5(nR/B2)nR/BnRECENC6(CE2)NC7VCC0VSS0NC8NC9CLEALEnWEWPNC10NC11NC12NC13NC14

NC29/ VSS2NC28/ IO15

NC27/ IO7NC26/ IO14

IO7/ IO6IO6/ IO13

IO5IO4/ IO12

NC25/ IO4NC24NC23VCC1

VSS/ NC22NC21NC20

NC19/ IO11IO3

IO2/ IO10IO1/ IO2IO0/ IO9

NC18/ IO1NC17/ IO8NC16/ IO0

NC15/ VSS1

+CT2

10uF/16V

R31

100K

TP4 FCLE1 1

R13 0 R14 0

R16 0

R7 0

C6100nF

12

R5

100K

R1

100K

R32

100K

R11 4.7K

R6 0

R34 0

R21 NC

R25 0

R30

100K

CON1

xD_CARD Socket

23456789

101112131415161718

191 R/B

RECECLEALEWEWPGNDD0D1D2D3D4D5D6D7VCC

GNDGND

TP5 nFWE1 1

R9 0

R33

100K

R24 0

+ CT1

10uF/16V

R19 0

C2

100nF

C7100nF

12

CFG1

SW-SLIDE2

12

43

R12 NC

R22 0

R10 0

R28NC

CFG3

Slide-SW6

R290

TP3 FALE1 1

R27 0

C3

100nF

12

R8 NC

R4

100K

R20 0

R35 0

R18 NC

U2

AM29LV800BB (with Socket) (1MB)

2524232221201918

87654321

481716

9

2746

26281115124737

29313335384042443032343639414345

10

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19

VSS0VSS1

nCEnOEnWE

nRY/BYnRESET

nBYTEVDD0

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14

DQ15/A-1

A20

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1

2

-Caution-Connecting withExternal Keyboard B/D& External Strata B/D

SMDK2450 Base B/D

QTE-040-01-L-D-EM2

1JF01

RESET/RESET/nRESET

BVD2/nSPKR/nDASP

CF

Compact Flash CON

nINPACK/nINPACK/DREQ

BVD1/nSTSCHG/nPDIAG

nREG/nREG/nDACK

External Bus connector & CF interface 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

2 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_ADDR25

B_DATA9

B_ADDR3

B_ADDR21

B_ADDR4B_ADDR6

B_DATA8

B_ADDR16

B_DATA0

B_ADDR20

B_DATA11

B_ADDR5

B_ADDR22

B_DATA5B_DATA6

B_DATA15

B_ADDR13

B_DATA1

B_DATA12 B_DATA13

B_ADDR15

B_ADDR7

B_ADDR10

B_DATA3

B_ADDR17

B_ADDR24

B_DATA4

B_ADDR11B_ADDR12

B_DATA14

B_ADDR23

B_ADDR9

B_ADDR18

B_ADDR0

B_DATA7

B_ADDR14

B_DATA10

B_DATA2

B_ADDR1

B_ADDR19

B_ADDR8

B_ADDR2

B_DATA10

B_ADDR10

B_ADDR4

B_ADDR7

B_ADDR2

B_DATA2

B_DATA5

B_ADDR0

B_DATA1

B_DATA6

B_ADDR6

B_DATA11B_DATA4

B_ADDR8

B_DATA13

B_ADDR1

B_ADDR3

B_DATA3

B_DATA7

B_ADDR9

B_DATA0

B_DATA9

B_DATA15

B_DATA12

B_DATA14

B_DATA8

B_ADDR5

B_DATA[15:0] 1,3,4,16

SPI_KEYMISO

nXDREQ0_I2S0_SDO2 9,12,16

nRSTOUT 3,4,16

B_DATA[15:0]1,3,4,16

nXDACK1_IICSDA18,16

nWAIT 3,16

SPI_KEYMOSI

B_ADDR[25:0] 1,3,4,16

nXDACK0_I2S0_SDO19,12,16

SPI_KEYCLK

B_ADDR[25:0]1,3,4,16

nXDREQ1_IICSCL1 8,16

SPI_KEYnSS

B_nRWE1,3,4,16 B_nROE 1,3,4,16

nXBREQ16 nXBACK 16

B_nRBE11,3,16B_nRBE01,16

RXD0 13,16TXD0 13,16

nCS_EXT1

EINT216TOUT216

PWREN_CF 16

SPI_KEYnSSSPIMISO016

nSS016SPI_KEYMISO

SPIMOSI016

SPICLK016 SPI_KEYCLK

SPI_KEYMOSI

nCS_CF01

CD1_CF

nINPACK_CF 16

CD1_CF

nWAIT 3,16

nREG_CF 16

CD2_CF

B_nWE_CF 16

RESET_CF 16

B_nRWE 1,3,4,16B_nROE 1,3,4,16

CD2_CF

B_nOE_CF16

PWREN_CF16

nCS_CF1 1

nIRQ_CF 16

B_DATA[15:0] 1,3,4,16B_DATA[15:0]1,3,4,16

B_ADDR[25:0]1,3,4,16

B_DATA[15:0]1,3,4,16

nIRQ_CF16

B_nWE_CF16

B_nRWE1,3,4,16

B_nROE1,3,4,16

nCS_CF11

nCS_CF01

B_nOE_CF16

RESET_CF16

nINPACK_CF16

nREG_CF16

CD_CF_CAM_FIELD_A 8,16

VDD3.3V

VDD_CF

VDD3.3V

VDD3.3V

VDD_CF

VDD_CF

VDD3.3V

VDD_CF

TP17

D1SMD TYPE (BLUE)

12

TP161

+CT3

10uF

R38

10K

R51 0

R45 10KR

4010

K

R44 10K

+CT4

10uF/16V

R42 10K

TP91

C10100nF

12

R41 10K

Q1SI2333DS

3

1

2

R43 10K

TP121

R52 0

TP141

R53 0

TP71

C9100nF

12

TP81

R46 0

CON3

CF050-YAMAICHI

123456789

10111213141516171819202122232425

26272829303132333435363738394041424344454647484950

GNDD3D4D5D6D7nCE1A10nOEA9A8A7VCCA6A5A4A3A2A1A0D0D1D2WPCD2

CD1D11D12D13D14D15

nCE2nVS1/GND

nIORDnIOWR

nWEIREQVCC

nCSELnVS2/OPEN

RESETnWAIT

nINPACKnREG

nSPKRnSTSCHG

D8D9

D10GND

R54 0

R4910K

TP101

R47 0

C8

100nF

TP111

C11100nF

12

CON2

QTE-040-01-L-D-EM2

13579

1113151719212325272931333537394143454749515355575961636567697173757779

2468101214161820222426283032343638404244464850525456586062646668707274767880

TP6

TP131

U4

SN74LVC1G32DBV- 3.3V

41

2

53

TP151

R50330

R4810K

R39

10K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LINK

LAN

(nHC1)

(nPWDN_ETH)

Unload

(XFMRS / XF10B11A-COMBO1-4S)

Ethernet Controller(CS8900) 0.0

SMDK2443 (S3C2443 Evaluation Board)

A3

3 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_D

ATA

14B

_DA

TA13

B_D

ATA

15

B_D

ATA

11

B_DATA9B_DATA8

B_D

ATA

12

B_D

ATA

10

B_D

ATA

2

B_D

ATA

0

B_D

ATA

3

B_D

ATA

4

B_D

ATA

6B

_DA

TA5

B_D

ATA

7

B_D

ATA

1

B_ADDR7

B_ADDR12

B_ADDR11

B_ADDR5B_ADDR4B_ADDR3

B_ADDR6

B_ADDR0

B_ADDR8

B_ADDR1

B_ADDR9B_ADDR10

B_ADDR2

B_ADDR18

B_ADDR16B_ADDR15B_ADDR14B_ADDR13

B_ADDR17

B_DATA[15:0] 1,2,4,16

B_DATA[15:0]1,2,4,16

B_ADDR[25:0] 1,2,4,16

nCS_CS89001

B_nRBE1 1,2,16

IRQ_LAN 4,16

nCS_CS89001

nRSTOUT2,4,16

B_ADDR232,16

B_nRWE1,2,4,16

B_nROE1,2,4,16

nCS_CS89001

B_nROE1,2,4,16

B_nRWE1,2,4,16

B_ADDR232,16

nWAIT2,16

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3VVDD3.3V VDD3.3V VDD3.3V VDD3.3V VDD3.3V

X120.0Mhz

TP19IRQ_LAN

11

U5

SN74LVC1G32DBV

1

24

53

D3 SMD TYPE (GREEN)

1 2C15

100nF (NC)

D2 SMD TYPE (GREEN)

1 2

R58 4.99K,1%

R63 330

R56 0

C12

560pF

R65 0

R59 0

R64 0

C13

0.1uF 2KV(NC)

C16

100nF

R62 330

U11

SN74LVC1G332DBV25

4136

U6

SN74LVC1G04DBV

2 4

53

U9

CS8900A-CQ3

767778798081828384858687888990919293949596979899

100

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

50494847464544434241403938373635343332313029282726

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

nTESTnSLEEPnBSTAT/nHC1DI+DI-CI+CI-DO+DO-AVDD2AVSS2TXD+TXD-AVSS1AVDD1RXD+RXD-RESAVSS3AVDD3AVSS4XTAL1XTAL2nLINKED/nHC0nLANLED

AV

SS

0nE

LCS

EE

CS

EE

SK

EE

DA

TAO

UT

EE

DA

TAIN

nCH

IPS

EL

DV

SS

1D

VDD

1D

VS

S1A

DM

ARQ

2nD

MA

CK

2D

MAR

Q1

nDM

AC

K1

DM

ARQ

0nD

MA

CK

0nC

SO

UT

SD

15S

D14

SD

13S

D12

DVD

D2

DV

SS

2S

D11

SD

10

SA12nREFRESH

SA11SA10

SA9SA8SA7SA6SA5SA4SA3SA2SA1SA0

nSBHEINTRQ3

nMEMCS16nIOCS16INTRQ0INTRQ1INTRQ2nMEMR

nMEMWSD8SD9

RE

SE

TS

D7

SD

6S

D5

SD

4D

VS

S4

DVD

D4

SD

3S

D2

SD

1S

D0

IOC

HR

DY

AE

NnI

OW

nIO

RS

A19

SA

18S

A17

DV

SS

3AD

VDD

3D

VS

S3

SA

16S

A15

SA

14S

A13

R66 0

J1

Header

1 2

C17

100nF

U7

SN74LVC1G32DBV

1

24

53

TP18

nHC111

C18

100nF

R55 8 1%

U10

SN74LVC1G332DBV25

4136

C14

0.1uF 2KV (NC)

R57 0

R60 8 1%

R61

100 1%

+CT5

10uF/16V

C19

100nF

U8

SN74LVC1G04DBV

2 4

53

C20

100nF

CON4

Single_Ports_Combo

12345678

910

CT_T2TD-

CT_T1TD+RD+

CT_R1RD-

CT_R2ShieldShield

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TP20 have to located near by B_ADDR6 like B_ADDR7.

Ethernet Controller(LAN9115) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

4 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_DATA5

EEP_CS

B_DATA3

nSPD_100

B_DATA8

B_DATA6

nSPD_100

EEP_DIO

EEP_DIO

B_DATA13

B_DATA4

nFDPLX

B_DATA9

B_DATA14

nLINK_ACKB_DATA11

B_DATA0

nFDPLX

B_DATA10

EEP_CLK

B_DATA1

B_DATA15

B_DATA7EEP_CLK

nLINK_ACK

B_DATA2

EEP_CS

B_DATA12

B_ADDR5

B_ADDR1

B_ADDR3B_ADDR2

B_ADDR0

B_ADDR6

B_ADDR4

PME

B_DATA[15:0]1,2,3,16

B_nRWE1,2,3,16

PME

B_nROE1,2,3,16

FIFO_SEL

SPD_SEL

nRSTOUT2,3,16

SPD_SEL

FIFO_SEL

B_ADDR[25:0]1,2,3,16

nCS_LAN91C1151

IRQ_LAN 3,16

IRQ_LAN3,16

B_ADDR71,2,3,16

VDD3.3V

VDD3.3V

VDD_Ethernet

VDD3.3V

VDD_Ethernet

VDD3.3V

VDD_EthernetVDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

R101 150K

R80

49.9

+

C21 6.8nF

C2633pF 50V 5%

C2310nF

R82

49.9

+

C3233uF/6.3V

R102

120K

R81

49.9

S558-5999-46(HighSpeed Lan)

U13

161415

75

1210

4 8

132

9 13

6

11

TD+TCTTD-

RX+RCMT

TCMTTX+

NC

NC

RD+RCTRD-

NC

NC

RX-

TX-

+

C22 6.8nF

R83

49.9

R86

49.9

D-3

LED-GREEN

U15

LTC3405A

1

6

5

34

2

RUN

MODE

Vfb

SWVIN

GN

D

93LC46EEPROM

U141234

65

87CS

CLKDIDO

ORGGND

VCCNC

+CT7

10uF

C2533pF 50V 5%

R95332

R87

49.9

D-1

LED-GREEN

R90

12K

R77 12.4K

L1 4.7uH LQH3C4R7M34

R74 0

TP20

R96332

R67

49.9

D-2

LED-YELLOW

21

C30

100nF

+C34

4.7uF/6.3V

R73 0

R75 0

Y1

25MHz(SMD)

C2422nF

R97332

R68

49.9

U12

LAN9115

18171615141312

64636259585756535251504946454443

11 4 66 1 19 27 34 41 47 54 60 96 77 80 86 88

84

79788382

87

696768

9899100

71

7476

73

6

5

9

10

91

2 7 8 65 3 20 28 898581976155484235

4039383736333231302926252423227521

95929394

7270

90

A1A2A3A4A5A6A7

D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15

VS

S_R

EF

VS

S_P

LL

GN

D_C

OR

EG

ND

_CO

RE

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

GN

D_I

OG

ND

_IO

VS

SA

VS

SA

VS

SA

VS

SA

NC

TPO+TPO-TPI+TPI-

EXRES1

EECLK_GPO4EEDIO_GPO3

EECS

nGPIO0_LED1nGPIO1_LED2nGPIO2_LED3

NC

SPD_SELFIFO_SEL

NC

XTAL1

XTAL2

ATEST

RBIAS

NC

VR

EG

VD

D_P

LL

VD

D_R

EF

VDD

_CO

RE

VDD

_CO

RE

VD

D_I

OV

DD

_IO

VDD

_AVD

D_A

VDD

_A

VD

D_I

OV

DD

_IO

VD

D_I

OV

DD

_IO

VD

D_I

OV

DD

_IO

TX_CLKTXD0TXD1TXD2TXD3COLCRSMDCMDIORX_DVRX_CLKRX_ERRXD3RXD2RXD1RXD0TX_EN

nRESETnRDnWRnCS

IRQPME

NC

R93 10K

R88 1M

R89 0

+CT6

10uF

R70 0

R92 0

R76 0

C31

100nF

R69

10

R98 10K

R91 0

R71 0

R84

75

R94 0

C33

4.7uF

12

R99 1K

R78

49.9

R72 0

C27 22pF1 2

R85

75

CON5

RJ45(RJHS-5380)

12345678

910

1112

12345678

910

1112

R100 1K

R79

49.9

C29

100nF

C28

100nF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

L : B to AH : A to B

J4 1-2

EXT_SPILCD_SPI

2-3

(R1)

(R2)

Vo = 0.6V * (1+R2/R1)= 2.8V

(600mA)

R2 = (Vo/0.6V - 1) * R1

LVDS

EXT_SPI/LCD_SPI

ADC

VLED_Anode

TFT LCD Backlight LED Power

VLED_Cathode

B05. LCD General/SPI/ADC 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

5 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

VD2VD3

VD5

VD12

VD19

VD7

VD9

VD23

VD11

VD0

VD4

VD13

VD22

VD17

VD20

VD1

VD6

VD8

VD14

VD21

VD10

VD18

VD16

VD15

LD0

LD4LD21

LD1

LD8

LD12

LD20

LD15

LD23

LD5

LD13

LD16

LD19

LD7

LD3

LD11

LD18

LD6 LD22

LD2

LD9LD10

LD14

LD17

SPIMOSI116

nSS116 SPI_LCDCLK 6,7

LD[23:0]6,7

SPI_LCDnSS 6,7

VD[23:0] 16

SPICLK116

SPIMISO116

SPI_LCDMOSI 6,7

AIN1 16AIN3 16

TSYP 6,7,16AIN416AIN216AIN016

AIN5 16

TSXP 6,7,16TSYM6,7,16TSXM6,7,16

TOUT1 16

LD[23:0]6,7VD[23:0] 16

LCD_LEND7

LCD_nRESET6,7

LCD_VCLK6,7LCD_VDEN6,7

LCD_VSYNC6,7LCD_HSYNC6,7

RGB_VDEN 16

RGB_VSYNC 16

RGB_VCLK 16RGB_HSYNC 16

nDIS_OFF 16

LCD_PWREN 16

nDIS_OFF16LED- 6,7

BACKLIGHT_PWM16

LED+ 6,7

LCDVF1 13nLED415,16nLED215,16 LCDVF2 13

VDD3.3V

VDD3.3V

VDD_LCDI

VDD_LCDI

VDD3.3V

VDD3.3V

VDD3.3V

VDD_LCDI

B_PWR_5V

VDD_DISP

VDD_LCDI

VDD3.3V

VDD3.3VVDD_LCDI

VDD_DISP

VDD3.3V

VDD3.3V

+

C364.7uF/6.3V

R103 0 U16

LTC3406ES5

12

3

5

4

RUNGND

SW

VOUT

VIN

C46100nF1

2

TP21SPI_LCDMISO

1

C38

100nF

R117 0R0

CON9

HEADCONN_5P

12345

12345

U19

SN74AVCA164245DGG

2356891112

4746444341403837

3635333230292726

1314161719202223

124

4825

7183142

1B11B21B31B41B51B61B71B8

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1DIR2DIR

1OE2OE

VCCBVCCBVCCAVCCA

C49

100nF

12

L2 2.2uH LQH32CN2R2M33

+C39

33uF/6.3V

D51SS355

R12020

J31 2

R119 0R0

U17

SN74CBTLV3257

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

+ CT8

4.7uF/6.3V

+ CT91uF/25VTP22

U20

SN74AVCA164245DGG

2356891112

4746444341403837

3635333230292726

1314161719202223

124

4825

7183142

1B11B21B31B41B51B61B71B8

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1DIR2DIR

1OE2OE

VCCBVCCBVCCAVCCA

R104 Unload

L4 10uH12

C47100nF1

2

R112 NC

VR1 500K1 3

2

+C37

33uF/6.3V

J4JUMPER31

3

2

R113 NC

R105100K

R106

100K

R115

10K

CON7

2.54mm header 10pin

1 23 45 67 89 10

R116 0

C48100nF1

2

R118 4.7K

J21 2

U21

MPS MP1521EK/MSOP-10P

1

2

3

4

5 6

7

8

9

10IN

EN

REF

BRT/PWM

FB3 FB2

FB1

OLS

GND

SW

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(4.9V)

3.28V ~ 0.08V

0.28V ~ 3.56V

LVT350QVRGB/QVGA(3.5") 24-bpp

LTE480WERGB/WVGA(4.8") 24-bpp - Default

LCD interface & TFT LCD(Landscape type) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

6 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

SC1

SC2

SC4

SC3

SC6

SC5

SC3

SC5

SC4

SC1SC2

SC6

LD0LD1LD2LD3LD4LD5

LD7LD6

LD13

LD11

LD14LD15

LD8LD9LD10

LD12

LD21

LD19

LD22LD23

LD16LD17LD18

LD20

LD[23:0]5,7

TSYM5,7,16TSXM5,7,16TSYP5,7,16TSXP5,7,16

M

M

LED-5,7

LED+5,7

LD125,7

LD155,7

LD65,7

LD145,7

TSYM5,7,16

LD205,7

LD55,7

TSXM5,7,16

LD235,7

LD105,7LD115,7

LD95,7

LD195,7

LD75,7

LD225,7

LD185,7

TSXP5,7,16

LD175,7

LD25,7

LD85,7

LD135,7

LD45,7

LD15,7

TSYP5,7,16

LD35,7

LD165,7

LD215,7

LD05,7

LCD_nRESET5,7SPI_LCDnSS5,7SPI_LCDCLK5,7SPI_LCDMOSI5,7

LED+5,7

LED-5,7

LCD_HSYNC5,7LCD_VSYNC5,7

LCD_VCLK5,7

LCD_VDEN5,7

LCD_nRESET5,7

LCD_VDEN5,7

LCD_HSYNC5,7

LCD_VCLK5,7

LCD_VSYNC5,7

VDD3.3VVGH

VDD3.3V

AVDD

VDD_LCDI

VGL

AVDDVCOM

VCOM

VGH

VGL

AVDD

VDD_LCDI

R146 5.6K

R1360

R148 3.3K

R122 0

R141 0

R14720K

C55

OPEN

R121 0

C72

105

C64

105

C69

105

R124

100K

C65 105

C66

105

C61 105

R13436K

R13712K

C60 105

R139 0

CON12

molex: 51296-4593

789

101112131415161718192021222324252627282930313233343536373839404142434445

6543

12

PD18(R2)PD19(R3)PD20(R4)PD21(R5)PD22(R6)PD23(R7)PD8(G0)PD9(G1)PD10(G2)PD11(G3)PD12(G4)PD13(G5)PD14(G6)PD15(G7)PD0(B0)PD1(B1)PD2(B2)PD3(B3)PD4(B4)PD5(B5)PD6(B6)PD7(B7)GNDDOTCLKPCIHSYNCVSYNCDEGNDGNDY2X2Y1X1GNDLED1-LED1+LED2-LED2+

PD17(R1)PD16(R0)VCCVCC

GNDGND

C68

105(NC)

R1310

-

+

LM8262(LM8261)U233

21

48

D9BAT54S

R1324.7K

C71

105

C50

106

C53

100nF

CON11

JAE:FF0360SA1

789

101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960

6543

12

Y1X2Y2GNDC6C5MRESETCSSCLSDIB0B1B2B3B4B5B6B7G0G1G2G3G4G5G6G7R0R1R2R3R4R5R6R7HSYNCVSYNCDOTCLKAVDDAVDDVDDVDDC4VGLVGLC3VGHC2C1VCOMVCOMENABLEGNDGND

X1GNDLED+LED+

LED-LED-

R1301608,OPEN

R1441K

C67

105

C59

105

R133

0

C51

106

D7

BAT54S

R127 0

C70

105

R149 200

R140 0

+CT10

10uF

R143 0

R135180K

R142 0

C54

225

C63 105

R129 0

R123

150K

C52

106

R128 0

C56

105D8

BAT54S

R125 0R126

51K

D6

1SS355

C57 105

R138 0

C58

104

C62 105

L5

10uH

R14520K

U22

MAX1779

12345678

161514131211109

NRDYFBINITGINGNDREFFBPFBN

TGNDLX

PGNDSUPPDRVPSUPNDRVN

NSHDN

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU interface

CPU IF(Main/Sub)

Back-Light Max 20mA (230mW)

RGB serial interface

RGB Serial IF

RGB serial / CPU MainLCD

Back-Light Max 20mA (230mW)

Main LCDTouchScreen

Only CPU SubLCD

<Silk>

Back-Light Max 20mA (230mW)

SUB

J5

MAIN

Main LCD CS(SYS_CS0)

Samsung LCD LTS222QV(1.7V~3.3V)RGB serial/CPU QVGA(2.22")18-bpp

SPI CS

LCD IF 2-31-2

TFT LCD(CPU/RGB portrait type) / CSTN LCD 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

7 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

TLCD_D0

TLCD_D6

TLCD_D14

nCPU_OE

TLCD_D1

TLCD_D5

nCPU_OE

nCPU_OE

LD9

TLCD_D3

LD22

TLCD_D2

TLCD_D4

TLCD_D11

TLCD_D17

TLCD_D0

LD4

TLCD_D1

TLCD_D10

TLCD_D13

TLCD_D3

LD3

LD7

TLCD_D11TLCD_D12

LD10

TLCD_D15

TLCD_D13

TLCD_D17

LD19

LD2

TLCD_D9

TLCD_D3

LD21

LD8

LD6

TLCD_D4

TLCD_D1

TLCD_D2

TLCD_D15

TLCD_D14

LD12

TLCD_D16

TLCD_D4

LD13

LD11

TLCD_D5

LD11

TLCD_D4

TLCD_D8

LD20

LD14

TLCD_D2

TLCD_D13

TLCD_D0

TLCD_D10

TLCD_D16

LD1

TLCD_D11

TLCD_D15

TLCD_D9

TLCD_D0

TLCD_D2

LD10

TLCD_D6

LD12

TLCD_D7

LD15

LD5

TLCD_D17

TLCD_D10

TLCD_D13

LD14

TLCD_D3

LD6

TLCD_D12

TLCD_D9

TLCD_D1

LD3

LD5

TLCD_D6

LD16

TLCD_D9

TLCD_D7

TLCD_D10

TLCD_D5

TLCD_D5

TLCD_D6

LD13

TLCD_D15

TLCD_D12

nRGB_OE TLCD_D16

TLCD_D16

LD15

LD2

TLCD_D8LD7

TLCD_D11

TLCD_D14

LD0

LD17

TLCD_D12

LD4

TLCD_D7

TLCD_D17

TLCD_D14

TLCD_D8

nRGB_OE

LD18

TLCD_D7TLCD_D8

LD23

TLCD_D[17:0]

TSYS_RS

TRGB_SPICLK

LED-5,6

TSYM5,6,16

TLCD_nRESETTSYS_OE

TSYS_WR

TSYS_CS1

SPI_LCDCLK5,6

TSYS_OE

TRGB_VCLK

SPI_LCDnSS5,6

LCD_LEND5

LCD_nRESET5,6

TLCD_D[17:0]

TRGB_SPIMOSI

SPI_LCDMOSI5,6

TLCD_nCS0

TLCD_nRESETLCD_HSYNC5,6

LCD_VDEN5,6

TSYS_OE

LCD_VCLK5,6

TRGB_HSYNCTRGB_VCLK

LD[23:0]5,6

TRGB_VSYNC

TSYS_CS1

LCD_VSYNC5,6

LED+5,6

LCD_HSYNC5,6

TRGB_VSYNC

TRGB_SPICLK

LCD_VSYNC5,6

TSXM5,6,16

LD[23:0]5,6

LED-5,6

TLCD_nCS0

TRGB_HSYNC

TRGB_SPIMOSI

TLCD_nCS0

TRGB_SPIMOSITRGB_VCLK

TSYS_WR

TRGB_VSYNC

TLCD_D[17:0]LCD_VCLK5,6

TRGB_SPICLK

TLCD_D[17:0]

TRGB_HSYNC

LED+5,6

TSYS_WR

TSXP5,6,16

TSYS_RS

TLCD_nRESET

TSYS_RS

TSYP5,6,16

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

VDD_LCDI

U24

SN74CBTLV16211GR

2345679

10

1516182021222324

5556

5453525150484746

4140393736353433

17

819 38

49

11121314

25262728

32313029

45444342

1

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCC

GND0GND1 GND2

GND3

1A91A101A111A12

2A92A102A112A12

2B92B102B112B12

1B91B101B111B12

NC

J5JUMPER3

13

2

+CT11

10uF/10V

C76

1nF

12

R156 0

CON14

JAE_FF0140SA1

123456789

10111213141516171819202122232425262728293031323334353637383940

GND1GND2nCSRSnWRnRDnRESETD0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D16D17PSXBWS1BWS0DTX2DTX1BWS2SISCLVSYNCHSYNCDOTCLKIF_SHARERGB/CPUnVCC39_2.8VVCI40_2.8V

C77

1nF1

2

+CT12

10uF/10V

CON15

M60-04-30-134P Mitsumi

1234

U25

SN74CBTLV16211GR

2345679

10

1516182021222324

5556

5453525150484746

4140393736353433

17

819 38

49

11121314

25262728

32313029

45444342

1

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

1OE2OE

1B11B21B31B41B51B61B71B8

2B12B22B32B42B52B62B72B8

VCC

GND0GND1 GND2

GND3

1A91A101A111A12

2A92A102A112A12

2B92B102B112B12

1B91B101B111B12

NC

C73

100nF

C78100nF1

2

R15210K

CON13

JAE_FF0140SA1

123456789

10111213141516171819202122232425262728293031323334353637383940

GND1GND2nCSRSnWRnRDnRESETD0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D16D17PSXBWS1BWS0DTX2DTX1BWS2SISCLVSYNCHSYNCDOTCLKIF_SHARERGB/CPUnVCC39_2.8VVCI40_2.8V

R15710K

+ CT1410uF/16V

12

CON17

2Pin FPC Solder Type

12

R154

4.7K+ CT13

10uF/16V

12

R153

4.7K

R150

4.7K

R155 0

C74

100nF

CON16

2Pin FPC Solder Type

12

C75100nF1

2

R151

4.7K

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

(2.9V,600mA)

Camera Interface

L : B to AH : A to B

8-SOP-225

IIC Interface

Camera Interface 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

8 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

CAMDATA6B_CAMDATA7

CAMDATA3

B_CAMDATA6

B_CAMDATA3

B_CAMDATA1

B_CAMDATA5 CAMDATA5B_CAMDATA4

B_CAMDATA0

B_CAMDATA2 CAMDATA2

CAMDATA0CAMDATA1

CAMDATA7

CAMDATA4

B_CAMDATA6

B_CAMDATA1 B_CAMDATA0

B_CAMDATA5 B_CAMDATA4B_CAMDATA3

B_CAMDATA7

B_CAMDATA2

CAMRESET 16CAMPCLKOUT 16

CAMVSYNC 16CAMHREF 16CAMPCLK 16

CAMDATA[7:0] 16

IICSCL12,16 IICSDA 12,16

B_CAMDATA[7:0]

B_CAMPCLKB_CAMHREF

B_CAMVSYNC

B_CAMCLKB_CAMRST

B_CAMRST

B_CAMCLK

B_CAMHREF

B_CAMPCLKB_CAMVSYNC

B_CAMDATA[7:0]B_CAMDATA[7:0]

CAM_FIELD_B

CD_CF_CAM_FIELD_A2,16 CAM_FIELD_B

nXDREQ1_IICSCL1 2,16

nXDACK1_IICSDA1 2,16

IICSCL 12,16

IICSDA 12,16

VDD_CAMERAB_PWR_5V

VDD_CAMERA

VDD_CAM_EXT

VDD_CAMERA

VDD_CAMERA

VDD_CAMERA

VDD_CAMERA

VDD_CAM_EXT

VDD_CAM_EXT

VDD_CAM_EXT

VDD_CAMERAVDD_CAMERA

VDD_CAM_EXTVDD_CAM_EXT

VDD_CAM_EXT

VDD_CAM_EXT

VDD3.3V

VDD3.3V

CFG4

SW-SLIDE4

1234

8765

R161 0R0

J71 2

+

C884.7uF/6.3V

R16570K

+

C8933uF/6.3V

C80

100nF

12

J61 2

CON20

2.54mm header female

12345678910111213141516171819202122232425262728293031323334353637383940

C85100nF

12

R160 0R0

U29

KS24C080C

1234 5

678NC0

NC1NC2VSS SDA

SCLWP

VDD

C90100nF1

2

U30

LTC3406ES5

12

3

5

4

RUNGND

SW

VOUT

VIN

R162 10K

+

C9133uF/6.3V

C79100nF

12

R164 270K

U28

SN74AVCA164245DGG

2356891112

4746444341403837

3635333230292726

1314161719202223

124

4825

7183142

1B11B21B31B41B51B61B71B8

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1DIR2DIR

1OE2OE

VCCBVCCBVCCAVCCA

L6 2.2uH LQH32CN2R2M33

C83100nF

12

C86100nF

12

C81

100nF

12

R159

10K

R163 10K

C87100nF

12

C82100nF

12

C84100nF

12

U27

SN74AVCA164245DGG

2356891112

4746444341403837

3635333230292726

1314161719202223

124

4825

7183142

1B11B21B31B41B51B61B71B8

1A11A21A31A41A51A61A71A8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1DIR2DIR

1OE2OE

VCCBVCCBVCCAVCCA

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MOSFET BUS switch[nBE=0]BX=0 : A1<=>B1, A2<=>B2BX=1 : A1<=>B2, A2<=>B1[nBE=1]A1=Z, A2=Z

GPECON=2'b10GPESEL=1'b0SDO1/2 :GPBCON=2'bxxGPBSEL=1'b1

OFF(Def.)Disable

[4]

Audio0

AC97

DemuxDemux

ON

ON

[3]

OFF

PCM0

X

CFG5: Audio port Enable/Demux

ON

[2]

ON

OFF(Def.)

OFF

IIS1*(Def)

I2S0(Def)

PCM1*

Audio1

Enable

ON

<Silk>

[1]

GPLCON=2'b11GPLSEL=1'b0LRCLK :GPJCON=2'b11GPJSEL=1'b0

GPLCON=2'bxxGPLSEL=1'b1FSYNC :GPJCON=2'bxxGPJSEL=1'b1

Audio port0

Audio port1

MOSFET BUS switch[nBE=0]BX=0 : A1<=>B1, A2<=>B2BX=1 : A1<=>B2, A2<=>B1[nBE=1]A1=Z, A2=Z

Each signalsshould havesame routinglength

Each signalsshould havesame routinglength

En/Disable

PORT #

same routinglength(includingSDO1, SDO2)

*For I2S1,PCM1 set CFG6 switch of CPU b'd

for loopback, b'd to b'd,& waveform observe

Loopback

[6]

ON

X

X

X

[6][5]

OFF

ON OFF

GPECON=2'b11GPESEL=1'b0

GPECON=2'bxxGPESEL=1'b1

MOSFET BUS switch[nBE=0]BX=0 : A1<=>B1, A2<=>B2BX=1 : A1<=>B2, A2<=>B1[nBE=1]A1=Z, A2=Z

Each signalsshould havesame routinglength

MOSFET BUS switch[nBE=0]BX=0 : A1<=>B1, A2<=>B2BX=1 : A1<=>B2, A2<=>B1[nBE=1]A1=Z, A2=Z

Pcm0/1 are verified by 8753 codec(default)but can be verified by 9714(sw setting is needed)

<Pcm0/1 select>

(default)

(8753)

(8753)

Each signalsshould havesame routinglength(exceptpcm0_ext_clk)

Each signalsshould havesame routinglength(exceptpcm0_ext_clk)

Each signalsshould havesame routinglength(exceptpcm0_ext_clk)

Audio(Demux) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

9 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

nAudio1_EnnI2S1_PCM1

nAudio0_EnnI2S0_AC97PCM0

nI2S1_PCM1

nAudio0_EnnI2S0_AC97PCM0

nAudio1_En

nPCM1_PCM0

nPCM1_PCM0

nAC97_PCM0

nAC97_PCM0

nAudio0_En

I2S0_SDI_PCM0_SDI_AC_SDI16

I2S0_SCLK_PCM0_SCLK_AC_SYNC16

B_I2S0_SDI 12B_I2S0_SDO 12

B_I2S0_CDCLK 10I2S0_LRCK_PCM0_FSYNC_AC_nRESET16

I2S0_SDO_PCM0_SDO_AC_SDO16

I2S0_CDCLK_PCM0_CDCLK_AC_BIT_CLK16

B_I2S1_CDCLK 10I2S1_LRCK_PCM1_FSYNC16

I2S1_SCLK_PCM1_SCLK16

I2S1_SDO_PCM1_SDO16 B_I2S1_SDO 12B_I2S1_SDI 12

I2S1_CDCLK_PCM1_CDCLK16

I2S1_SDI_PCM1_SDI16

B_I2S0_SCLK 12

B_I2S0_LRCLK 12

B_I2S1_SCLK 12

B_I2S1_LRCLK 12

I2S1_CDCLK_PCM1_CDCLK 16

I2S0_SDI_PCM0_SDI_AC_SDI16

I2S0_SCLK_PCM0_SCLK_AC_SYNC16

I2S1_LRCK_PCM1_FSYNC 16

I2S1_SDI_PCM1_SDI 16

I2S0_CDCLK_PCM0_CDCLK_AC_BIT_CLK16

nXDACK0_I2S0_SDO12,12,16

I2S1_SDO_PCM1_SDO 16

nXDREQ0_I2S0_SDO22,12,16

I2S0_LRCK_PCM0_FSYNC_AC_nRESET16

I2S0_SDO_PCM0_SDO_AC_SDO16

I2S1_SCLK_PCM1_SCLK 16

B_PCM8753_SYNC 12

B_PCM8753_SOUT 12B_PCM8753_SIN 12

B_PCM8753_SCLK 12

B_PCM1_SYNC

B_PCM1_SCLK

B_PCM9714_SCLK 11

B_PCM9714_SOUT 11B_PCM9714_SIN 11B_PCM9714_SYNC 11

B_AC97_BITCLK 11

PCM0_EXT_CLK 10

B_AC97_RSTn 11

B_AC97_SYNC 11

B_AC97_SDO 11B_AC97_SDI 11

B_PCM1_SINB_PCM1_SOUT

B_PCM1_SCLK

B_PCM1_SYNCB_PCM1_SINB_PCM1_SOUT

B_PCM0_SYNC

B_PCM0_SCLK

B_PCM0_SINB_PCM0_SOUT

B_PCM0_SCLK

B_PCM0_SYNCB_PCM0_SINB_PCM0_SOUT

I2S0_SDO_AND_0_1_2

I2S0_SDO_AND_0_1_2

PCM1_EXT_CLK 10

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

U49SN74LVC1G11DBV

13

25

46

C93

100nF

U33

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

U31

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

R170

100K

R314 100K

J15JUMPER(N.C)1 2

U48

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

R312 0

R305

100K

C92

100nF

R3040(NC)

CFG5

Slide-SW6

CON24CON12B (N.C)

123456

789101112

R169

100K

R167

100K

R166

100K

C94

100nF

R313 0

U32

SN74CBTLV3383DGVRE4

1

23

4 5

67

8 9

1011

12

24

2322

21 20

1918

17 16

1514

13nBE

1B11A1

1A2 1B2

2B12A1

2A2 2B2

3B13A1

GND

VCC

5B25A2

5A1 5B1

4B24A2

4A1 4B1

3B23A2

BX

R168

100K

C171

100nF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Speaker Out -L,R-WM8753

I2S1/PCM OUT<Silk>

Line In<Silk>

single-ended micbias supplied from codec chip,mic bias = AVDD * 0.9 = 2.97V or AVDD * 0.75 = 2.475Vcodec chip micbias enable setting is needed

OFF

<Silk>

ON

[2]

Speaker Out-Rear L,R-WM8580 OUT3

Speaker Out -Front L,R-WM8580 OUT1

I2S FRONT<Silk>

<Silk>I2S REAR

I2S CENTERSpeaker Out-Center, LF-WM8580 OUT2

<Silk>

VTG div. (Def.)

<Silk>

<mic bias part>

Speaker Out-L,R-WM9714

<Silk>AC97 OUT

AC9714(Def.)

CFG6 [1]IIS1_PCM8753

Mic in direction select

ON

OFF

ON

ONOFF

PCM0

ON

OFF

[1]I2S1 cdclk path select/codec operating clk supply

<External Clock select part>

I2S1 Master External clock

OFF OFF

OFFI2S1 Master(Def.) ON

I2S1 Slave/PCM Master

[3]

I2S1

CFG 8 [2]

I2S0

Audio port0

Audio port1

OFF

[2]

ON

OFF

I2S0 Master External clock

OFF

I2S0 cdclk path select

ON

[1]

OFF

<Silk>

CFG 7I2S0 Master(Def.)

I2S0 Slave PCM1

[1]

[2]

[3]

[4]

8580PLL

From

OSC2

OSC1

8753PLL

CFG10CFG11

To.

Ext.ClkSel.

All Off (Default)

<i2s cdclk select/codec operating clk supply>

(LightBlue)

(Green)

(Orange)

(Black)

(Green)

(Green)

Mic bias sourceCFG12[1]

[2] 8753 Codec[3] 9714 Codec

Mic In <Silk>

(Pink)

support Electret Condeser Mic.

Audio(Ext. Clk & Conn) 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

10 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

I2S1_PCM8753_OUT_L12

I2S1_PCM8753_OUT_R12

I2S1_PCM8753_LINEIN_L12

I2S1_PCM8753_LINEIN_R12

I2S08580_OUT3_L12

I2S08580_OUT2_R12

I2S08580_OUT2_L12

I2S08580_OUT3_R12

AC9714_OUT_L11

AC9714_OUT_R11

AC9714_LINEIN_L11

I2S08580_LINEIN_L12

I2S08580_LINEIN_R12

AC9714_LINEIN_R11

I2S0_EXT_CLK

B_I2S0_CDCLK9

PCM0_EXT_CLK9

EXT_OSC1

I2S0_MCLK 12

I2S1_EXT_CLK

B_I2S1_CDCLK9 I2S1_MCLK 12

I2S0_EXT_CLK

I2S1_EXT_CLK

PCM1_EXT_CLK9

EXT_OSC1EXT_OSC2

GP1/CLK1 12

EXT_8753CODEC_PLLCLK 12

EXT_8580CODEC_PLLCLK 12EXT_8753CODEC_PLLCLK 12

EXT_8580CODEC_PLLCLK 12

EXT_OSC2

I2S08580_OUT1_L12

I2S08580_OUT1_R12

MICBIAS_VTG_DIVIDER

I2S1_PCM8753_MIC12

MICBIAS_VTG_DIVIDERI2S1_PCM8753_MICBIAS 12AC9714_MICBIAS 11

AC9714_MIC11

VDD_ext3.3V

VDD_ext3.3V

VDD_ext3.3V

AVDD_ext3.3V

R237 100K

R174

47K (NC)

CFG11

SW-SLIDE4

1234

8765

R185 0

PJ-327-2

gnd

L

RCON23

ST-JACKc 3 2 1

R173

680

PJ-327-2

gnd

L

RCON21

ST-JACKc 3 2 1

R229 0

CFG6

SW-SLIDE2

12

43

R186 0

+ CT1610uF/6.3V

CFG7

SW-SLIDE2

12

43

Y3

36.864MHz

1 2

34

OE GND

OUTVDD

C96220pF

C95220pF

Y6

16.9344MHz

1 2

34

OE GND

OUTVDD

R183 0

PJ-327-2

gnd

L

RCON25

ST-JACKc 3 2 1

R177

47K (NC)

R182 0

TP53

1

GL

RCON28

ST-JACK

1

5

2

43

R184 0

Y4

12MHz

1 2

34

OE GND

OUTVDD

PJ-327-2

gnd

L

RCON22

ST-JACKc 3 2 1

R171 2k

CFG8

SW-SLIDE4

1234

8765

CFG10

SW-SLIDE4

1234

8765

CFG12

SW-SLIDE4

1234

8765

R172

0

R306 0

R187 0

GL

RCON27

ST-JACK

1

5

2

43

PJ-327-2

gnd

L

RCON26

ST-JACKc 3 2 1

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

16 or 32 ohm hp

Adopted from 6400/2450 io b'd- modified library as datasheet- removed capacitors asreference

Vout =1.24V(1+R2/R1)

<--LINE!!

280K => 3.3V

Power

8.2K divided network :to prevent codec chip for full 2Vrms inputsignal,(7dB attenuation)

for test Audio port0 (AC97)(extraly can test PCM1)

CT19~24, 30~32 should be placed asclose as to the codec chip

Vout

R1

R2

AC97&Power 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

11 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

AC9714_LINEIN_R10

AC9714_MIC10

AC9714_OUT_L 10

AC9714_OUT_R 10

B_AC97_SDO9B_AC97_BITCLK9

B_AC97_SDI9B_AC97_SYNC9B_AC97_RSTn9

AC9714_LINEIN_L10

AC9714_MICBIAS 10

B_PCM9714_SCLK9

B_PCM9714_SOUT9B_PCM9714_SIN9

B_PCM9714_SYNC9

AVDD_ext3.3VVDD_ext3.3V VDD_ext1.8V

VDD_ext3.3V

VDD_ext3.3V

AVDD_ext5V

VDD_ext1.8VVDD_ext5V

VDD_ext5V VDD_ext3.3V AVDD_ext3.3V

+ CT1810uF/6.3V

C101 100nF

R307 0

R205 0 C103 1uF

U35

MIC5219BM5

1

2

3

5

4

IN

GND

EN

OUT

ADJ

R201 8.2K

R193 47

+ CT22

4.7uF/6.3VR188

100K

+ CT32

4.7uF/6.3V

R189 0

+ CT27

1uF/6.3V

C106 1uF

R197 0R195 0

+ CT1710uF/6.3V

Y2

24.576MHz

1 2

34

OE GND

OUTVDD

R204

47K

R208 NC

+ CT26

10uF/6.3V

+CT25

10uF/6.3V

R309 0

C99 1uF

R192 47

R20947K (NC)

L7

BLM18PG121

1 2

C104 100nF

C100220pF

C102 100nF

R207 NC

R206 100K

R310 0

R190100K (NC)

R203

47K

+ CT31

4.7uF/6.3V

R199 8.2K

C98 1uF

+ CT30

4.7uF/6.3V+

CT28100uF/6.3V

+

CT29100uF/6.3V

R2008.2K

+ CT21

4.7uF/6.3V

R198

100K 1%

+ CT20

4.7uF/6.3V

C105 100nF

C97220pF

+ CT23

4.7uF/6.3V

+ CT24

4.7uF/6.3V

R191 0

U34

WM9714LGEFL

19

74

2634

464748

12

68

1011

23

24

5

44

23

19

20

1617

21

29

30

22

433825

1840

49

35

33

36

37

1514

31

39

42

41

45

28

27

32

13

DBVDDDCVDD

DGND2DGND1

AGNDSPKGND

GPIO3/PCMFSGPIO4/PCMDACGPIO5/PCMADC

AUX4

BITCLKSDATAINSYNCRESETB

LINEL

LINER

SDATAOUT

GPIO1/PCMCLK

MCLKAMCLKB

PCBEEP

MONOIN

NCNC

MIC1

MIC2A

MIC2B

MICCM

HPVDDSPKVDD

AVDD

AGND3HPGND

GNDPADDLE

SPKL

OUT4

SPKR

OUT3

NCNC

MONO

HPL

AGND2

HPR

GPIO2/IRQ

MICBIAS

VREF

CAP2

AVDD2

R194 47

+CT19

4.7uF/6.3V

R202

8.2K

R308 0

C107220pF

R196 220K 1%

L8

BLM18PG121

1 2

L9

BLM18PG121

1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

2-Wire Mode

I2S1_LRCLKtempI2S1_SCLKtempI2S1_SDOtempI2S1_SDItemp

SW mode

IIC slave addr=0x36(R)/0x37(W)

2-Wire Mode

WM8580A

to test I2S0 5.1ch(extraly can test I2S1 2ch)

passive high pass filter

to test I2S1/PCM0,1(extraly can test I2S0 2ch)

C131~134, 140,141 should be placedas close as to the codec chip

C108~113, 128~130 should be placedas close as to the codec chip

IIC slave addr=0x34(R)/0x35(W)

I2S 5.1ch/I2S&PCM 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

12 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

I2S1_PCM8753_LINEIN_L10

I2S1_PCM8753_OUT_R10

I2S1_PCM8753_OUT_L10

I2S1_PCM8753_LINEIN_R10

I2S1_PCM8753_MIC10

B_PCM8753_SOUT9B_PCM8753_SYNC9B_PCM8753_SCLK9

B_PCM8753_SIN9

I2S08580_OUT1_L 10

I2S08580_LINEIN_L10

I2S08580_OUT2_L 10

I2S08580_OUT1_R 10

I2S08580_LINEIN_R10

I2S08580_OUT3_R 10

I2S08580_OUT2_R 10

I2S08580_OUT3_L 10

B_I2S0_SDO9B_I2S0_SCLK9

B_I2S0_SDI9

B_I2S0_LRCLK9I2S0_MCLK10

nXDREQ0_I2S0_SDO22,9,16nXDACK0_I2S0_SDO12,9,16

B_I2S1_SCLK9

B_I2S1_SDO9B_I2S1_LRCLK9

I2S1_MCLK10

B_I2S1_SDI9

IICSDA8,16IICSCL8,16

GP1/CLK1 10

I2S1_PCM8753_MICBIAS 10

I2S1_PCM8753_MIC10

IICSCL8,16IICSDA8,16

AVDD_ext3.3VVDD_ext3.3V

AVDD_ext5VVDD_ext3.3V VDD_ext5V

VDD_ext3.3V

R249 0

C121 1uF

R240 0

C127 1uF

C117

220pF

+

CT38

10uF/6.3V

R238 0

R248 10K

C141

100nF

TP301

TP291

C134

100nF

R228 0

R239 0

R230 0

R215 0

R246 10K

R227 0

+ CT35

10uF/6.3V

C126220pF

TP35

R258 NC

C111

100nF

R241 0

R255 10k

C140

100nF

R23347K (NC)

U36

WM8753LGEFL

910

11154445

23

481

5476

35

36

47

128

46

37

38

3334

39

40

4142

172528

292249

1819

21

20

24

23

27

26

141343

323031

16

DBVDDDCVDD

DGND2PGNDMODE/GPIO3CSB/GPIO5

VXCLKVXFSVXDINVXDOUT

BCLKLRCDACDATADCDAT

LINE1

LINE2

SCLK

PCMCLKMCLK

SDIN

RXP

RXN

ACINACOP

MIC1

MIC1N

MIC2MIC2N

HPVDDSPKRVDD

AVDD

AGNDHP/SPKRGNDGNDPADDLE

OUT4OUT3

LOUT1

ROUT1

LOUT2

ROUT2

MONO1

MONO2

GP1/CLK1GP2/CLK2

GPIO4

MICBIASVREFVMID

PVDD

C125 1uF

C131

100nF

R211 0

+C115 220uF

R232 0

+

C114 220uF

C120 1uF

R234

0

C110

100nF

R223 0

C135

15pF

R256 0

C112

100nF

R243 0

C109

100nF

R254 0

+ CT45

10uF/6.3V

R226

47K

+ CT36

10uF/6.3V

X2

12MHz

+

CT42

10uF/6.3V

TP271

R236

0

R242 0

R244 0

+

CT39

10uF/6.3V

R247 0

R251 0

+ CT33

10uF/6.3V

R235

0

R231 0

C130

4.7uF

C138 1uF

TP311

+ CT44

10uF/6.3V

R253 0

C124 1uF

+ CT37

10uF/6.3V

+

CT43

10uF/6.3V

U37

WM8580A

162

171

34

14

242223192021

28262725

32333431

131211

5

9876

18

36

35

4045

3946

10

15

30

29

41

42

43

44

47

48

3738

DVDDPVDD

DGNDPGND

XTIXTO

SPDIFIN1

MCLKPAIFRX_LRCLKPAIFRX_BCLKDIN1DIN2DIN3

MFP2PAIFTX_LRCLKMFP1DOUT

SDINSCLKCSBSDO

MFP3MFP4MFP5MFP10

MFP6MFP7MFP8MFP9

MUTE

AINL

AINR

AVDDVREFP

AGNDVREFN

SPDIFOP

CLKOUT

SWMODE

HWMODE

VOUT1L

VOUT1R

VOUT2L

VOUT2R

VOUT3L

VOUT3R

ADCREFPVMIDR260 0

C132

100nF

C113

100nF

C137

470pF

R259 0

C139 1uF

C118 1uF

C116

220pF

R257 0

TP33

R252 0

+

CT40

10uF/6.3V

C123 1uF

TP28 1

C128

4.7uFTP321

C119 1uF

C133

100nF

R214 0

R212 0

TP34

R225

47K

R250 0

+

CT41

10uF/6.3V

C136

15pF

C129

4.7uF

R213N.C

+ CT34

10uF/6.3V

C122 1uF

R245 0

R219 0

TP36

C108

100nF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

<Silk>

<Silk>

UART0 Only

UART1/2/3

(RTS2)(CTS2)

IrDA(U2)

UART2

Func(CFG9)

UART1

ON

ON

OFF

PIN1

X

COM2 portCFG3 Control

UART3

PIN2

ON

OFF

ON

PIN3

X

OFF

ON

S - L : B1 port, H : B2 portOE - L : Output enable H : all disconnect

X X

COM1 port

COM2 port

SIR mode only

<Silk>

added for loopback/b'd to b'dtest

can be connect toaudio external clock(tp53)

UART/IrDA/SPI 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

13 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

CTS016

RTS016TXD02,16

RXD02,16

DTR0

DSR0

UEXTCLKCLKOUT016

UEXTCLK UARTCLK 16

CON2_TXDCON2_RXD

CON2_CTSCON2_RTS

TXD1 16

RTS1 16CTS1 16

RXD1 16

CON2_RXDCON2_TXD

CON2_CTSCON2_RTS

RXD216TXD216

LCDVF25LCDVF15 DTR0

DSR0

RTS016CTS016

TXD1 16RXD02,16

RTS1 16CTS1 16

TXD216RXD3 16

RXD1 16

RXD216

TXD02,16

TXD3 16

RXD3 16TXD3 16

VDD3.3V

VDD3.3VVDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

VDD3.3V

R271

100K

R273 0(NC)

R318 0

R266 0

C152 100nF

R316 0

U41

SN74CBTLV3257

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

+ CT53

0.1uF/16V

C147

330pF

R267

100K

J12

BOXCONN_DB9

594837261

R270

100K

U38

MAX3243CAI

28

241

2

27

3

1413

22 21

1918171615

25

54

23

20

26

678

9101112

C1+

C1-C2+

C2-

V+

V-

T1INT2IN

nFORCEOFF nINVALID

R1OUTR2OUTR3OUTR4OUTR5OUT

GND

R2INR1IN

FORCEON

R2OUTB

VCC

R3INR4INR5IN

T1OUTT2OUTT3OUTT3IN

CON29

CON12B (N.C)

123456

789101112

+ CT51

0.1uF/16V

U42

HSDL-3602

1

2

3

45

6

7

8

9

10

VC

C

AGN

D

FIR_SEL

MD0MD1

NC

GN

D

RXD

TXD

LED

A

R264

100K

C149

330pF

R315 0

C143

100nF

Y5

SMD (NC)

3

2

4

1

OUT

GND

VDD

OE

C151

330pF

+ CT49

0.1uF/16V

C145

330pF

R262 10K

C155 100nF

C148

330pF

C150

330pF

U39

MAX3232CSE

1

3

4

5

141378

16

2

6

15

111210

9

C1+

C1-

C2+

C2-

T1OUTR1IN

T2OUTR2IN

VCC

V+

V-

GND

T1INR1OUTT2INR2OUT

R263

2.7

CFG9

SW-SLIDE4

1234

8765

R321 0

U43

SN74CBTLV3257

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

R265 0

R272

100K

C144

330pF

R261 10K

+

CT46

0.1uF/16V

TP54

1

+ CT47

0.1uF/16V

R274 0

U40

SN74CBTLV3257

251114

361013

15 81

479

12

16 1B12B13B14B1

1B22B23B24B2

nOE GNDS

1A2A3A4A

VCC

R322 0

R319 0

+ CT54

6.8uF

+CT520.1uF/16V

R269

100K

C142

100nF

J11

BOXCONN_DB9

594837261

C146

330pF

R268

100K

C153 100nF

R320 0

R317 0

C154

100nF

+ CT50

0.1uF/16V

+

CT48

0.1uF/16V

J10 JUMPER1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

External I/O

External I/O 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

14 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

EINT15_OP3_GPO7 16

EINT13_OP3_GPO5 16

EINT9_OP3_GPO1 16EINT8_OP3_GPO0 16

EINT14_OP3_GPO6 16

EINT10_OP3_GPO2 16

EINT11_OP3_GPO3 16B_PWR_5VVDD3.3V

TP38 TP

CON30

QSE-060-01-L-D-A

13579

111315171921232527293133353739

4143454749515355575961636567697173757779

81838587899193959799

101103105107109111113115117119

246810121416182022242628303234363840

4244464850525456586062646668707274767880

828486889092949698100102104106108110112114116118120

121 122123 124

125 126127 128

129 130131 132

TP45 RTCCLK

TP37 TP

TP43 UART_RXDTP44 UART TXD

CT56

100uF/16V

TP42 TPTP41 TP

TP39 TP

CT55

100uF/16V

TP40 TP

C157

1uF

C156

1uF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SilkEINT11

SilkEINT0

SDR1005

for audio codec power, pulling current near from the power source

Base board Power & LED 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

15 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

EINT0 16

nLED116

nLED45,16nLED816

nLED25,16

EINT3 16

B_PWR_5V

VDD3.3V

B_PWR_5V

VDD3.3V

VDD3.3V

VDD3.3V

B_PWR_5V

VDD_ext3.3VVDD3.3VB_PWR_5V

VDD_ext5V

D11

SMD TYPE (BLUE)

1 2

U46A

FDS6982

4

365

L10 1.5uH1 2

C164 10nF

SW12

1

3

R298

RESISTOR VAR (NC)

SW3LS8JEM-T

13 4

2

R297 0

+ CT584.7uF/16V

J13

POWER JACK

1

23

P

GG

R291

10K

R284

10K

R278

10K

+ CT60220uF/6.3V

D15

CMPSH-3

U46BFDS6982

2

17 8

C161

220nF

SW2LS8JEM-T

13 4

2

R295 20K

R288 0

R301 1

+ CT61220uF/6.3V

+ CT6210uF/6.3V

Q5 MMBT3904

R296 0 (NC)

C159

100nF

U44

SI4423DY

123

4

8765

F1

POLY SWITCH/1.5A

C163

100pF

R292 1K

Q4 MMBT3904

R276 330

U45

MAX6458

5

4

1

2

3

VCC

IN-

OUT

GND

IN+

J14

JUMPER

1 2

R302

12.7K(1%)

D12

SMD TYPE (BLUE)

1 2

R287 330

R281

10K

R277

47K

R282

10K

Q3 MMBT3904

R289 0

R293 39K

Q2 MMBT3904R275 330

C162

100pF

R300

100K

C166

100nF

R294 100K

R299

57.6K(1%)

U47

LTC3778

1

2

3

4

5

6

8

9

10 11

12

13

14

15

16

17

18

7

19

20RUN/SS

VON

PGOOD

VRNG

ITH

FCB

ION

VFB

EXTVCC VIN

INTVCC

DRVCC

BG

PGND

SENSE-

SENSE+

SW

SGND

TG

BOOST

C165

100nF

R286

10K

R283

10KR285

12.7K

+ CT634.7uF

D10

SMD TYPE (BLUE)

1 2

D14

SMD TYPE (RED)

1 2

D13

SMD TYPE (BLUE)

1 2

C158 100nF

R290

100K

R279 330

+ CT5722uF/16V

R303

400K

+ CT594.7uF/16V

C160 100nF

R280 330

Page 29: read.pudn.comread.pudn.com/downloads156/doc/project/695518/smdk2450_rev0_… · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 2. Table of Contents Description SMDK2450 Evaluation Board for

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place TPs to eachcorner

For CS8900access

Board to Board connector 0.0

SMDK2450 (S3C2450 Evaluation Board)

A3

16 16Friday, January 25, 2008

SAMSUNG ELECTRONICS CO.,LTDTitle

Size Document Number Rev

Date: Sheet of

B_DATA0

B_ADDR17

B_ADDR11B_ADDR12

B_ADDR25

B_ADDR5

B_DATA5

B_DATA9

B_DATA1

B_DATA3

B_ADDR6

B_DATA7

B_DATA8

B_ADDR24

B_ADDR7

B_ADDR2

B_ADDR8

B_DATA6

B_DATA10

B_DATA14

B_ADDR18

B_ADDR13

B_DATA11

B_ADDR16

B_ADDR1

B_DATA12

B_DATA4

B_DATA2

B_ADDR0

B_ADDR20B_ADDR21

B_ADDR4

B_ADDR22

B_ADDR10

B_DATA13

B_ADDR3

B_ADDR23

B_DATA15

B_ADDR14

B_ADDR19

B_ADDR15

B_ADDR9

B_ADDR23

CAMDATA2

VD4

VD10

VD7

VD18

CAMDATA0

VD17

VD0

VD8

VD15

VD21

CAMDATA1

VD3

VD19

VD2

VD11VD12

VD22

CAMDATA4

VD16

VD23

VD1

VD13

CAMDATA6CAMDATA5

CAMDATA3

VD5

VD14

VD6

VD9

VD20

CAMDATA7

CLKOUT1

IRQ_LAN3,4

nREG_CF 2EINT22

nSS15

nRSTOUT2,3,4

B_nFWE 1

B_nCS21

B_nRWE 1,2,3,4

B_nFRE 1

CLKOUT013

nWAIT 2,3

nRESET1

nIRQ_CF 2

B_nFCE 1

B_nCS31

B_nROE 1,2,3,4

PWREN_CF 2

B_nWE_CF 2

CLKOUT1

B_FALE 1

nINPACK_CF 2

B_FCLE 1

B_nCS41

B_nOE_CF 2

B_SROM_nCS01

B_nRBE1 1,2,3B_nRBE0 1,2

SPIMOSI15

SPIMISO15

B_nCS51

B_SROM_nCS11

RESET_CF 2TOUT22

RnB 1

B_DATA[15:0] 1,2,3,4B_ADDR[25:0]1,2,3,4

TOUT15

B_ADDR23 2,3

nRESET1

nXDREQ1_IICSCL1 2,8

nLED8 15

CAMPCLKOUT8

nLED2 5,15

RTS1 13

UARTCLK 13

TXD1 13

RGB_VDEN 5

CAMVSYNC8

AIN45

RXD0 2,13

RXD2 13EINT315

CTS1 13CAMDATA[7:0]8

RGB_VSYNC 5

CAMHREF8

RGB_VCLK 5

VD[23:0] 5

CTS0 13

IICSCL8,12

BACKLIGHT_PWM5

AIN55

AIN25

RGB_HSYNC 5

TXD2 13

IICSDA8,12

TSYM5,6,7

TSXP5,6,7

AIN15

EINT015

AIN05

AIN35

TSXM5,6,7

RTS0 13

RXD1 13

TSYP5,6,7

TOUT15

TXD0 2,13

RXD3 13

CAMRESET8

nLED4 5,15

CAMPCLK8TXD3 13

nDIS_OFF5

nLED1 15

SPICLK02

SPIMISO02

nSS02

SPIMOSI02

SPICLK15

nXDREQ0_I2S0_SDO22,9,12

nXDACK1_IICSDA1 2,8

nXBREQ 2nXBACK 2

LCD_PWREN5

I2S1_LRCK_PCM1_FSYNC9

I2S1_CDCLK_PCM1_CDCLK9

I2S1_SDO_PCM1_SDO9

I2S1_SCLK_PCM1_SCLK9

I2S1_SDI_PCM1_SDI9

I2S0_SDO_PCM0_SDO_AC_SDO9

I2S0_CDCLK_PCM0_CDCLK_AC_BIT_CLK9I2S0_SCLK_PCM0_SCLK_AC_SYNC9

I2S0_SDI_PCM0_SDI_AC_SDI9

I2S0_LRCK_PCM0_FSYNC_AC_nRESET9

nXDACK0_I2S0_SDO12,9,12

EINT14_OP3_GPO6 14

EINT11_OP3_GPO3 14EINT10_OP3_GPO2 14

EINT8_OP3_GPO0 14

EINT15_OP3_GPO7 14

EINT9_OP3_GPO1 14

EINT13_OP3_GPO5 14

CD_CF_CAM_FIELD_A2,8

B_PWR_5VB_PWR_5V

B_PWR_5V B_PWR_5V B_PWR_5V B_PWR_5V

TP50nRESET

1 +C168

10uF/16V

12

+C167

10uF/16V

12

CON32

BSE-060-01

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120

12345678910

1112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100

101102103104105106107108109110111112113114115116117118119120

TP46TP PROBE

TP52TOUT1

1

TP47TP PROBE

+

C170

10uF/16V

12

TP48TP PROBE

TP49TP PROBE

+C169

10uF/16V

12

CON31

BSE-060-01

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120

12345678910

1112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100

101102103104105106107108109110111112113114115116117118119120

TP51CLKOUT1

1