rad.pdf

Project Report E&CE 709

Radiation Effects on Electronic Devices

Author :

Nitin Mohan

Graduate Student (Student ID 00800428)

Deptt. of Electrical and Computer Engg.

University of Waterloo,

Waterloo, ON, CANADA - N2L3G1

[email protected]

Project Report ECE 709 - - Nitin Mohan 2

Table of Contents

Page

1. Introduction to Radiation Effects 4

1.1 Radiations of interest 4

1.2 Two fundamental effects of radiation 4

2. Damages in space applications 5

2.1 Total Dose Effects 6

2.2 Dose Rate Effects 9

3. Approaches towards radiation hardened Integrated Circuits 10

3.1 Use of Fluorinated Oxides 11

3.2 Use of ion implanted Silicon-dioxide films 12

3.3 Component Selection 13

3.4 Circuit Design 13

3.5 GaAs Devices 14

3.6 Shielding 14

4. To probe further 15


List of Figures

Figures Contents Page

1. Hole Trapping Phenomenon in MOS electronics 7

2. Radiation effect on ID-VG Characteristics of MOS

Devices 8

3. Radiation Effect on a MOSFET�s ID-VG

Characteristics 12

4. Current gain change of lateral pnp transistors with

and without arsenic implanted SiO2 film on the

emitter-base junction 13


1. Introduction to Radiation Effects: The subject of radiation

effects to semiconductor devices is complex because of the numerous

possible combinations of different types of radiation, radiation damage,

and semiconductor devices affected by radiation. 1.1 Radiations of interest: Radiation effects to semiconductor devices

are produced by four types of radiations which affect the

performance of electronic devices:

(a.) protons

(b.) electrons

(c.) neutrons

(d.) gamma rays

Gamma rays are electromagnetic radiation with energies usually

higher than typical X-rays. They are generally the side effects of

nuclear reactions.

The problem of predicting many different radiation effects

is greatly simplified by characterizing the radiation by its effect

rather than by the radiation type, intensity, and energy distribution.

The two parameters that characterize the radiation have units of

neutrons per square centimeter(n/cm2) and rad (silicon). Neutron

parameter can be considered as an exposure to a collimated beam of

a specified number of neutrons per square centimeter with an

energy of 1MeV, which corresponds to a neutron with a velocity of

about 1.4 X 107 cm/s. A rad (silicon) is defined as the amount of

radiation that deposits 100 ergs/g (or 0.01 J/kg) of silicon.

1.2 Two fundamental effects of radiation:

(a.) Displacements

(b.) Ionization � Two subtypes

(i.) Transient damage effects (in bulk)

(ii .) Surface damage effects (in insulator)

Displacement refers to the physical damage to a crystal

lattice produced by knocking an atom from its normal lattice position to


another location in the lattice. This type of damage is sometimes called

bulk radiation damage . This damage can be modified after irradiation by

temperature excursions or by certain electrical operating conditions.

Ionization is the knocking of orbital electrons from an atom

to form ionized atoms and free electrons.

The term transient effects as used here is restricted to the

transient changes in the electrical properties of a device due to ionization

in the bulk semiconductor material. Surface effects are the semi

permanent changes in the electrical properties of semiconductor devices

caused by ionization near the surface or, for passivated devices, in or near

the passivating layer. The typical transient effect is an electrical current

that decays after a radiation pulse. Surface effects are changes in the

electrical behavior of a device due to charge collection and migration in

the silicon dioxide layer on the surface of a transistor or diode, which can

persist for years after the radiation exposure. Because ionization is an

intermediate process for both transient and surface effects of radiation

and since the amount of ionization is proportional to the energy deposited

for typical energies of nuclear radiation, the effects per rad are the same,

no matter what radiation caused the ionization. It should be noted here

that each type of radiation can cause all the three types of damage

effects1.

2. Damages in space applications: Radiation in space is highly

variable. Because the electrons and protons are trapped in belts, small

changes in the altitude or angle of inclination can lead to drastic

changes-up to two orders of magnitude-in the total dose deposition

inside a satellite during its mission. The orbit�s angle of inclination

affects the accumulated total dose by over a factor of four. The types

of particles found in the radiation belts also change with altitude3.

Both electrons and protons with sufficient energy to penetrate the skin

of a satellite are trapped in the �inner zone� (200-10,000 km above the

earth), but only electrons are trapped in the �outer zone� (greater than


10,000 km). Trapped electrons have energies of up to about 7 MeV.

They are much less energetic than trapped protons, which have

energies up to 500 MeV, and consequently are easier to shield against. So, in the outer zone, the amount of shielding between the external

surface of the satellite and the electronics inside has a large effect on the

total dose. Over a 10-year mission in an outer-zone orbit, the total dose

can range from much more than 1 Mrad (Si) for 1 g/cm2 of shielding

(about 3.7 mm of aluminum) to less than 10 krad (Si) if shielding is

increased to 3 g/cm2. To estimate the total dose a satellite system will

accumulate during its mission, three parameters are required:

• the altitude of the orbit,

• the inclination of the orbit,

• the total amount of shielding between the sensitive electronics and the

outer surface of the satellite. Most ionization effects in microelectronics can be related to

either the total amount of radiation that is absorbed (total dose) or the

rate at which radiation is absorbed (dose rate)4.

2.1 Total Dose Effects: Of most concern in the total dose effects is the

creation of hole-electron pairs in silicon-dioxide, an insulator used

to: 1) isolate neighboring transistors, 2) provide gate isolation in

silicon MOSFET technology, and 3) provide surface passivation in

silicon bipolar technology. In any silicon technology in which

silicon-dioxide is in contact with low acceptor doping levels (p-

type) silicon, concern for total dose effects is warranted. The

dominant effects are due to holes being trapped at the interface of

the Si-SiO2 causing free electrons to be attracted to the interface

and effectively resulting in an inversion of the doping in the silicon

near the interface. Thus p-doped silicon can become n-type in the

region adjacent to the interface. If this low doped p-region isolates

two n-doped regions, then isolation is compromised and leakage

currents may flow between the two n-regions. This mechanism is


responsible for: 1) radiation induced loss of field oxide isolation in

all classes of MOSFET technology, n-channel enhanced mode

transistors becoming depletion mode transistors due to gate oxide

hole trapping in CMOS and NMOS integrated circuits, 2) and loss

of isolation between neighboring transistors in side-wall oxide

isolated bipolar integrated circuit technologies.

Fig.1 Hole Trapping Phenomenon in MOS electronics


Fig.2 Radiat ion effect on ID-VG Characterist ics of MOS Devices

In addition to hole trapping phenomena, interface states,

which may be charged positively or negatively depending upon bias

condition, are also generated within the Si-SiO2 interface5. Two effects

are associated with interface states:


• In n-channel MOS transistors under positive bias conditions,

electrons are trapped in these states. This increases its threshold

voltage.

• Electrons transporting through n-channels or holes transporting

through p-channels undergo Coulomb scattering from the charged

interface states. This results in reduction in carrier channel mobility

and hence increased channel �on� resistance. Because of this RC

charging and discharging time-constants are increased and circuit

speed is significantly reduced.

NMOS and CMOS integrated circuits experience an increase

in static power supply current if their n-channel transistor�s response

are dominated by hole trapping.

2.2 Dose Rate Effects: There exists a major class of effects that are

related to the rate at which radiation is absorbed in circuits4. These

effects include upset, latch-up and snap back in integrated circuits and

burn-out in bipolar and n-channel power transistors. All these effects

are a consequence of radiation generated photocurrents in p-n

junctions. Electron-hole pairs generated in the depletion region of a p-

n junction by ionizing radiation are swept out by the high electric field

present in this region. This promptly collected charge is termed the

prompt photocurrent. Carriers generated within a diffusion length of

the depletion region will diffuse to the depletion region where they are

collected. These photocurrents sum in digital integrated circuits to

produce transient currents that can cause changes in logic levels at

digital gates due to charging and discharging of gate capacitances or

transistors being turned on or off. If the dose rate is high enough, the

product of photocurrent and resistance causes a drop in power supply

voltage across the metal resistance and the power supply voltage

actually present at the memory cell can drop below that value required

to hold the data storage in the memory cell and an error is introduced

in the memory cell. This phenomena is called rail-span collapse4.


Another important effect of high dose rates in integrated

circuits is termed �latch-up�. This effect is observed4 when p-n-p-n

four layer regions are connected to form parasitic thyristors or SCR.

Photocurrents cause these devices to be switched to a high conducting

state which will remain even after the radiation pulse has passed. If

this low impedance path is across the power supply, a large power

supply current will be drawn by the circuit. This high current condition

will remain unless the power supply voltage is dropped below the

holding voltage of the parasitic SCR.

One method for inhibiting such parasitic SCR action is gold

doping of the base and the collector of the parasitic npn transistor1.

Gold doping decreases the minority carrier lifetime of the elements of

the parasitic transistor path only, in a usual way by providing

additional impurity states in the forbidden band. As the parasitic

transistor gain is proportional to the minority carrier life time, the thus

degraded parasitic transistor gain lessons the probability of it turning

on to cause the system to latch up.

3. Approaches towards radiation hardened Integrated

Circuits3: Unhardened commercial electronics can frequently survive

3-10 krad(Si) of total dose without much parametric degradation. They

can also remain functional (although degraded) from 10-30 krad(Si)

but they may suffer a high single-event upset rate or possible latch-up

when struck by heavy ions3. The fabrication recipes used to harden ICs against total ionizing

dose are closely guarded secrets, protected either by government or

company classifications. What can be examined, though, are some

particulars about the principal factors affecting the total dose

tolerance.

The first step in hardening a CMOS IC against total dose

radiation is to minimize voltage shifts or their impact in the circuit due

to radiation-induced charge trapping in the gate and field oxides. Two


approaches can be used, either individually or in parallel: reducing the

number of holes trapped in dielectric, and compensating for the

trapped holes with trapped electrons.

The easiest way to minimize the trapped-hole density is to thin

down the oxide. A clean gate oxide less than 12.5 nm thick, which is

typical of today�s commercial integrated circuits, can usually survive

up to 100 krad(Si) with no process changes. On the other hand, where

local oxidation of silicon is used, field oxides must remain thick to

meet isolation and planarity requirements. Minimizing the trapped-hole

density in them is much trickier and requires special processing. But it

is also possible to eliminate the field oxide entirely through a fully

depleted technology such as silicon-on-insulator.

As research over the past 20 years has shown, almost all IC

process steps can either raise or lower the density of hole traps, the

areas that will fill with holes when irradiated. This is why dedicated

fabrication facilities are needed to produce ICs hardened to 1Mrad(Si)

or more. When rad-hard products are run on commercial lines using

modified steps, it may be possible to reduce the hole traps-but in the

absence of a dedicated rad-hard process, the hardness will rarely go

much beyond 100 krad(Si).

Adding electron traps to offset the hole traps is another method

of countering radiation effects on field or isolation oxide structures.

Electron-trapping material (the details are proprietary) can be

distributed throughout the field oxide or applied over its top. This

approach can be used in combination with conventional processes with

few changes to the underlying semiconductor processing. Hardness

level in excess of 100 krad(Si) can be achieved.

Other specific approaches for radiation hardened ICs follows:

3.1 Use of Fluorinated Oxides7: By incorporating minute amounts of

fluorine or chlorine in thermal SiO2 , the reliability of MOS devices

can be significantly improved. Fluorine can be introduced by


admitting NF3 at the initial stage of oxidation or by hydrofluoric acid

surface treatment of the Si wafer prior to oxidation.

Fig.3 Radiat ion Effect on a MOSFET�s ID-VG Characterist ics The bond strain distribution near the SiO2/Si interface may be

altered by the presence of F or Cl. A possible mechanism8 leading to

the reduced strain is the interaction of a F (or Cl) atom with a strained

Si-O bond, forming a Si-F bond and a non-bridging oxygen bond,

resulting in a local strain relaxation. The non-bridging oxygen

centers, however, could migrate toward the SiO2/Si interface to form

interface traps upon ionizing radiation or hot-electron injection.

Therefore, when excessive amounts of F are incorporated, too many

non-bridging oxygen centers are produced, which negate the

beneficial effect of strain relaxation. Thus, an optimum F

concentration exists, which is found to an implant dose in the range

5x101 4-2x101 5 cm-2 .

3.2 Use of ion implanted Silicon-dioxide films9: It is observed that

radiation-induced interface-state buildup is suppressed using ion

implanted SiO2. By using a large arsenic ion dose, the interface-state

buildup can be suppressed by one order of magnitude. It is found that

interface-state buildup depends on the ion dose, the gate bias during

irradiation and the annealing atmosphere. By applying this technique


to a conventional bipolar process, current gain reduction in lateral pnp

transistors was suppressed to within 10% after 106 rad(SiO2)

irradiation.

Fig.4 Current gain change of lateral pnp transistors with and

without arsenic implanted SiO2 f i lm on the emitter-base junct ion.

Also radiation induced trapped positive charges can be

compensated by implanting aluminum and other metals. Since

aluminum in SiO2 film acts as an electron trap, it compensates for the

positive trapped charges.

3.3 Component Selection2:

(a.) Schottky diodes and transistors

(b.) PIN, IMPATT, TRAPATT, Gunn etc

(c.) Preference of bipolar devices over MOS devices

3.4 Circuit Design2: Electronic circuitry can be made harder to

ionizing radiation by the employment of low-circuit impedances

wherever practical. Low impedances mitigate the effect of impressed

elevated voltages to circuit inputs, for example, those voltages induced

by photocurrents that can be assumed to act as constant current

generators. The use of clamping methods is another way to prevent


large transients from occurring in one stage whose effects can be

passed on to succeeding stages.

Digital circuit ON states should correspond to a fully

saturated transistor wherever possible. Because dose-rate pulse

induced radiation can saturate transistors, it does not make any

difference when they are already in their saturated ON state. The more

�normal� the current flowing in a circuit, the less radiation-induced

spurious currents can affect such systems.

3.5 GaAs Devices1 0: Most GaAs devices do not have insulating layers

to trap charge. This accounts for their relative insensitivity to total

dose effects. The primary damage mechanism here is the creation of

crystal lattice defects, or �displacement damage�. This degradation

is proportional to the �non-ionizing energy loss� (NIEL), rather

than the total energy deposition. However electrons with energies

below a certain threshold, are unable to cause any displacement

damage no matter how large the total dose.

3.6 Shielding1 1: Using radiation shields, typically of a tungsten/copper

alloy, is another choice. They can either be built into the package

structure or be attached to the top and bottom. While they are

effective in reducing the electron component of the total dose

radiation, they are much less effective in lessening the proton

radiation.

It is observed that for an electron dominated environment,

like a geo-synchronous orbit (36,000 km), a heavy (high Z)

material is the best absorber. Structure of the shield also influences

the shielding efficiency. A proper configuration of high and low Z

materials in the structure can improve significantly the shielding

efficiency given by a monolayer no matter which material compose

this monolayer.


4. To probe further: 1. � Radiat ion Ef fects in Semiconductor Devices � Frank Larin, John

Wiley & Sons, Inc. 1968

2. � The ef fects of Radiat ion on electronic systems� Messenger G C and

Ash M S, Van Nostrand Reinhold Company Inc. 1986

3. IEEE Spectrum, March 1998, pp 36-41

4. �Radiat ion-hardened microelectronics for accelerators� James E.

Gover , IEEE Trans. on Nuclear Science, Vol. 35, No. 1, Feb 1988

5. �Basic Radiat ion Ef fects in Nuclear Power Electronics Technology�

Gover J E, Sandia National Labs Report, SAND85-0766, Apri l 1986

6. P. S. W inokur and H. E. Boesch, IEEE Trans Nuclear Science, NS-27:

1647 (1980).

7. �Radiat ion response of MOS Capacitors Containing Fluorinated Oxide�

Silva E.F. et. al. , IEEE Trans. on Nuclear Science, NS-34, p. 1190,

1987

8. �Radiat ion Hardened Micron and Submicron MOSFETs Containing

Fluorinated Oxides� Nishioka Yasushiro et. al. , IEEE Trans. on

Nuclear Science, Vol. 36, No. 6, p. 2116, Feb 1989

9. �Radiat ion Ef fects on Ion-Implanted Sil icon-Dioxide Films� Kato et. al.

IEEE Trans. on Nuclear Science, Vol. 36, No. 6, p. 2199, Dec 1989

10. �Response of GaAs displacement damage monitors to protons,

electrons, and gamma radiat ion� Barry A. L. et. al. IEEE Trans. on

Nuclear Science, Vol. 36, No. 6, p. 2400, Dec 1989

11. �Ef fects of Material and/or Structure on Shielding of Electronic

Devices� Mangeret R. et. al. . IEEE Trans. on Nuclear Science, Vol.

43, No. 6, p. 2665, Dec 1996

12. Annual Meetings of the IEEE Nuclear and Space Radiat ion Ef fects

Conference (NSREC) deal with research on radiat ion ef fects on

devices and ICs. NSREC home page is:

http:/ /www.ieee.org/nps/nsrec/nsrec.html

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