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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1,JANUARY 2000 1 A Multicarrier QAM Modulator Jouko Vankka, Student Member, IEEE, Marko Kosunen, Ignacio Sanchis, and Kari A. I. Halonen Abstract—A multicarrier quadrature amplitude modulation (QAM) modulator has been developed and implemented with programmable logic devices. The multicarrier QAM modulator contains four CORDIC-based QAM modulators. A conventional QAM modulator needs two multipliers, one adder, and sine/cosine ROM’s. The designed CORDIC-based QAM modulator has about the same logic complexity as the two multipliers and the adder with the same word sizes. Each QAM modulator accepts 13-bit in-phase and quadrature data streams, interpolates them by 16, and upconverts the baseband signal to a selected center fre- quency. The frequencies of the four carriers can be independently adjusted. The proposed multicarrier QAM modulator does not use an analog modulator, and therefore, the difficulties of adjusting the dc offset, phasing, and the amplitude levels between the in-phase and quadrature-phase signal paths are avoided. The multicarrier QAM modulator is designed to fulfill the spectrum and error vector magnitude (EVM) specifications of the wideband code-division multiple-access (WCDMA) system. The simulated EVM is 1.06% root mean square (rms), well below the specified 12.5% rms for WCDMA. The measured ratio of the integrated first/second /third adjacent channel power (4.096–MHz band- width) to the integrated channel power (4.096-MHz bandwidth) is -68.16/-68.24/-66.17 dB versus the specified -45/-55/-55 dB. Index Terms—CORDIC algorithm, multicarrier, programmable logic devices, quadrature amplitude modulation, wideband code- division multiple access.. I. INTRODUCTION O VER THE PAST several years, code-division multiple- access (CDMA) systems have gained a widespread in- terest in mobile wireless communications. Wideband code-divi- sion multiple-access (WCDMA) [1] uses a wider channel com- pared to a narrowband CDMA channel [2], which improves fre- quency diversity effects and therefore reduces the fading prob- lems. Due to its resistance to multipath fading and other advan- tages, such as increased capacity, the WCDMA was selected by the European Telecommunications Standards Institute (ETSI) for wideband wireless access to support third-generation ser- vices. This technology is optimized to make possible very high- speed multimedia services such as full-motion video, Internet access, and videoconferencing. In this WCDMA system, four quadrature amplitude modu- lation (QAM)-modulated carrier frequencies are generated in a base station. In conventional solutions, the four carriers are combined after the power amplifiers (PA’s), as shown in Fig. 1. This paper describes an architecture, where a multicarrier QAM-modulated IF signal is upconverted by two mixers and Manuscript received February 16, 1999; revised April 25, 1999. This work was supported by the Technology Development Center, Finland, in collabora- tion with Nokia Telecommunications. This paper was recommended by Asso- ciate Editor J. Silva-Martinez. The authors are with the Electronic Circuit Design Laboratory, Helsinki Uni- versity of Technology, FIN-02015 HUT, Finland. Publisher Item Identifier S 1057-7130(00)00593-0. Fig. 1. Conventional multicarrier transmitter in the base station. Fig. 2. The multicarrier QAM modulator and upconversion chain. bandpass filters (BPF’s) to a radio frequency (RF), as shown in Fig. 2. This saves a huge amount of analog components, many of which require production tuning. Consequently, an expensive and tedious part of the manufacturing will be elimi- nated. A single linear multicarrier PA replaces the conventional high-level combination of individual amplifiers using selective cavities. The power losses in a hybrid combiner are avoided. The proposed multicarrier QAM modulator does not use an analog modulator, therefore, the difficulties of adjusting the dc offset, the phasing and the amplitude levels between the in-phase and quadrature phase signal paths are avoided. The analog modulator causes considerable part of the error vector magnitude (EVM) in a practical design [3]. The drawback of the proposed system is high linearity requirements for the wideband upconversion mixers and the linearized PA, because 1057–7130/00$10.00 © 2000 IEEE

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1, JANUARY 2000 1

A Multicarrier QAM ModulatorJouko Vankka, Student Member, IEEE, Marko Kosunen, Ignacio Sanchis, and Kari A. I. Halonen

Abstract—A multicarrier quadrature amplitude modulation(QAM) modulator has been developed and implemented withprogrammable logic devices. The multicarrier QAM modulatorcontains four CORDIC-based QAM modulators. A conventionalQAM modulator needs two multipliers, one adder, and sine/cosineROM’s. The designed CORDIC-based QAM modulator has aboutthe same logic complexity as the two multipliers and the adderwith the same word sizes. Each QAM modulator accepts 13-bitin-phase and quadrature data streams, interpolates them by16, and upconverts the baseband signal to a selected center fre-quency. The frequencies of the four carriers can be independentlyadjusted. The proposed multicarrier QAM modulator does notuse an analog modulator, and therefore, the difficulties ofadjusting the dc offset, phasing, and the amplitude levels betweenthe in-phase and quadrature-phase signal paths are avoided. Themulticarrier QAM modulator is designed to fulfill the spectrumand error vector magnitude (EVM) specifications of the widebandcode-division multiple-access (WCDMA) system. The simulatedEVM is 1.06% root mean square (rms), well below the specified12.5% rms for WCDMA. The measured ratio of the integratedfirst/second /third adjacent channel power (4.096–MHz band-width) to the integrated channel power (4.096-MHz bandwidth) is−68.16/−68.24/−66.17 dB versus the specified−45/−55/−55 dB.

Index Terms—CORDIC algorithm, multicarrier, programmablelogic devices, quadrature amplitude modulation, wideband code-division multiple access..

I. INTRODUCTION

OVER THE PAST several years, code-division multiple-access (CDMA) systems have gained a widespread in-

terest in mobile wireless communications. Wideband code-divi-sion multiple-access (WCDMA) [1] uses a wider channel com-pared to a narrowband CDMA channel [2], which improves fre-quency diversity effects and therefore reduces the fading prob-lems. Due to its resistance to multipath fading and other advan-tages, such as increased capacity, the WCDMA was selected bythe European Telecommunications Standards Institute (ETSI)for wideband wireless access to support third-generation ser-vices. This technology is optimized to make possible very high-speed multimedia services such as full-motion video, Internetaccess, and videoconferencing.

In this WCDMA system, four quadrature amplitude modu-lation (QAM)-modulated carrier frequencies are generated ina base station. In conventional solutions, the four carriers arecombined after the power amplifiers (PA’s), as shown in Fig. 1.This paper describes an architecture, where a multicarrierQAM-modulated IF signal is upconverted by two mixers and

Manuscript received February 16, 1999; revised April 25, 1999. This workwas supported by the Technology Development Center, Finland, in collabora-tion with Nokia Telecommunications. This paper was recommended by Asso-ciate Editor J. Silva-Martinez.

The authors are with the Electronic Circuit Design Laboratory, Helsinki Uni-versity of Technology, FIN-02015 HUT, Finland.

Publisher Item Identifier S 1057-7130(00)00593-0.

Fig. 1. Conventional multicarrier transmitter in the base station.

Fig. 2. The multicarrier QAM modulator and upconversion chain.

bandpass filters (BPF’s) to a radio frequency (RF), as shownin Fig. 2. This saves a huge amount of analog components,many of which require production tuning. Consequently, anexpensive and tedious part of the manufacturing will be elimi-nated. A single linear multicarrier PA replaces the conventionalhigh-level combination of individual amplifiers using selectivecavities. The power losses in a hybrid combiner are avoided.The proposed multicarrier QAM modulator does not use ananalog modulator, therefore, the difficulties of adjustingthe dc offset, the phasing and the amplitude levels betweenthe in-phase and quadrature phase signal paths are avoided. Theanalog modulator causes considerable part of the error vectormagnitude (EVM) in a practical design [3]. The drawbackof the proposed system is high linearity requirements for thewideband upconversion mixers and the linearized PA, because

1057–7130/00$10.00 © 2000 IEEE

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2 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1, JANUARY 2000

Fig. 3. Multicarrier QAM modulator.

four carriers are passing through them. However, the linearizedPA is also needed in the case of the single carrier, because theused modulation method has not a constant envelope.

This paper only concentrates on the parameters of the digitalmulticarrier QAM modulator, which generates the intermediatefrequency (IF) signal in Fig. 2. The block diagram of the mul-ticarrier QAM modulator is shown in Fig. 3. The analysis ofspurs, harmonics and noise from the filters, mixers and poweramplifier are left out of the scope of this paper.

II. A RCHITECTUREDESCRIPTION

A. Multicarrier QAM Modulator

The QAM modulator includes a pair of root raised cosinefilters ( ) and three half-band filters connected to theCORDIC rotator for directly translating the baseband signal toIF (5–25 MHz). The frequencies of the four carriers can be in-dependently adjusted digitally. The four QAM modulated car-riers are combined as shown in Fig. 3. The multicarrier signal isthen filtered by an inverse filter to compensate for the

rolloff function inherent in the sampling process of thedigital-to-analog (D/A) conversion. The analog IF signal is up-converted by two mixers and bandpass filters to RF as shown inFig. 2.

The number of samples per symbol () and the clock fre-quency ( ) of the multicarrier QAM modulator are related by

(1)

Fig. 4. Details of the single QAM modulator in the multicarrier QAMmodulator (Fig. 3).R is number of taps in FIR.

where the symbol rate ( ) is 4.096 Mb/s, is 5 MHz, thenumber of channels () is four, and the carrier spacing () is5 MHz. When is 16, and is 4.096 Mb/s, is 65.536MHz. As the multicarrier QAM modulator generates frequen-cies close to one half of the clock frequency, the first image be-comes more difficult to filter. Therefore, the output frequency islimited approximately to 0.4 times the clock frequency. Thus, in(1), the clock frequency is 2.5 times higher than the maximumoutput frequency. In Fig. 2, the first bandpass filter is difficult toimplement, if the output frequency range begins near dc. There-fore, the digital multicarrier QAM modulator output range isfrom 5 ( ) to 25 MHz, so that the transition band of the firstbandpass filter must be below 10 MHz in Fig. 2.

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Fig. 5. Conventional QAM modulator.

B. CORDIC-Based QAM Modulator

The block diagram of the conventional QAM modulator isshown in Fig. 5. The output of the QAM modulator is

(2)

where is the output frequency of the numerically con-trolled oscillator (NCO), and , are pulse shaped andinterpolated quadrature data symbols [4]. The pre-equalizer isused to compensate for the rolloff function inherent inthe sampling process of the D/A conversion. Furthermore, dis-tortions in the phase and magnitude response of the analog filters(Fig. 2) could be partly precompensated by the pre-equalizer.The analysis and compensation of the distortions from analogfilters are left out of the scope of this paper.

The QAM modulator performs a circular rotation of. The circular rotation can be implemented

efficiently using a CORDIC algorithm, which is an iterativealgorithm for computing many elementary functions [5]. In thereceiver, the CORDIC-based digital demodulator was presentedin [6]. However, the problem of this structure is a long latencytime, because the CORDIC algorithm is an iterative algorithm.This can cause a stability problem, since the demodulator has afeedback loop for the phase tracking. In this QAM modulator,the long latency time is not a problem because there is nofeedback loop, as shown in Fig. 4.

In Fig. 6, a pair of rectangular axes is rotated clockwise withthe angle by the CORDIC algorithm; then, the coordinatesof a vector transform from to

(3)

The QAM modulator could be implemented by taking theterm (in-phase) at the CORDIC circular rotator output. Theseequations can be rearranged so that

(4)

Fig. 6. Vector rotation.

Arbitrary angles of rotation are obtainable by performing a se-ries of successively smaller elementary rotations. The rotationangles are restricted to so that the mul-tiplication by the tangent term will be reduced to binary shiftoperations. The iterative rotation can now be expressed as

(5)

where if otherwise. In rotation, the thirdvariable (phase value) is iterated to zero

(6)

While the inverse tangent of 2is only 45 , the circular rotatormust accommodate angles as large as ±180. Therefore, the ini-tialization cycle, which performs ±90rotation, is added

(7)

where if otherwise.Removing the scaling constant () from the iterative equa-

tions yields a shift-add algorithm for the vector rotation. Thatconstant approaches 0.6073 as the number of iterations goes toinfinity. Therefore, the CORDIC rotation algorithm has a gainof approximately 1.647. If both the vector component inputs gettheir full scale simultaneously, the maximum magnitude of theresult vector is 1.414 times the full scale. As the CORDIC ro-tator has a gain of approximately 1.647, the maximum outputis 2.33 times the full-scale input. The CORDIC rotator requirestwo “guard” bits to accommodate the maximum growth withoutoverflowing. In Fig. 4, the last half-band filter coefficients couldbe scaled so that only one guard bit is required.

The block diagram of the CORDIC circular rotator is shownin Fig. 7. To implement the CORDIC rotator, we use onlypipeline registers, adders/subtracters, and binary shifters, whichare implemented with wiring. In most PLD architectures, thereare already registers present in each logic cell, so the additionof the pipeline registers has no extra hardware cost. In orderto minimize the wiring expense for shift operations betweentwo stages, both data paths forand should be bit-by-bitinterleaved with one another. The amount of the residual anglebecomes smaller in successive iteration stages, and therefore,

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4 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1, JANUARY 2000

Fig. 7. Block diagram of CORDIC circular rotator.

TABLE IASSUMEDDIGITAL MODULATOR SPECIFICATIONS INWCDMA BASE STATION

the word length in the angle computation block can be reducedapproximately by 1 bit after each iteration [7].

CORDIC is a bit-recursive algorithm, which means that eachiteration increases the accuracy of the results approximatelyby 1 bit. Also, the truncation due to the finite precision in thefixed-point arithmetic causes errors [8]. The simulation resultsindicate that 13 iteration stages (plus the initialization cycle)are required to meet the Table I requirements. Errors causedby truncation require 16-bit precision in the angle computationdata path and 18-bit precision in theand data paths.

C. Phase Accumulator

The input word (frequency-control word) to the phase accu-mulator controls the frequency of the generated QAM modu-lated signal. The phase value is generated by using the modulo

overflowing property of a -bit phase accumulator. The rateof the overflow is the output frequency

(8)

wherefrequency-control word;phase accumulator word length;clock frequency;output frequency.

The frequency-control word in (8) is an integer, and therefore,the frequency resolution is found by setting

(9)

The frequency resolution will be 3.9 Hz by (9), when is65.536 MHz and is 24. The frequency resolution is much betterthan the given frequency error specification in Table I [1]. Thedrift of the LO’s could be compensated by the CORDIC rotatorhaving a frequency resolution of 3.9 Hz. The output of the phase

accumulator ( ) is the address to the CORDIC circular rotator,as shown in Fig. 7.

D. Inverse Filter

D/A converters exhibit a fully sampled-and-hold output thatcauses amplitude distortions on the spectrum of the convertedanalog signals [9]. This corresponds to a low-pass filtering func-tion expressed as

sinc (10)

where is the clock frequency of the multicarrier QAMmodulator. In the multicarrier QAM modulator, the outputband is from 5 to 25 MHz. This introduces a droop of−2.1755dB, which is not acceptable. One method is to compensate the

rolloff by the pre-equalizer (see Fig. 5). This requiresfour complex equalizers in this multicarrier QAM modulator.Therefore, the droop is compensated with the inversefilter in the IF frequency. The inverse filter is designedso that the frequency bands (0–5 and 25–32.8 MHz) are definedas “don’t care” bands. Attempting to compensate the distortionover the entire Nyquist bandwidth requires significantly longerfilters. The inverse filter was designed by the methodin [9]. The impulse response coefficients and the frequencyresponse of the filter are shown in Fig. 8. The peak error is±0.0274 dB over the frequency band from 5 to 25 MHz inFig. 8.

III. FILTER ARCHITECTURE ANDDESIGN

A. A Filter Architecture

In the multicarrier QAM modulator, phase distortion cannotbe tolerated, and thus the filters are required to have a linearphase response. It is well known that a finite-impulse response(FIR) filter can be guaranteed to have an exact linear phaseresponse if the coefficients are either symmetric or antisym-metric about the center point. Multirate systems are efficientlyimplemented using the polyphase structure in which samplingrate conversion and filtering operations are combined. It can beshown that for an interpolation of , an -tap filter runningat the sampling rate is equivalent to -tap subfiltersrunning at . The decomposition into subfilters is accom-plished by sampling every th coefficient of the original im-pulse response. When the prototype filter has symmetric or anti-symmetric coefficients, however, the decomposition of the filterinto subfilters will usually result in subfilters with unsym-metric coefficients, and thus possibly increased complexity ascompared to the prototype filter. In fact, at most, two of the sub-filters have (anti)symmetric coefficients [10]. The root raisedcosine filter ( ) is an interpolating FIR with a 1 : 2 inter-polation ratio in Fig. 4, then the both subfilters have symmetriccoefficients. The subfilters were implemented using the trans-pose direct-form structure in order to use common subexpres-sion sharing [20]. Taking advantage of the fact that, in the mul-ticarrier QAM modulator (see Fig. 3), data streams in the fourI andQ paths are processed with the same functional blocks,a further hardward reduction could be achieved by using inter-leaving techniques [21].

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Fig. 8. Frequency response and impulse response coefficients of 9-tapFIR compensation filter (- - - ideal compensation filter). h(0)=h(8)= 1/1024;h(1)=h(7)= -1/256; h(2)=h(6)= 1/64; h(3)=h(5)= -1/16; h(4)= 1 – 1/4.

Half-band filters are filters whose passband and stopbandhave symmetry at 1/4 sampling frequency. In three half-bandfilters, all but one of the odd coefficients are zero, therebyreducing the hardware complexity by approximately 50%. Thisreduction, coupled with their symmetric impulse responses,allows the first, second, and third half-band filters to be spec-ified by only 7, 4, 4 nonzero coefficients, respectively. Themagnitude response of the three half-band filters and root raisedcosine ( 0.22) filter are shown in Fig. 9. The combinationof the filters provides more than 75-dB image rejection.

B. Filter Coefficient Design

The root raised cosine filter ( ) was designed tomaximize the ratio of the main channel power to the adjacentchannels’ power under the constraint that the EVM is below2% (see Appendix). A 2% EVM is assigned to the digital parts(from Table I). The 37-tap root raised cosine filter is character-ized by an EVM of 0.56%. Half-band filters were first designedwith floating-point coefficients using a least-squares FIR designmethod. A least-squares stopband rather than an equiripple stop-band is more desirable, because the objective is to maximizethe ratio of the main channel power to the adjacent channels’power. An equiripple stopband minimizes the peak stopbandamplitude; however, the total stopband energy is much largerthan in a least-squares design.

For applications with fixed coefficients, a fully parallel mul-tiplier is not required, and would indeed be a waste of area. In-stead, multiplication by a fixed binary number can be accom-plished with ( ) adders, where is the number of nonzerobits in the coefficient. A more efficient technique is to recode thecoefficients from a binary code to a canonic signed digit (CSD)code containing the digits . Recoded in this way, alimited number of nonzero digits can be used to adequately rep-resent the coefficients. The effect of quantizing the filter coef-ficients to a limited number of CSD digits is difficult to studyanalytically, so simulations were used to optimize the selectedcodes. The CSD coefficients were then determined using a mod-ified version of the optimization program in [11]. The programin [11] was modified to accommodate a least-squares stopband.

Fig. 9. Magnitude responses of the half-band filters and root raised cosinefilter (� =0.22).

TABLE IICRESTFACTORS OFMULTICARRIER QAM

Fig. 10. Magnitude probability histogram of a multicarrier QAM signal.

IV. M ULTICARRIER QAM SIGNAL CHARACTERISTICS

The simulation results presented in this section examine themulticarrier QAM signal characteristics, which are often ex-pressed as a ratio of the peak value to rms value of a waveformor a crest factor. The simulation length has been 8192 symbols,and 16 samples per one symbol has been taken. The multicarrierQAM simulation employed a regular carrier spacing of 5 MHzand a symbol rate 1/ 4.096 Mbit/s, the pulse-shaping filter isa root raised cosine filter with a rolloff factorof 0.22. The dataof both the and inputs are normally distributed with a crestfactor of 10 dB. Different pseudorandom number generators areused to generate each digital modulation source, thus ensuringlow correlation between the resulting carriers. The crest factorsare given in Table II from one to four carriers. The increasein the number of the carriers does not increase significantly the

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6 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1, JANUARY 2000

crest factor, as shown in Table II. Theoretical crest factors aresignificantly higher than the simulated crest factors. These re-sults can be explained by the fact that to reach the theoreticalcrest factor, not only do all the carriers have to reach the samephase at the same time, but the data peaks also have to occurat the same time. Since this condition is extremely unlikely tooccur in any given period, the simulated crest factor is signifi-cantly lower than the theoretical maximum. This is confirmedby the magnitude probability histogram of the QAM modulatedcarriers shown in Fig. 10. The histogram clearly indicates thatfor an increasing number of carriers the signal magnitude spendsan increasing proportion of its time well below the theoreticalmaximum peak value.

If the peak values of the signal were reduced, then the dy-namic range requirements of the D/A converter will be allevi-ated. One solution to decrease the peak values is to use clip-ping [12]. The distortion generated by the clipping would haveto conform to the WCDMA specifications (see Table I). Theclipping level of 0.4375 (normalized to theoretical peak ampli-tude) is used to reduce peak values of the multicarrier signalbefore the D/A converter.

V. SIMULATION RESULTS

Table I summarizes the assumed digital modulator specifi-cations in WCDMA Base Station. The modulation is a dualchannel QPSK, where uplink dedicated physical data channel(DPDCH) and dedicated physical control channel (DPCCH)are mapped to the and branches, respectively [1]. In thebase station, the multiuser data is combined and weighted.Therefore, the input of the branches is 13 bits in Table I.

In this WCDMA system, the EVM is specified to be less than12.5% rms [13]. A 2% rms EVM is assigned to the digital parts.The EVM is the difference between the ideal vector convergencepoint and the transmitted point in the signal space. The EVM isdefined as the rms value of the error vectors in relation to themagnitude at a given symbol

EVMrms Error MagnitudeSymbol Magnitude

(11)

One code channel is transmitted (four QAM) when the EVMis measured. During the measurement the symbol magnitudeis defined to be 40-dB below the maximum symbol level. Thismeans that the symbol is 6–7 bits below the full-scale input. Themodulator output was directly connected to the ideal demodu-lator input. The wideband and high resolution D/A converter isan expensive device, so it is the most critical component in themulticarrier QAM modulator. In Fig. 11, the EVM was plottedas a function of the input wordlength of the D/A converter. TheEVM of 0.56% is the maximum achievable performance of thefinite wordlength architecture with the given set of CSD filtercoefficients. The four-QAM symbol constellation with Table IIIparameters is shown in Fig. 12 (EVM is 1.06%).

The ratio of the integrated first/second/third adjacent channelpower (4.096-MHz bandwidth) to the integrated channel power(4.096-MHz bandwidth) should be below−65/−65/−65 dB, re-spectively, as shown in Table I. This must be confirmed to allchannels. During this simulation, the data of both theand

Fig. 11. EVM versus D/A converter input.

TABLE IIIDIGITAL MULTICARRIER QAM MODULATOR SUMMARY

Fig. 12. The symbol constellation of the four QAM based on the simulation(EVM = 1.06%).

Fig. 13. Ratio between adjacent channels’ power to channel power versus D/Aconverter wordlength.

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inputs are normally distributed with a crest factor of 10 dB. InFig. 13, the ratio between the adjacent channels’ power to thechannel power was plotted as a function of the wordlength ofthe D/A converter. The ACP/ALT1/ALT2 means the power ratiobetween the first/second/third adjacent channel to the channel,respectively. The 14-bit D/A converter fulfills clearly the EVM(see Fig. 11) and the adjacent channels’ power specifications(from Table I). The simulated spectrum for the single carrier isshown in Fig. 14. Fig. 15 shows the multicarrier QAM modu-lator output.

VI. I MPLEMENTATION OF MULTICARRIER QAM MODULATOR

The CORDIC-based QAM modulator is an array of intercon-nected adder/subtracters. So, it can be realized with basic logicstructures in existing PLD’s. We refer to the logic structuresthat correspond to configurable logic blocks (CLB’s) forXilinx XC4000 family [14] and logic elements (LE’s) for theAltera’s FLEK devices [15] in particular. The CORDIC-basedmulticarrier QAM modulator was implemented with the AlteraFLEK 10KA-1 series devices [15]. The pair of root raisedcosine and three half-band filters in Fig. 4 (design usinginterleaving techniques [22]) requires 4189 (83% of total)LE’s in the EPF10K100A device. The CORDIC rotator andthe phase accumulator require 1209 (24% of total) LE’s in theEPF10K100A device. The inverse filter and the adderin Fig. 3 require 308 (53% of total) LE’s in the EPF10K10A de-vice. The maximum operating frequency of the CORDIC-basedmulticarrier QAM modulator implementation is 86.2 MHz,which is higher than the required operating frequency (65.536MHz). The multicarrier QAM modulator can be implementedwith eight EPF10K100A and one EPF10K10A devices.

The two 16 × 14 bit multipliers and the adder in the con-ventional QAM modulator (see Fig. 5) require 1182 LE’s inthe EPF10K100A device. The maximum operating frequencyof the two multipliers and the adder is 95.23 MHz. In this struc-ture, the multipliers require about 96% of the LE’s. Those mul-tipliers were implemented with the parameterized module [16],which is optimized for performance and density in PLD’s. TheCORDIC rotator requires 1152 LE’s in the EPF10K100A de-vice. The CORDIC-based QAM modulator has about the samelogic complexity as the two multipliers and the adder (1182LE’s) with the same word sizes. It replaces sine/cosine ROM’s( b), two multipliers, and the adder (see Fig. 5).The conventional QAM modulator with the quadrature outputsrequires four multipliers, two adders, and sine/cosine memories[4]. If a QAM modulator with the quadrature outputs is needed,then the CORDIC-based QAM modulator replaces four multi-pliers, two adders, and sine/cosine memories.

VII. M EASUREMENTRESULTS

In the QAM IF modulator, most of the spurs are generated lessby digital errors (truncation or quantization errors) and more byanalog errors in the D/A converter, such as clock feedthrough,intermodulation and glitch energy. The simulation results weresaved in the pattern generator memory. These data were trans-ferred to the D/A converter [17]. The ratio of the integrated firstadjacent/second adjacent/third adjacent channel power (4.096

Fig. 14. Spectrum of single carrier with Table III parameters.

Fig. 15. Spectrum of four carriers with Table III parameters.

Fig. 16. The QAM-modulated signal. Resolution and video bandwidth is 30kHz, sweep time is 86 ms, and averaging is used.

Fig. 17. The multicarrier QAM-modulated signal. The resolution and videobandwidth is 30 kHz, sweep time is 86 ms, and averaging is used.

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Fig. 18. Root raised cosine filter using two designs: (i) when sampling fromthe root raised cosine function (ISI = 0.11%) and (ii) when maximizing the ratioof the main channel power to the adjacent channel’s power under the constraintthat the ISI is below 2% (ISI = 0.56%).

MHz bandwidth) to the integrated channel power (4.096-MHzbandwidth) should be below−65/−65/−65 dB, respectively. Thecarrier spacing is 5 MHz (see Table I). Fig. 16 shows the single-carrier output spectrum centered at 17.5 MHz. The power ra-tios fulfill the specifications (−65/−65/−65 dB) in the case ofthe single carrier. The specifications are−45/−55/−55 dB, whenthe spectrum is measured at the base station RF port [13]. Themeasurement results are well below these specifications.

Fig. 17 shows the multicarrier output. The first adjacentchannel power fulfills the specification (−65 dB). It is possibleto use steep analog bandpass filters around the multicarriersignal in Fig. 2, and the second adjacent/third adjacent channelpower around the multicarrier signal can be further reduced.

VIII. C ONCLUSION

A multicarrier QAM modulator has been developed and im-plemented with the PLD’s. The multicarrier QAM modulatorchip contains four CORDIC-based QAM modulators. The con-ventional QAM modulator needs two multipliers, one adder, andsine/cosine ROM’s. The designed CORDIC-based QAM modu-lator has about the same logic complexity as the two multipliersand the adder with the same word sizes. The proposed multicar-rier QAM modulator does not use an analog modulator,andtherefore, the difficulties of adjusting the dc offset, phasing, andthe amplitude levels between the in-phase and quadrature-phasesignal paths are avoided. The multicarrier QAM modulator wasdesigned to fulfill the spectrum and EVM specifications of theWCDMA system.

APPENDIX

The -tap transmit filter is characterized by the coefficientvector , which is clocked at the rate

corresponding to an oversampling ratio. The receivefilter ( ) is a tap filter, which is times oversampled fromthe root raised cosine function. The transmit filter is convolutedwith the receive filter. Ideally the result of the convolution will

be an ideal raised cosine filter. There will be an EVM due to thetruncation of the receive filter impulse response, if the lengthof the receive filter is short. Therefore it is better to use a longreceive filter. Then the transmit filter will dominate the EVM.

The transmit and receive filter lengths are assumed to be ei-ther even or odd, in order to have one middle sample for decisionin the composite pulse . The convolution of the trans-mitter and receiver filters should satisfy the zero intersymbolinterference constraint

(12)

where is the center tap and is the oversampling ratio. Thecentral tap is . The total number of the termsin (12) is , where and denotes the integerpart of . Equation (12) could be written as

(13)

where the elements of the “shift” matrices are zero, exceptfor [18]. The “shift”

matrices are matrix.The passband ripples of the linear-phase half-band filters (in-

terpolation filters in Fig. 4) cause EVM as well, which could bepartly compensated by predistortion of the pulse-shaping filter.The receive filter ( ) could be convoluted with the interpola-tion filters. This convolution could be calculated with the nobleidentities [19]. The result is decimated back to theoversam-pled ratio and convoluted with the transmitted filter in (13).

One code channel is transmitted, when the EVM is measured.The EVM consists of two components, which are mutually un-correlated

(14)

where is the quantization noise due to finite wordlength ef-fects. The D/A converter dominates this quantization noise be-cause it is the most critical component. The effect of the D/Aconverter wordlength on the EVM is shown in Fig. 11. The ISIterm is

where

(15)

and is a matrix. The EVM is scaled with the symbolmagnitude in (11). Therefore, a linear constraint is added toguarantee proper scaling of the pulse peak

(16)

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VANKKA et al.: A MULTICARRIER QAM MODULATOR 9

The low-pass channel energy () from dc to (low-passchannel’s cutoff frequency) is

(17)

where is a matrix with elements

. (18)

The stopband energy ( ) from (stopband corner frequency)to is

(19)

where is a matrix with elements

.

(20)The ISI can be traded off with the power ratio of the main

channel power to the adjacent channels’ power. The ISI per-formance decreases while the power ratio of the main channelpower to the adjacent channels’ power increases. The cost func-tion, which should be maximized, is written as

(21)

The objective is to maximize the ratio of the main channel powerto the adjacent channels’ power under the constraint that theISI is below 2%. Therefore weighting terms,, , , are added.No well-developed method exists for choosing the weightingterms, , , . Suitable values have to be found by trial and error.Employing the Lagrangian method for the maximization of (21)subject to (16), the objective function is

(22)

where . The solution is foundwith the standard Lagrange multiplier techniques [by setting the

derivatives with respect to and to zero]to be

(23)

Fig. 18 shows frequency responses of two 37-tap root raisedcosine filters designed by different methods: (i) when samplingfrom the root raised cosine function and (ii) when maximizingthe ratio of the main channel power to the adjacent channels’power under the constraint that the ISI is below 2%. It is seenthat this design method provides an additional 35-dB adjacentchannels’ suppression in this example. The ISI performance de-creases from 0.11 to 0.56%.

REFERENCES

[1] “The ETSI UMTS Terrestrial Access (UTRA) ITU-R RTT CandidateSubmission,”, SMG2 260/98, July 1998.

[2] Mobile Station-Base Station Compatibility Standard for Dual-ModeWideband Spread Spectrum Cellular System, TLAJELAAS-95, July1993.

[3] S. Otakaet al., “A low local input 1.9 GHz Si-bipolar quadrature mod-ulator with no adjustment,”IEEE J. Solid State Circuits, vol. 31, pp.30–37, Jan. 1996.

[4] L. K. Tan and H. Samueli, “A 200 MHz quadrature digital synthe-sizer/mixer in 0.8 gm CMOS,”IEEE J. Solid State Circuits, vol. 30, pp.193–200, Mar. 1995.

[5] J. E. Volder, “The CORDIC trigonometric computing technique,”IRETrans. Electron. Comput., vol. EC-8, no. 3, pp. 330–334, Sept. 1959.

[6] A. Chen, R. McDanell, M. Boytim, and R. Pogue, “Modified CORDICdemodulator implementation for digital IF-sampled receiver,”Proc.GLOBECOM 95, pp. 1450–1454, Nov. 1995.

[7] G. C. Gielis, R. van de Plassche, and J. van Valburg, “A 540-MHz 10-bpolar-to-Cartesian converter,”IEEE J. Solid State Circuits, vol. 26, pp.1645–1650, Nov. 1991.

[8] K. Kota and J. R. Cavallaro, “Numerical accuracy and hardwaretradeoffs for CORDIC arithmetic for special-purpose processors,”IEEE Trans. Comput., vol. 42, pp. 769–779, July 1993.

[9] H. Samueli, “The design of multiplierless FIR filters for compensatingD/A converter frequency response distortion,”IEEE Trans. CircuitsSyst., vol. CAS–35, pp. 1064–1066, Aug. 1988.

[10] R. A. Hawleyet al., “Design techniques for silicon compiler implemen-tations of high-speed FIR digital filters,”IEEE J. Solid-State Circuits,vol. 31, pp. 656–667, May 1996.

[11] H. Samueli, “An improved search algorithm for the design of multiplier-less FIR filters with powers-of-two coefficients,”IEEE Trans. CircuitsSyst., vol. CAS–36, pp. 1044–1047, July 1989.

[12] D. W. Bennett, P. B. Kenington, and R. J. Wilkinson, “Distortion effectsof multicarrier envelope limiting,” inProc. Inst. Elect. Eng. Commun.,vol. 144, Oct. 1997, pp. 349–356.

[13] “3rd Generation Partnership Project (3GPP) Technical SpecificationGroup (TSG) RAN WG4 UTRA (BS) FDD: Radio Transmission andReception,”, S 4.01B vl.0.1, Apr. 1999.

[14] The Programmable Logic Data Book. San Jose, CA: Xilinx, 1998.[15] “FLEK IOK embedded programmable logic family data sheet,” Altera

Corp., San Jose, CA, Oct. 1998.[16] “Implementing multipliers in FLEX 1OK devices,” Altera Corp., San

Jose, CA, Altera Application Note 53, 1996.[17] “Analog Devices AD 9754 data sheet,”, Rev. 0 ed., 1999.[18] P. R. Chevillat and G. Ungerboeck, “Optimum FIR transmitter and re-

ceiver filters for data transmission over band-limited channels,”IEEETrans. Commun., vol. COM-30, pp. 1909–1915, Aug. 1982.

[19] P. P. Vaidyanathan,Multirate Systems and Filter Banks. EnglewoodCliffs, NJ: Prentice-Hall, 1993.

[20] R. I. Hartley, “Subexpression sharing in filters using canonic signed digitmultipliers,” IEEE Trans. Circuits Syst. II, vol. 43, pp. 677–688, Oct.1996.

[21] Z. Jiang and A. N. Willson, “Efficient digital filtering architecturesusing pipelining/interleaving,”IEEE Trans. Circuits Syst. II, vol. 44,pp. 110–119, Feb. 1997.

[22] K. H. Cho, J. Putnam, and H. Samueli, “A VLSI architecture for a fre-quency-agile single-chip 10–Mbaud digital QAM modulator,” inProc.GLOBECOM’99, Dec. 1999, pp. 168–172.

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10 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 1, JANUARY 2000

Jouko Vankka (S’96) was born in Helsinki, Finland,in 1965. He received the M.S. degree in electricalengineering from Helsinki University of Technology(HUT), Helsinki, Finland, in 1991, and is currentlyworking toward the Ph.D. degree.

Since 1995, he has been with the Electronic CircuitDesign Laboratory at HUT, and is currently workingas a Research Scientist. His research interests includeVLSI architectures and mixed-signal integrated cir-cuits for communication applications.

Marko Kosunen was born in Helsinki, Finland,in 1974. He received the M.S. degree in electricalengineering from Helsinki University of Technology(HUT), Helsinki, Finland, in 1998, and is currentlyworking toward the Ph.D. degree.

Since 1996, he has been with the Electronic CircuitDesign Laboratory at HUT. His current research in-terests include low-power implementations of digitalsignal processing blocks for wireless communicationsystems.

Ignacio Sanchis was born in Madrid, Spain,in April 1974. He received the M.S. degree inelectrical and telecommunication engineering fromMadrid University of Technology (UniversdadPolitecnica de Madrid) in June 1999. He completedhis Masters thesis at Helsinki University of Tech-nology, Helsinki, Finland, during the academic year1998–1999.

His current research interests include VLSI archi-tectures and digital signal processing for telecommu-nications.

Kari A. I. Halonen was born in Helsinki, Finland,in 1958. He received the M.S. degree in electricalengineering from Helsinki University of Technology(HUT), Helsinki, Finland, in 1982, and the Ph.D.degree in electrical engineering from the KatholiekeUniversiteit Leuven, in Heverlee, Belgium, in 1987.

From 1982 to 1984, he was an Assistant at HUTand also a Research Assistant at the Technical Re-search Center of Finland. From 1984 to 1987, he wasa Research Assistant at the E.S.A.T. Laboratory of theKatholieke Universiteit Leuven, also enjoying a tem-

porary grant from the Academy of Finland. Since 1988, he has been with theElectronic Circuit Design Laboratory, HUT, as a Senior Assistant (1988–1990),and the Director of the Integrated Circuit Design Unit of the MicroelectronicsCenter (1990–1993). He was on leave of absence the academic year 1992–1993,acting as a R&D Manager with Fincitec Inc., Finland. From 1993 to 1996, hewas an Associate Professor, and since 1997, has been a full Professor at the Fac-ulty of Electrical Engineering and Telecommunications, HUT. He specializes inCMOS and BiCMOS analog integrated circuits, particularly for telecommunica-tion applications. He is the author or coauthor of 100 international and nationalconference and journal publications on analog integrated circuits.