48
ARM Processor and Memory Architecture Goal: Turn on an LED

Processor and Memory Architecture Goal: Turn on an LED

  • Upload
    others

  • View
    2

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Processor and Memory Architecture Goal: Turn on an LED

ARM Processor and Memory

Architecture

Goal: Turn on an LED

Page 2: Processor and Memory Architecture Goal: Turn on an LED
Page 3: Processor and Memory Architecture Goal: Turn on an LED
Page 4: Processor and Memory Architecture Goal: Turn on an LED

Assignment 1Knight Rider Display - Larson Scanner

Page 5: Processor and Memory Architecture Goal: Turn on an LED

Babbage Difference Engine

Page 6: Processor and Memory Architecture Goal: Turn on an LED

http://www.theguardian.com/technology/2015/apr/12/thrilling-adventures-ada-lovelace-charles-babbage-sydney-padua

Analytical Engine

Universal Computer

Page 7: Processor and Memory Architecture Goal: Turn on an LED

Broadcom 2865 ARM Processor

Samsung 4Gb (gigabit) SDRAM

Package on Package

Page 8: Processor and Memory Architecture Goal: Turn on an LED

Running a Program

Fetch Instruction

Decode Instruction

Execute InstructionClock

Page 9: Processor and Memory Architecture Goal: Turn on an LED

10000000016Memory used to storeboth instructionsand data

Storage locations areaccessed using 32-bit addresses

Maximum addressable memory is 4 GB (gigabyte)

Address refers to a byte (8-bits)

Memory Map

0000000016

Page 10: Processor and Memory Architecture Goal: Turn on an LED

10000000016

02000000016512 MB Actual Memory

Memory Map

Page 11: Processor and Memory Architecture Goal: Turn on an LED

ARM Architecture / Floor Plan

Key Fact: Everything is organized into 32-bit words

Registers

ALU

DATA

ADDR

INST

+

Memory

r15r14r13r12r11r10r9r8r7r6r5r4r3r2r1r0

ADDR

Page 12: Processor and Memory Architecture Goal: Turn on an LED

pc=r15

r15 holds the program counter (pc)

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

Instruction Fetch

Page 13: Processor and Memory Architecture Goal: Turn on an LED

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

INST = Memory[ADDR]

pc

pc=r15

Instruction Fetch

Addresses and instructions are 32-bit words

Page 14: Processor and Memory Architecture Goal: Turn on an LED

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

pc+4

r15=pc+4

pc

Calculate address of next instructionWhy pc+4?

Instruction Fetch

Page 15: Processor and Memory Architecture Goal: Turn on an LED

Arithmetic-Logic Unit (ALU)

Page 16: Processor and Memory Architecture Goal: Turn on an LED

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR r2

r1

r0

addr0,r1,r2

r0=r1+r2

ALU only operates on registersRegisters are also 32-bit words

Page 17: Processor and Memory Architecture Goal: Turn on an LED

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

1

r1

r0

addr0,r1,#1

Immediate Value (#1)stored in INST

Page 18: Processor and Memory Architecture Goal: Turn on an LED

Add Instruction

Meaning (defined as math or C code)

r0=r1+r2

Assembly language (result is leftmost register)

addr0,r1,r2

Machine code (more on this later)

E0810002

Page 19: Processor and Memory Architecture Goal: Turn on an LED

1Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

r0movr0,#1

Move Immediate (constant)

Page 20: Processor and Memory Architecture Goal: Turn on an LED

VisUAL

Page 21: Processor and Memory Architecture Goal: Turn on an LED

Conceptual Questions

1. Suppose your program starts at 0x8000, what assembly language instruction could you execute to jump to and start executing instructions at that location.

2. If all instructions are 32-bits, can you move any 32-bit constant value into a register using a single mov instruction?

3. What is the difference between a memory location and a register?

Page 22: Processor and Memory Architecture Goal: Turn on an LED

Load and Store Instructions

Page 23: Processor and Memory Architecture Goal: Turn on an LED

ldrr0,[r1]

r1

ADDR=r1DATA= Memory[ADDR]

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

Load from Memory to Register (LDR)

Step 1

Page 24: Processor and Memory Architecture Goal: Turn on an LED

r0r0=DATA

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

Step 2

Load from Memory to Register (LDR)

Page 25: Processor and Memory Architecture Goal: Turn on an LED

r0

strr0,[r1]

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

Store Register in Memory (STR)

DATA=r0Step 1

Page 26: Processor and Memory Architecture Goal: Turn on an LED

r1

Registers

ALU

DATA

ADDR

INST

+

Memory

ADDR

Store Register in Memory (STR)

ADDR=r1Memory[ADDR]=DATAStep 2

strr0,[r1]

Page 27: Processor and Memory Architecture Goal: Turn on an LED
Page 28: Processor and Memory Architecture Goal: Turn on an LED

Turning on an LED

Page 29: Processor and Memory Architecture Goal: Turn on an LED

General-Purpose Input/Output (GPIO) Pins

54 GPIO Pins

Page 30: Processor and Memory Architecture Goal: Turn on an LED

Computers have Peripherals that Interface to the World

GPIO Pins are Peripherals

Page 31: Processor and Memory Architecture Goal: Turn on an LED
Page 32: Processor and Memory Architecture Goal: Turn on an LED

1 -> 3.3V0 -> 0.0V (GND)

Connect LED to GPIO 20

3.3V

1k

GND

Page 33: Processor and Memory Architecture Goal: Turn on an LED
Page 34: Processor and Memory Architecture Goal: Turn on an LED

GPIO Pins are Peripherals

Peripherals are Controlled by Special Memory Locations

"Peripheral Registers"

Page 35: Processor and Memory Architecture Goal: Turn on an LED

02000000016

10000000016Memory Map 4 GB

Ref: BCM2835-ARM-Peripherals.pdf

Peripheral registers are mapped into address space

Memory-Mapped IO(MMIO)

MMIO space is abovephysical memory

512 MB

Page 36: Processor and Memory Architecture Goal: Turn on an LED

General-Purpose IO Function

3 bits required to select function

Bit pattern Pin Function000 The pin in an input 001 The pin is an output 100 The pin does alternate function 0 101 The pin does alternate function 1 110 The pin does alternate function 2111 The pin does alternate function 3011 The pin does alternate function 4010 The pin does alternate function 5

GPIO Pins can be configured to beINPUT, OUTPUT, or ALT0-5

Page 37: Processor and Memory Architecture Goal: Turn on an LED

2 1 05 4 38 7 69101114 13 1215161720 19 1821222326 25 242728293031

GPIO 0GPIO 1GPIO 3 GPIO 4GPIO 5GPIO 6 GPIO 7GPIO 8GPIO 9 GPIO 2

GPIO Function Select Register

8 functions requires 3 bits to specify

10 pins times 3 bits = 30 bits

32-bit register (2 wasted bits)

"Function" is INPUT, OUTPUT (or ALT0-5)

54 GPIOs pins requires 6 registers

Page 38: Processor and Memory Architecture Goal: Turn on an LED

Watchoutfor…Manualsays:0x7E200000Replace7Ewith20:0x20200000

Ref: BCM2835-ARM-Peripherals.pdf

GPIO Function Select Registers Addresses

Page 39: Processor and Memory Architecture Goal: Turn on an LED

//SetGPIO20tobeanoutput

//FSEL2=0x20200008movr0,#0x20//r0=#0x00000020lslr1,r0,#24//r1=#0x20000000lslr2,r0,#16//r2=#0x00200000orrr1,r1,r2//r1=#0x20200000orrr0,r1,#0x08//r0=#0x20200008

movr1,#1//1indicatesOUTPUTstrr1,[r0]//store1to0x20200008

Note this also makes GPIO 21-29 into inputs

Page 40: Processor and Memory Architecture Goal: Turn on an LED
Page 41: Processor and Memory Architecture Goal: Turn on an LED

2 1 05 4 38 7 69101114 13 1215161720 19 1821222326 25 242728293031

34 33 3237 36 3540 39 3841424346 45 4447484952 51 5053

2020001C:GPIOSET0Register20200020:GPIOSET1Register

GPIO Function SET Register

Notes1. 1 bit per GPIO pin2. 54 pins requires 2 registers

Page 42: Processor and Memory Architecture Goal: Turn on an LED

//SetGPIO20outputHigh(3.3V)//AssumesGPIO20configuredtobeoutput//FSET0=0x2020001cmovr0,#0x20//r0=0x00000020lslr1,r0,#24//r1=0x20000000lslr2,r0,#16//r2=0x00200000orrr1,r1,r2//r1=0x20200000orrr0,r1,#0x1c//r0=0x2020001c

movr1,#1//r1=0x00000001lslr1,r1,#20//r1=0x00100000strr1,[r0]//storer1to0x2020001c

//loopforeverloop:bloop

Page 43: Processor and Memory Architecture Goal: Turn on an LED

#Whattodoonyourlaptop

#Assemblelanguagetomachinecode%arm-none-eabi-ason.s-oon.o

#Createbinaryfromobjectfile%arm-none-eabi-objcopyon.o-Obinaryon.bin

Page 44: Processor and Memory Architecture Goal: Turn on an LED

#Whattodoonyourlaptop

#InsertSDcard-Volumemounts%ls/Volumes/BOOT2020 MacintoshHD

#CopytoSDcard%cpon.bin/Volumes/BOOT2020/kernel.img

#EjectandremoveSDcard

Page 45: Processor and Memory Architecture Goal: Turn on an LED

##InsertSDcardintoSDHCslotonpi##Applypowerusingusbconsolecable.#PowerLED(Red)shouldbeon.##Raspberrypiboots.ACTLED(Green)#flashes,andthenisturnedoff##LEDconnectedtoGPIO20turnson!!#

Page 46: Processor and Memory Architecture Goal: Turn on an LED

Assignment 0

- Join forum https://edstem.org/us/courses/21299

- Read and understand our guides on basic topics (electricity, numbers, unix). Practice unix command line

- Checkout the course directory from gitbub

- Checkout your assignment directory and answer the questionnaire, check-in to submit assignment

- Setup your development environment before lab

Page 47: Processor and Memory Architecture Goal: Turn on an LED

Key Concepts• Bits are bits; fundamental bitwise operations

• Memory addresses refer to bytes (8-bits), words are 4 bytes

• Memory stores both instructions and data

• Computers repeatedly fetch, decode, and execute instructions

• Different types of ARM instructions: ALU, Loads and Stores, Branches

• General purpose IO (GPIO), peripheral registers, and MMIO

Page 48: Processor and Memory Architecture Goal: Turn on an LED

Further Reading

If you want to learn more about high-level computer organization and instructions, Chapter 2 of Computer Organization and Design: The Hardware/Software Interface (Patterson and Hennessy) is an excellent place to start.

Or take EE180 next Winter!