Principles of Operationlars.nocrew.org/computers/processors/ESA390/dz9ar007.pdf · This edition obsoletes and replaces Enterprise Systems Architecture/390 Principles of Operation,

Enterprise Systems Architecture/390 IBM

Principles of Operation

SA22-7201-07

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Eighth Edition (July 2001)

This edition obsoletes and replaces Enterprise Systems Architecture/390 Principles of Operation, SA22-7201-06.

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Contents

Notices . . . . . . . . . . . . . . . . . . . . . . xviiTrademarks . . . . . . . . . . . . . . . . . . . xvii

Preface . . . . . . . . . . . . . . . . . . . . . . . xixSize and Number Notation . . . . . . . . . . xxiBytes, Characters, and Codes . . . . . . . . xxiOther Publications . . . . . . . . . . . . . . . xxi

| Summary of Changes in Eighth Edition . . . xxiiSummary of Changes in Seventh Edition . . xxivSummary of Changes in Sixth Edition . . . . xxivSummary of Changes in Fifth Edition . . . . . xxviSummary of Changes in Fourth Edition . . . xxviSummary of Changes in Third Edition . . . . xxviiSummary of Changes in Second Edition . . xxviii

Chapter 1. Introduction . . . . . . . . . . . 1-1Highlights of ESA/390 . . . . . . . . . . . . . 1-1

The ESA/370 and 370-XA Base . . . . . . 1-9System Program . . . . . . . . . . . . . . . . . 1-11Compatibility . . . . . . . . . . . . . . . . . . . 1-11

Compatibility among ESA/390 Systems . . 1-11Compatibility among ESA/390, ESA/370,

370-XA, and System/370 . . . . . . . . 1-12Control-Program Compatibility . . . . . . 1-12Problem-State Compatibility . . . . . . . 1-12

Availability . . . . . . . . . . . . . . . . . . . . 1-13

Chapter 2. Organization . . . . . . . . . . . 2-1Main Storage . . . . . . . . . . . . . . . . . . . 2-2Expanded Storage . . . . . . . . . . . . . . . 2-2CPU . . . . . . . . . . . . . . . . . . . . . . . . 2-2

PSW . . . . . . . . . . . . . . . . . . . . . . 2-3General Registers . . . . . . . . . . . . . . 2-3Floating-Point Registers . . . . . . . . . . . 2-4Floating-Point-Control (FPC) Register . . . 2-4Control Registers . . . . . . . . . . . . . . . 2-4Access Registers . . . . . . . . . . . . . . . 2-4Vector Facility . . . . . . . . . . . . . . . . . 2-6Cryptographic Facility . . . . . . . . . . . . 2-6

External Time Reference . . . . . . . . . . . . 2-6I/O . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

Channel Subsystem . . . . . . . . . . . . . 2-6Channel Paths . . . . . . . . . . . . . . . . 2-6I/O Devices and Control Units . . . . . . . 2-7

Operator Facilities . . . . . . . . . . . . . . . . 2-7

Chapter 3. Storage . . . . . . . . . . . . . . 3-1Storage Addressing . . . . . . . . . . . . . . . 3-2

Information Formats . . . . . . . . . . . . . 3-2Integral Boundaries . . . . . . . . . . . . . 3-3

Address Types and Formats . . . . . . . . . . 3-3Address Types . . . . . . . . . . . . . . . . 3-3

Absolute Address . . . . . . . . . . . . . 3-4Real Address . . . . . . . . . . . . . . . 3-4Virtual Address . . . . . . . . . . . . . . 3-4Primary Virtual Address . . . . . . . . . 3-4Secondary Virtual Address . . . . . . . . 3-4AR-Specified Virtual Address . . . . . . 3-4Home Virtual Address . . . . . . . . . . 3-4Logical Address . . . . . . . . . . . . . . 3-4Instruction Address . . . . . . . . . . . . 3-5Effective Address . . . . . . . . . . . . . 3-5

Address Size and Wraparound . . . . . . . 3-5Address Wraparound . . . . . . . . . . . 3-5

Storage Key . . . . . . . . . . . . . . . . . . . 3-8Protection . . . . . . . . . . . . . . . . . . . . . 3-8

Key-Controlled Protection . . . . . . . . . . 3-9Storage-Protection-Override Control . . 3-10Fetch-Protection-Override Control . . . 3-11

Access-List-Controlled Protection . . . . . 3-11Page Protection . . . . . . . . . . . . . . . 3-11Low-Address Protection . . . . . . . . . . . 3-11Suppression on Protection . . . . . . . . . 3-12

Reference Recording . . . . . . . . . . . . . . 3-14Change Recording . . . . . . . . . . . . . . . 3-14Prefixing . . . . . . . . . . . . . . . . . . . . . 3-15Address Spaces . . . . . . . . . . . . . . . . . 3-16

Changing to Different Address Spaces . 3-17Address-Space Number . . . . . . . . . 3-17

ASN Translation . . . . . . . . . . . . . . . . . 3-18ASN-Translation Controls . . . . . . . . . . 3-18

Control Register 14 . . . . . . . . . . . . 3-18Control Register 0 . . . . . . . . . . . . . 3-19

ASN-Translation Tables . . . . . . . . . . . 3-19ASN-First-Table Entries . . . . . . . . . 3-19ASN-Second-Table Entries . . . . . . . 3-19

ASN-Translation Process . . . . . . . . . . 3-21ASN-First-Table Lookup . . . . . . . . . 3-21ASN-Second-Table Lookup . . . . . . . 3-22Recognition of Exceptions during ASN

Translation . . . . . . . . . . . . . . . 3-23ASN Authorization . . . . . . . . . . . . . . . . 3-23

ASN-Authorization Controls . . . . . . . . . 3-23Control Register 4 . . . . . . . . . . . . . 3-24ASN-Second-Table Entry . . . . . . . . 3-24

Authority-Table Entries . . . . . . . . . . . 3-24ASN-Authorization Process . . . . . . . . . 3-24

Authority-Table Lookup . . . . . . . . . . 3-25Recognition of Exceptions during ASN

Authorization . . . . . . . . . . . . . 3-26

Copyright IBM Corp. 1990-2001 iii

Dynamic Address Translation . . . . . . . . . 3-26Translation Control . . . . . . . . . . . . . . 3-27

Translation Modes . . . . . . . . . . . . 3-28Control Register 0 . . . . . . . . . . . . . 3-28Control Register 1 . . . . . . . . . . . . . 3-28Control Register 7 . . . . . . . . . . . . . 3-29Control Register 13 . . . . . . . . . . . . 3-29

Translation Tables . . . . . . . . . . . . . . 3-30Segment-Table Entries . . . . . . . . . . 3-30Page-Table Entries . . . . . . . . . . . . 3-30Summary of Segment-Table and

Page-Table Sizes . . . . . . . . . . . 3-31Translation Process . . . . . . . . . . . . . 3-31

Effective Segment-Table Designation . 3-32Inspection of Control Register 0 . . . . 3-34Segment-Table Lookup . . . . . . . . . 3-34Page-Table Lookup . . . . . . . . . . . . 3-35Formation of the Real Address . . . . . 3-35Recognition of Exceptions during

Translation . . . . . . . . . . . . . . . 3-35Translation-Lookaside Buffer . . . . . . . . 3-35

TLB Structure . . . . . . . . . . . . . . . 3-36Formation of TLB Entries . . . . . . . . 3-36Use of TLB Entries . . . . . . . . . . . . 3-37Modification of Translation Tables . . . 3-38

Address Summary . . . . . . . . . . . . . . . . 3-40Addresses Translated . . . . . . . . . . . . 3-40Handling of Addresses . . . . . . . . . . . 3-40

Assigned Storage Locations . . . . . . . . . . 3-43

Chapter 4. Control . . . . . . . . . . . . . . 4-1Stopped, Operating, Load, and Check-Stop

States . . . . . . . . . . . . . . . . . . . . . . 4-1Stopped State . . . . . . . . . . . . . . . . 4-2Operating State . . . . . . . . . . . . . . . . 4-2Load State . . . . . . . . . . . . . . . . . . 4-2Check-Stop State . . . . . . . . . . . . . . 4-3

Program-Status Word . . . . . . . . . . . . . . 4-3Program-Status-Word Format . . . . . . . 4-5

Control Registers . . . . . . . . . . . . . . . . 4-6Tracing . . . . . . . . . . . . . . . . . . . . . . 4-10

Control-Register Allocation . . . . . . . . . 4-10Trace Entries . . . . . . . . . . . . . . . . . 4-11Operation . . . . . . . . . . . . . . . . . . . 4-14

Program-Event Recording . . . . . . . . . . . 4-14Control-Register Allocation and

Segment-Table Designation . . . . . . 4-15Operation . . . . . . . . . . . . . . . . . . . 4-16

Identification of Cause . . . . . . . . . . 4-17Priority of Indication . . . . . . . . . . . . 4-20

Storage-Area Designation . . . . . . . . . . 4-21PER Events . . . . . . . . . . . . . . . . . . 4-22

Successful Branching . . . . . . . . . . . 4-22Instruction Fetching . . . . . . . . . . . . 4-22

Storage Alteration . . . . . . . . . . . . . 4-22General-Register Alteration . . . . . . . 4-23Store Using Real Address . . . . . . . . 4-24

Indication of PER Events Concurrentlywith Other Interruption Conditions . . . 4-24

Timing . . . . . . . . . . . . . . . . . . . . . . . 4-25Time-of-Day Clock . . . . . . . . . . . . . . 4-27

Format . . . . . . . . . . . . . . . . . . . 4-27States . . . . . . . . . . . . . . . . . . . . 4-27Changes in Clock State . . . . . . . . . 4-28Setting and Inspecting the Clock . . . . 4-28TOD Programmable Register . . . . . . 4-29

TOD-Clock Synchronization . . . . . . . . . 4-31Clock Comparator . . . . . . . . . . . . . . 4-32CPU Timer . . . . . . . . . . . . . . . . . . 4-33

Externally Initiated Functions . . . . . . . . . 4-34Resets . . . . . . . . . . . . . . . . . . . . . 4-34

CPU Reset . . . . . . . . . . . . . . . . . 4-37Initial CPU Reset . . . . . . . . . . . . . 4-38Subsystem Reset . . . . . . . . . . . . . 4-38Clear Reset . . . . . . . . . . . . . . . . 4-38Power-On Reset . . . . . . . . . . . . . 4-39

Initial Program Loading . . . . . . . . . . . 4-39Store Status . . . . . . . . . . . . . . . . . . 4-40

Multiprocessing . . . . . . . . . . . . . . . . . 4-41Shared Main Storage . . . . . . . . . . . . 4-41CPU-Address Identification . . . . . . . . . 4-41

CPU Signaling and Response . . . . . . . . . 4-41Signal-Processor Orders . . . . . . . . . . 4-42Conditions Determining Response . . . . . 4-46

Conditions Precluding Interpretation ofthe Order Code . . . . . . . . . . . . 4-46

Status Bits . . . . . . . . . . . . . . . . . 4-47

Chapter 5. Program Execution . . . . . . . 5-1Instructions . . . . . . . . . . . . . . . . . . . . 5-2

Operands . . . . . . . . . . . . . . . . . . . 5-3Instruction Formats . . . . . . . . . . . . . . 5-3

Register Operands . . . . . . . . . . . . 5-6Immediate Operands . . . . . . . . . . . 5-6Storage Operands . . . . . . . . . . . . 5-6

Address Generation . . . . . . . . . . . . . . . 5-7Bimodal Addressing . . . . . . . . . . . . . 5-7Sequential Instruction-Address Generation . 5-7Operand-Address Generation . . . . . . . 5-7

Formation of the Intermediate Value . . 5-7Formation of the Operand Address . . . 5-8

Branch-Address Generation . . . . . . . . 5-8Formation of the Intermediate Value . . 5-8Formation of the Branch Address . . . . 5-9

Instruction Execution and Sequencing . . . . 5-9Decision Making . . . . . . . . . . . . . . . 5-10Loop Control . . . . . . . . . . . . . . . . . 5-10

iv ESA/390 Principles of Operation

Subroutine Linkage without the LinkageStack . . . . . . . . . . . . . . . . . . . 5-10

Interruptions . . . . . . . . . . . . . . . . . . 5-16Types of Instruction Ending . . . . . . . . . 5-16

Completion . . . . . . . . . . . . . . . . . 5-16Suppression . . . . . . . . . . . . . . . . 5-16Nullification . . . . . . . . . . . . . . . . . 5-17Termination . . . . . . . . . . . . . . . . 5-17

Interruptible Instructions . . . . . . . . . . . 5-17Point of Interruption . . . . . . . . . . . . 5-17Unit of Operation . . . . . . . . . . . . . 5-17Execution of Interruptible Instructions . 5-17Condition-Code Alternative to

Interruptibility . . . . . . . . . . . . . 5-19Exceptions to Nullification and

Suppression . . . . . . . . . . . . . . . 5-19Storage Change and Restoration for

DAT-Associated Access Exceptions 5-20Modification of DAT-Table Entries . . . 5-20Trial Execution for Editing Instructions

and Translate Instruction . . . . . . 5-21Authorization Mechanisms . . . . . . . . . . . 5-21

Mode Requirements . . . . . . . . . . . 5-21Extraction-Authority Control . . . . . . . 5-22PSW-Key Mask . . . . . . . . . . . . . . 5-22Secondary-Space Control . . . . . . . . 5-22Subsystem-Linkage Control . . . . . . . 5-22ASN-Translation Control . . . . . . . . . 5-22Authorization Index . . . . . . . . . . . . 5-23Program-Call-Fast Control . . . . . . . . 5-23Access-Register and Linkage-Stack

Mechanisms . . . . . . . . . . . . . . 5-23PC-Number Translation . . . . . . . . . . . . . 5-27

PC-Number Translation Control . . . . . . 5-27Control Register 0 . . . . . . . . . . . . . 5-27Control Register 5 . . . . . . . . . . . . . 5-27

PC-Number Translation Tables . . . . . . . 5-28Linkage-Table Entries . . . . . . . . . . 5-28Entry-Table Entries . . . . . . . . . . . . 5-28

PC-Number-Translation Process . . . . . . 5-30Obtaining the Linkage-Table

Designation . . . . . . . . . . . . . . 5-31Linkage-Table Lookup . . . . . . . . . . 5-32Entry-Table Lookup . . . . . . . . . . . . 5-32Recognition of Exceptions during

PC-Number Translation . . . . . . . 5-32Home Address Space . . . . . . . . . . . . . 5-33Access-Register Introduction . . . . . . . . . . 5-33

Summary . . . . . . . . . . . . . . . . . . . 5-34Access-Register Functions . . . . . . . . . 5-34

Access-Register-Specified AddressSpaces . . . . . . . . . . . . . . . . . 5-34

Access-Register Instructions . . . . . . 5-41Access-Register Translation . . . . . . . . . . 5-42

Access-Register-Translation Control . . . . 5-42Address-Space-Function Control . . . . 5-42Control Register 2 . . . . . . . . . . . . . 5-43Control Register 5 . . . . . . . . . . . . . 5-43Control Register 8 . . . . . . . . . . . . . 5-43

Access Registers . . . . . . . . . . . . . . . 5-43Access-Register-Translation Tables . . . . 5-44

Dispatchable-Unit-Control Table andAccess-List Designations . . . . . . 5-44

Access-List Entries . . . . . . . . . . . . 5-46Extended ASN-Second-Table Entries . 5-47

Access-Register-Translation Process . . . 5-48Selecting the Access-List-Entry Token . 5-49Obtaining the Primary or Secondary

Segment-Table Designation . . . . . 5-49Checking the First Byte of the ALET . . 5-49Obtaining the Effective Access-List

Designation . . . . . . . . . . . . . . 5-51Access-List Lookup . . . . . . . . . . . . 5-51Locating the ASN-Second-Table Entry . 5-52Authorizing the Use of the Access-List

Entry . . . . . . . . . . . . . . . . . . 5-52Checking for Access-List-Controlled

Protection . . . . . . . . . . . . . . . 5-53Obtaining the Segment-Table

Designation from theASN-Second-Table Entry . . . . . . 5-53

Recognition of Exceptions duringAccess-Register Translation . . . . 5-53

ART-Lookaside Buffer . . . . . . . . . . . . 5-53ALB Structure . . . . . . . . . . . . . . . 5-53Formation of ALB Entries . . . . . . . . 5-53Use of ALB Entries . . . . . . . . . . . . 5-54Modification of ART Tables . . . . . . . 5-55

Subspace Groups . . . . . . . . . . . . . . . . 5-55Subspace-Group Tables . . . . . . . . . . 5-55

Subspace-Group Dispatchable-UnitControl Table . . . . . . . . . . . . . 5-55

Subspace-Group ASN-Second-TableEntries . . . . . . . . . . . . . . . . . 5-57

Subspace-Replacement Operations . . . . 5-58Linkage-Stack Introduction . . . . . . . . . . . 5-59

Summary . . . . . . . . . . . . . . . . . . . 5-60Linkage-Stack Functions . . . . . . . . . . 5-60

Transferring Program Control . . . . . . 5-60Branching Using the Linkage Stack . . 5-62Adding and Retrieving Information . . . 5-63Testing Authorization . . . . . . . . . . . 5-63Program-Problem Analysis . . . . . . . . 5-64

Extended Entry-Table Entries . . . . . . . . . 5-64Linkage-Stack Operations . . . . . . . . . . . 5-66

Linkage-Stack-Operations Control . . . . . 5-68Control Register 0 . . . . . . . . . . . . . 5-68Control Register 15 . . . . . . . . . . . . 5-68

Contents v

Linkage Stack . . . . . . . . . . . . . . . . . 5-68Entry Descriptors . . . . . . . . . . . . . 5-68Header Entries . . . . . . . . . . . . . . 5-69Trailer Entries . . . . . . . . . . . . . . . 5-70State Entries . . . . . . . . . . . . . . . . 5-71

Stacking Process . . . . . . . . . . . . . . . 5-73Locating Space for a New Entry . . . . 5-73Forming the New Entry . . . . . . . . . . 5-74Updating the Current Entry . . . . . . . 5-75Updating Control Register 15 . . . . . . 5-75Recognition of Exceptions during the

Stacking Process . . . . . . . . . . . 5-75Unstacking Process . . . . . . . . . . . . . 5-75

Locating the Current Entry andProcessing a Header Entry . . . . . 5-76

Checking for a State Entry . . . . . . . . 5-77Restoring Information . . . . . . . . . . . 5-77Updating the Preceding Entry . . . . . . 5-77Updating Control Register 15 . . . . . . 5-77Recognition of Exceptions during the

Unstacking Process . . . . . . . . . 5-77Sequence of Storage References . . . . . . . 5-78

Conceptual Sequence . . . . . . . . . . 5-78Overlapped Operation of Instruction

Execution . . . . . . . . . . . . . . . 5-79Divisible Instruction Execution . . . . . . 5-79

Interlocks for Virtual-Storage References . 5-79Interlocks between Instructions . . . . . 5-80Interlocks within a Single Instruction . . 5-80

Instruction Fetching . . . . . . . . . . . . . 5-82ART-Table and DAT-Table Fetches . . . . 5-83Storage-Key Accesses . . . . . . . . . . . 5-84Storage-Operand References . . . . . . . 5-84

Storage-Operand Fetch References . . 5-85Storage-Operand Store References . . 5-85Storage-Operand Update References . 5-85

Storage-Operand Consistency . . . . . . . 5-86Single-Access References . . . . . . . . 5-86Multiple-Access References . . . . . . . 5-87Block-Concurrent References . . . . . . 5-88Consistency Specification . . . . . . . . 5-88

Relation between Operand Accesses . . . 5-89Other Storage References . . . . . . . . . 5-90

Serialization . . . . . . . . . . . . . . . . . . . 5-90CPU Serialization . . . . . . . . . . . . . . 5-90Channel-Program Serialization . . . . . . . 5-91

Chapter 6. Interruptions . . . . . . . . . . . 6-1Interruption Action . . . . . . . . . . . . . . . . 6-2

Interruption Code . . . . . . . . . . . . . . . 6-5Enabling and Disabling . . . . . . . . . . . 6-6Handling of Floating Interruption Conditions 6-6Instruction-Length Code . . . . . . . . . . . 6-7

Zero ILC . . . . . . . . . . . . . . . . . . 6-7

ILC on Instruction-Fetching Exceptions . 6-7Exceptions Associated with the PSW . . . 6-9

Early Exception Recognition . . . . . . . 6-9Late Exception Recognition . . . . . . . 6-9

External Interruption . . . . . . . . . . . . . . . 6-10Clock Comparator . . . . . . . . . . . . . . 6-11CPU Timer . . . . . . . . . . . . . . . . . . 6-11Emergency Signal . . . . . . . . . . . . . . 6-11ETR . . . . . . . . . . . . . . . . . . . . . . 6-12External Call . . . . . . . . . . . . . . . . . 6-12Interrupt Key . . . . . . . . . . . . . . . . . 6-12Malfunction Alert . . . . . . . . . . . . . . . 6-12Service Signal . . . . . . . . . . . . . . . . 6-12TOD-Clock Sync Check . . . . . . . . . . . 6-13

I/O Interruption . . . . . . . . . . . . . . . . . . 6-13Machine-Check Interruption . . . . . . . . . . 6-14Program Interruption . . . . . . . . . . . . . . 6-14

Exception-Extension Code . . . . . . . . . 6-15Data-Exception Code (DXC) . . . . . . . . 6-15

Priority of Program Interruptions forData Exceptions . . . . . . . . . . . 6-15

Program-Interruption Conditions . . . . . . 6-16Addressing Exception . . . . . . . . . . 6-16AFX-Translation Exception . . . . . . . . 6-19ALEN-Translation Exception . . . . . . . 6-19ALE-Sequence Exception . . . . . . . . 6-19ALET-Specification Exception . . . . . . 6-19ASN-Translation-Specification

Exception . . . . . . . . . . . . . . . 6-19ASTE-Sequence Exception . . . . . . . 6-20ASTE-Validity Exception . . . . . . . . . 6-20ASX-Translation Exception . . . . . . . 6-21

| Crypto-Operation Exception . . . . . . . 6-21Data Exception . . . . . . . . . . . . . . 6-21Decimal-Divide Exception . . . . . . . . 6-22Decimal-Overflow Exception . . . . . . . 6-22Execute Exception . . . . . . . . . . . . 6-22EX-Translation Exception . . . . . . . . 6-22Extended-Authority Exception . . . . . . 6-22Fixed-Point-Divide Exception . . . . . . 6-23Fixed-Point-Overflow Exception . . . . . 6-23HFP-Divide Exception . . . . . . . . . . 6-23HFP-Exponent-Overflow Exception . . . 6-23HFP-Exponent-Underflow Exception . . 6-23HFP-Significance Exception . . . . . . . 6-24HFP-Square-Root Exception . . . . . . 6-24LX-Translation Exception . . . . . . . . 6-24Monitor Event . . . . . . . . . . . . . . . 6-24Operand Exception . . . . . . . . . . . . 6-25Operation Exception . . . . . . . . . . . 6-25Page-Translation Exception . . . . . . . 6-26PC-Translation-Specification Exception 6-27PER Event . . . . . . . . . . . . . . . . . 6-27Primary-Authority Exception . . . . . . . 6-27

vi ESA/390 Principles of Operation

Privileged-Operation Exception . . . . . 6-27Protection Exception . . . . . . . . . . . 6-28Secondary-Authority Exception . . . . . 6-29Segment-Translation Exception . . . . . 6-29Space-Switch Event . . . . . . . . . . . 6-29Special-Operation Exception . . . . . . 6-30Specification Exception . . . . . . . . . . 6-31Stack-Empty Exception . . . . . . . . . . 6-32Stack-Full Exception . . . . . . . . . . . 6-33Stack-Operation Exception . . . . . . . . 6-33Stack-Specification Exception . . . . . . 6-33Stack-Type Exception . . . . . . . . . . 6-33Trace-Table Exception . . . . . . . . . . 6-33Translation-Specification Exception . . . 6-34Unnormalized-Operand Exception . . . 6-34Vector-Operation Exception . . . . . . . 6-34

Collective Program-Interruption Names . . 6-35Recognition of Access Exceptions . . . . . 6-35Multiple Program-Interruption Conditions . 6-38

Access Exceptions . . . . . . . . . . . . 6-40ASN-Translation Exceptions . . . . . . . 6-45Subspace-Replacement Exceptions . . 6-45Trace Exceptions . . . . . . . . . . . . . 6-45

Restart Interruption . . . . . . . . . . . . . . . 6-46Supervisor-Call Interruption . . . . . . . . . . 6-46Priority of Interruptions . . . . . . . . . . . . . 6-46

Chapter 7. General Instructions . . . . . . 7-1Data Format . . . . . . . . . . . . . . . . . . . 7-2Binary-Integer Representation . . . . . . . . . 7-2Binary Arithmetic . . . . . . . . . . . . . . . . 7-3

Signed Binary Arithmetic . . . . . . . . . . 7-3Addition and Subtraction . . . . . . . . . 7-3Fixed-Point Overflow . . . . . . . . . . . 7-3

Unsigned Binary Arithmetic . . . . . . . . . 7-4Signed and Logical Comparison . . . . . . . . 7-4Instructions . . . . . . . . . . . . . . . . . . . . 7-5

ADD . . . . . . . . . . . . . . . . . . . . . . 7-12ADD HALFWORD . . . . . . . . . . . . . . 7-12ADD HALFWORD IMMEDIATE . . . . . . 7-12ADD LOGICAL . . . . . . . . . . . . . . . . 7-13

| ADD LOGICAL WITH CARRY . . . . . . . 7-13AND . . . . . . . . . . . . . . . . . . . . . . 7-14BRANCH AND LINK . . . . . . . . . . . . . 7-14BRANCH AND SAVE . . . . . . . . . . . . 7-15BRANCH AND SAVE AND SET MODE . 7-16BRANCH AND SET MODE . . . . . . . . . 7-16BRANCH ON CONDITION . . . . . . . . . 7-17BRANCH ON COUNT . . . . . . . . . . . . 7-18BRANCH ON INDEX HIGH . . . . . . . . . 7-18BRANCH ON INDEX LOW OR EQUAL . . 7-18BRANCH RELATIVE AND SAVE . . . . . 7-19

| BRANCH RELATIVE AND SAVE LONG . 7-19BRANCH RELATIVE ON CONDITION . . 7-20

| BRANCH RELATIVE ON CONDITION| LONG . . . . . . . . . . . . . . . . . . . 7-20

BRANCH RELATIVE ON COUNT . . . . . 7-21BRANCH RELATIVE ON INDEX HIGH . . 7-21BRANCH RELATIVE ON INDEX LOW

OR EQUAL . . . . . . . . . . . . . . . . 7-21CHECKSUM . . . . . . . . . . . . . . . . . 7-22COMPARE . . . . . . . . . . . . . . . . . . 7-26COMPARE AND FORM CODEWORD . . 7-26COMPARE AND SWAP . . . . . . . . . . . 7-30COMPARE DOUBLE AND SWAP . . . . . 7-30COMPARE HALFWORD . . . . . . . . . . 7-32COMPARE HALFWORD IMMEDIATE . . 7-32COMPARE LOGICAL . . . . . . . . . . . . 7-32COMPARE LOGICAL CHARACTERS

UNDER MASK . . . . . . . . . . . . . . 7-33COMPARE LOGICAL LONG . . . . . . . . 7-33COMPARE LOGICAL LONG EXTENDED 7-35

| COMPARE LOGICAL LONG UNICODE . 7-37COMPARE LOGICAL STRING . . . . . . . 7-40COMPARE UNTIL SUBSTRING EQUAL . 7-41CONVERT TO BINARY . . . . . . . . . . . 7-44CONVERT TO DECIMAL . . . . . . . . . . 7-45CONVERT UNICODE TO UTF-8 . . . . . 7-45CONVERT UTF-8 TO UNICODE . . . . . 7-47COPY ACCESS . . . . . . . . . . . . . . . 7-50DIVIDE . . . . . . . . . . . . . . . . . . . . 7-50

| DIVIDE LOGICAL . . . . . . . . . . . . . . 7-51EXCLUSIVE OR . . . . . . . . . . . . . . . 7-51EXECUTE . . . . . . . . . . . . . . . . . . . 7-52EXTRACT ACCESS . . . . . . . . . . . . . 7-53

| EXTRACT PSW . . . . . . . . . . . . . . . 7-53INSERT CHARACTER . . . . . . . . . . . 7-54INSERT CHARACTERS UNDER MASK . 7-54INSERT PROGRAM MASK . . . . . . . . . 7-54LOAD . . . . . . . . . . . . . . . . . . . . . 7-55LOAD ACCESS MULTIPLE . . . . . . . . . 7-55LOAD ADDRESS . . . . . . . . . . . . . . 7-55LOAD ADDRESS EXTENDED . . . . . . . 7-56

| LOAD ADDRESS RELATIVE LONG . . . 7-56LOAD AND TEST . . . . . . . . . . . . . . 7-57LOAD COMPLEMENT . . . . . . . . . . . . 7-57LOAD HALFWORD . . . . . . . . . . . . . 7-57LOAD HALFWORD IMMEDIATE . . . . . 7-58LOAD MULTIPLE . . . . . . . . . . . . . . 7-58LOAD NEGATIVE . . . . . . . . . . . . . . 7-58LOAD POSITIVE . . . . . . . . . . . . . . . 7-58

| LOAD REVERSED . . . . . . . . . . . . . . 7-59MONITOR CALL . . . . . . . . . . . . . . . 7-59MOVE . . . . . . . . . . . . . . . . . . . . . 7-60MOVE INVERSE . . . . . . . . . . . . . . . 7-61MOVE LONG . . . . . . . . . . . . . . . . . 7-61MOVE LONG EXTENDED . . . . . . . . . 7-65

| MOVE LONG UNICODE . . . . . . . . . . 7-68

Contents vii

MOVE NUMERICS . . . . . . . . . . . . . . 7-71MOVE PAGE (Facility 1) . . . . . . . . . . 7-71MOVE STRING . . . . . . . . . . . . . . . . 7-73MOVE WITH OFFSET . . . . . . . . . . . . 7-74MOVE ZONES . . . . . . . . . . . . . . . . 7-75MULTIPLY . . . . . . . . . . . . . . . . . . 7-76MULTIPLY HALFWORD . . . . . . . . . . 7-76MULTIPLY HALFWORD IMMEDIATE . . . 7-76

| MULTIPLY LOGICAL . . . . . . . . . . . . 7-77MULTIPLY SINGLE . . . . . . . . . . . . . 7-77OR . . . . . . . . . . . . . . . . . . . . . . . 7-77PACK . . . . . . . . . . . . . . . . . . . . . 7-78

| PACK ASCII . . . . . . . . . . . . . . . . . 7-79| PACK UNICODE . . . . . . . . . . . . . . . 7-80

PERFORM LOCKED OPERATION . . . . 7-81| ROTATE LEFT SINGLE LOGICAL . . . . 7-93

SEARCH STRING . . . . . . . . . . . . . . 7-93SET ACCESS . . . . . . . . . . . . . . . . 7-94

| SET ADDRESSING MODE . . . . . . . . . 7-94SET PROGRAM MASK . . . . . . . . . . . 7-95SHIFT LEFT DOUBLE . . . . . . . . . . . . 7-95SHIFT LEFT DOUBLE LOGICAL . . . . . 7-96SHIFT LEFT SINGLE . . . . . . . . . . . . 7-96SHIFT LEFT SINGLE LOGICAL . . . . . . 7-97SHIFT RIGHT DOUBLE . . . . . . . . . . . 7-97SHIFT RIGHT DOUBLE LOGICAL . . . . 7-98SHIFT RIGHT SINGLE . . . . . . . . . . . 7-98SHIFT RIGHT SINGLE LOGICAL . . . . . 7-98STORE . . . . . . . . . . . . . . . . . . . . 7-99STORE ACCESS MULTIPLE . . . . . . . . 7-99STORE CHARACTER . . . . . . . . . . . . 7-99STORE CHARACTERS UNDER MASK . 7-99STORE CLOCK . . . . . . . . . . . . . . 7-100STORE CLOCK EXTENDED . . . . . . . 7-101STORE HALFWORD . . . . . . . . . . . 7-103STORE MULTIPLE . . . . . . . . . . . . 7-103

| STORE REVERSED . . . . . . . . . . . . 7-103SUBTRACT . . . . . . . . . . . . . . . . . 7-104SUBTRACT HALFWORD . . . . . . . . . 7-104SUBTRACT LOGICAL . . . . . . . . . . . 7-104

| SUBTRACT LOGICAL WITH BORROW . 7-105SUPERVISOR CALL . . . . . . . . . . . 7-106

| TEST ADDRESSING MODE . . . . . . . 7-106TEST AND SET . . . . . . . . . . . . . . 7-106TEST UNDER MASK . . . . . . . . . . . 7-107TEST UNDER MASK HIGH . . . . . . . 7-107TEST UNDER MASK LOW . . . . . . . . 7-107TRANSLATE . . . . . . . . . . . . . . . . 7-108TRANSLATE AND TEST . . . . . . . . . 7-109TRANSLATE EXTENDED . . . . . . . . 7-109

| TRANSLATE ONE TO ONE . . . . . . . 7-111| TRANSLATE ONE TO TWO . . . . . . . 7-112| TRANSLATE TWO TO ONE . . . . . . . 7-112| TRANSLATE TWO TO TWO . . . . . . . 7-112

UNPACK . . . . . . . . . . . . . . . . . . 7-116| UNPACK ASCII . . . . . . . . . . . . . . 7-116| UNPACK UNICODE . . . . . . . . . . . . 7-117

UPDATE TREE . . . . . . . . . . . . . . . 7-118

Chapter 8. Decimal Instructions . . . . . . 8-1Decimal-Number Formats . . . . . . . . . . . 8-1

Zoned Format . . . . . . . . . . . . . . . . . 8-1Packed Format . . . . . . . . . . . . . . . . 8-1Decimal Codes . . . . . . . . . . . . . . . . 8-2

Decimal Operations . . . . . . . . . . . . . . . 8-2Decimal-Arithmetic Instructions . . . . . . . 8-2Editing Instructions . . . . . . . . . . . . . . 8-3Execution of Decimal Instructions . . . . . 8-3Other Instructions for Decimal Operands . 8-3Decimal-Operand Data Exception . . . . . 8-4

Instructions . . . . . . . . . . . . . . . . . . . . 8-4ADD DECIMAL . . . . . . . . . . . . . . . . 8-6COMPARE DECIMAL . . . . . . . . . . . . 8-6DIVIDE DECIMAL . . . . . . . . . . . . . . 8-7EDIT . . . . . . . . . . . . . . . . . . . . . . 8-7EDIT AND MARK . . . . . . . . . . . . . . 8-12MULTIPLY DECIMAL . . . . . . . . . . . . 8-12SHIFT AND ROUND DECIMAL . . . . . . 8-13SUBTRACT DECIMAL . . . . . . . . . . . 8-14

| TEST DECIMAL . . . . . . . . . . . . . . . 8-14ZERO AND ADD . . . . . . . . . . . . . . . 8-14

Chapter 9. Floating-Point Overview andSupport Instructions . . . . . . . . . . . . 9-1

Registers And Controls . . . . . . . . . . . . . 9-2Floating-Point Registers . . . . . . . . . . . 9-2

Additional Floating-Point (AFP)Registers . . . . . . . . . . . . . . . . 9-2

Valid Floating-Point-RegisterDesignations . . . . . . . . . . . . . . 9-2

Floating-Point-Control (FPC) Register . . . 9-2AFP-Register-Control Bit . . . . . . . . . . 9-3Explicit Rounding Methods . . . . . . . . . 9-3

Summary of Rounding Action . . . . . . 9-3Comparison of BFP and HFP Number

Representations . . . . . . . . . . . . . . . . 9-4BFP and HFP Number Ranges . . . . . . 9-4Equivalent BFP and HFP Number

Representations . . . . . . . . . . . . . . 9-4Instructions . . . . . . . . . . . . . . . . . . . . 9-8

CONVERT BFP TO HFP . . . . . . . . . . 9-10CONVERT HFP TO BFP . . . . . . . . . . 9-11LOAD . . . . . . . . . . . . . . . . . . . . . 9-12LOAD ZERO . . . . . . . . . . . . . . . . . 9-13STORE . . . . . . . . . . . . . . . . . . . . 9-13

Summary of All Floating-Point Instructions . . 9-13

Chapter 10. Control Instructions . . . . . . 10-1

viii ESA/390 Principles of Operation

BRANCH AND SET AUTHORITY . . . . . 10-6BRANCH AND STACK . . . . . . . . . . . 10-9BRANCH IN SUBSPACE GROUP . . . . 10-12

| COMPARE AND SWAP AND PURGE . 10-16DIAGNOSE . . . . . . . . . . . . . . . . . 10-18EXTRACT PRIMARY ASN . . . . . . . . 10-18EXTRACT SECONDARY ASN . . . . . . 10-19EXTRACT STACKED REGISTERS . . . 10-19EXTRACT STACKED STATE . . . . . . 10-21INSERT ADDRESS SPACE CONTROL . 10-23INSERT PSW KEY . . . . . . . . . . . . . 10-24INSERT STORAGE KEY EXTENDED . 10-24INSERT VIRTUAL STORAGE KEY . . . 10-25INVALIDATE PAGE TABLE ENTRY . . . 10-26LOAD ADDRESS SPACE

PARAMETERS . . . . . . . . . . . . . 10-27LOAD CONTROL . . . . . . . . . . . . . 10-37LOAD PSW . . . . . . . . . . . . . . . . . 10-37LOAD REAL ADDRESS . . . . . . . . . . 10-38LOAD USING REAL ADDRESS . . . . . 10-40MODIFY STACKED STATE . . . . . . . 10-40MOVE PAGE (Facility 2) . . . . . . . . . 10-42MOVE TO PRIMARY . . . . . . . . . . . 10-45MOVE TO SECONDARY . . . . . . . . . 10-45MOVE WITH DESTINATION KEY . . . . 10-47MOVE WITH KEY . . . . . . . . . . . . . 10-47MOVE WITH SOURCE KEY . . . . . . . 10-48

| PAGE IN . . . . . . . . . . . . . . . . . . 10-50| PAGE OUT . . . . . . . . . . . . . . . . . 10-51

PROGRAM CALL . . . . . . . . . . . . . 10-52PROGRAM CALL FAST . . . . . . . . . 10-63PROGRAM RETURN . . . . . . . . . . . 10-66PROGRAM TRANSFER . . . . . . . . . . 10-70PURGE ALB . . . . . . . . . . . . . . . . 10-76PURGE TLB . . . . . . . . . . . . . . . . 10-76RESET REFERENCE BIT EXTENDED . 10-76RESUME PROGRAM . . . . . . . . . . . 10-77SET ADDRESS SPACE CONTROL . . . 10-79SET ADDRESS SPACE CONTROL

FAST . . . . . . . . . . . . . . . . . . 10-79SET CLOCK . . . . . . . . . . . . . . . . 10-80SET CLOCK COMPARATOR . . . . . . 10-81SET CLOCK PROGRAMMABLE FIELD . 10-82SET CPU TIMER . . . . . . . . . . . . . . 10-82SET PREFIX . . . . . . . . . . . . . . . . 10-82SET PSW KEY FROM ADDRESS . . . . 10-83SET SECONDARY ASN . . . . . . . . . 10-83SET STORAGE KEY EXTENDED . . . . 10-87SET SYSTEM MASK . . . . . . . . . . . 10-87SIGNAL PROCESSOR . . . . . . . . . . 10-87STORE CLOCK COMPARATOR . . . . 10-89STORE CONTROL . . . . . . . . . . . . 10-89STORE CPU ADDRESS . . . . . . . . . 10-89STORE CPU ID . . . . . . . . . . . . . . 10-90

STORE CPU TIMER . . . . . . . . . . . . 10-91| STORE FACILITY LIST . . . . . . . . . . 10-91

STORE PREFIX . . . . . . . . . . . . . . 10-91STORE SYSTEM INFORMATION . . . . 10-92STORE THEN AND SYSTEM MASK . 10-101STORE THEN OR SYSTEM MASK . . 10-102STORE USING REAL ADDRESS . . . 10-102TEST ACCESS . . . . . . . . . . . . . . 10-103TEST BLOCK . . . . . . . . . . . . . . . 10-104TEST PROTECTION . . . . . . . . . . 10-107TRACE . . . . . . . . . . . . . . . . . . 10-110TRAP . . . . . . . . . . . . . . . . . . . 10-110

Chapter 11. Machine-Check Handling . . . 11-1Machine-Check Detection . . . . . . . . . . . 11-2Correction of Machine Malfunctions . . . . . . 11-2

Error Checking and Correction . . . . . . . 11-2CPU Retry . . . . . . . . . . . . . . . . . . . 11-2

Effects of CPU Retry . . . . . . . . . . . 11-3Checkpoint Synchronization . . . . . . . 11-3Handling of Machine Checks during

Checkpoint Synchronization . . . . . 11-3Checkpoint-Synchronization Operations 11-3Checkpoint-Synchronization Action . . . 11-4

Channel-Subsystem Recovery . . . . . . . 11-4Unit Deletion . . . . . . . . . . . . . . . . . 11-4

Handling of Machine Checks . . . . . . . . . 11-5Validation . . . . . . . . . . . . . . . . . . . 11-5Invalid CBC in Storage . . . . . . . . . . . 11-6

Programmed Validation of Storage . . . 11-7Invalid CBC in Storage Keys . . . . . . . . 11-7Invalid CBC in Registers . . . . . . . . . 11-10

Check-Stop State . . . . . . . . . . . . . . . 11-11System Check Stop . . . . . . . . . . . 11-11

Machine-Check Interruption . . . . . . . . . 11-11Exigent Conditions . . . . . . . . . . . . . 11-11Repressible Conditions . . . . . . . . . . 11-12Interruption Action . . . . . . . . . . . . . 11-12Point of Interruption . . . . . . . . . . . . 11-14

Machine-Check-Interruption Code . . . . . . 11-15Subclass . . . . . . . . . . . . . . . . . . . 11-16

System Damage . . . . . . . . . . . . 11-16Instruction-Processing Damage . . . . 11-17System Recovery . . . . . . . . . . . . 11-17Timing-Facility Damage . . . . . . . . 11-17External Damage . . . . . . . . . . . . 11-18Vector-Facility Failure . . . . . . . . . 11-18Degradation . . . . . . . . . . . . . . . 11-18Warning . . . . . . . . . . . . . . . . . 11-18Channel Report Pending . . . . . . . . 11-18Service-Processor Damage . . . . . . 11-19Channel-Subsystem Damage . . . . . 11-19

Subclass Modifiers . . . . . . . . . . . . . 11-19Vector-Facility Source . . . . . . . . . 11-19

Contents ix

Backed Up . . . . . . . . . . . . . . . . 11-19Delayed Access Exception . . . . . . . 11-19Ancillary Report . . . . . . . . . . . . . 11-19

SynchronousMachine-Check-Interruption Conditions 11-20

Processing Backup . . . . . . . . . . . 11-20Processing Damage . . . . . . . . . . 11-20

Storage Errors . . . . . . . . . . . . . . . 11-20Storage Error Uncorrected . . . . . . . 11-21Storage Error Corrected . . . . . . . . 11-21Storage-Key Error Uncorrected . . . . 11-21Storage Degradation . . . . . . . . . . 11-21Indirect Storage Error . . . . . . . . . . 11-21

Machine-Check Interruption-CodeValidity Bits . . . . . . . . . . . . . . . 11-22

PSW-MWP Validity . . . . . . . . . . . 11-22PSW Mask and Key Validity . . . . . . 11-22PSW Program-Mask and

Condition-Code Validity . . . . . . 11-22PSW-Instruction-Address Validity . . . 11-22Failing-Storage-Address Validity . . . 11-22External-Damage-Code Validity . . . . 11-22Floating-Point-Register Validity . . . . 11-23General-Register Validity . . . . . . . . 11-23Control-Register Validity . . . . . . . . 11-23Storage Logical Validity . . . . . . . . 11-23Access-Register Validity . . . . . . . . 11-23Extended-Floating-Point-Register

Validity . . . . . . . . . . . . . . . . 11-23CPU-Timer Validity . . . . . . . . . . . 11-23Clock-Comparator Validity . . . . . . . 11-23

Machine-Check Extended InterruptionInformation . . . . . . . . . . . . . . . . . 11-24

Register Save Areas . . . . . . . . . . . . 11-24Machine-Check Extended Save Area . . 11-24External-Damage Code . . . . . . . . . . 11-24Failing-Storage Address . . . . . . . . . . 11-25

Handling of Machine-Check Conditions . . 11-25Floating Interruption Conditions . . . . . 11-25

Floating Machine-Check-InterruptionConditions . . . . . . . . . . . . . . 11-26

Floating I/O Interruptions . . . . . . . . 11-26Machine-Check Masking . . . . . . . . . . . 11-26

Channel-Report-Pending SubclassMask . . . . . . . . . . . . . . . . . 11-26

Recovery Subclass Mask . . . . . . . 11-26Degradation Subclass Mask . . . . . . 11-26External-Damage Subclass Mask . . . 11-26Warning Subclass Mask . . . . . . . . 11-26

Machine-Check Logout . . . . . . . . . . . . 11-27Summary of Machine-Check Masking . . . 11-27

Chapter 12. Operator Facilities . . . . . . . 12-1Manual Operation . . . . . . . . . . . . . . . . 12-1

Basic Operator Facilities . . . . . . . . . . . . 12-1Address-Compare Controls . . . . . . . . . 12-1Alter-and-Display Controls . . . . . . . . . 12-2Architectural-Mode Indicator . . . . . . . . 12-2Architectural-Mode-Selection Controls . . . 12-2Check-Stop Indicator . . . . . . . . . . . . 12-2IML Controls . . . . . . . . . . . . . . . . . 12-3Interrupt Key . . . . . . . . . . . . . . . . . 12-3Load Indicator . . . . . . . . . . . . . . . . 12-3Load-Clear Key . . . . . . . . . . . . . . . . 12-3Load-Normal Key . . . . . . . . . . . . . . . 12-3Load-Unit-Address Controls . . . . . . . . . 12-3Manual Indicator . . . . . . . . . . . . . . . 12-3Power Controls . . . . . . . . . . . . . . . . 12-3Rate Control . . . . . . . . . . . . . . . . . 12-4Restart Key . . . . . . . . . . . . . . . . . . 12-4Start Key . . . . . . . . . . . . . . . . . . . 12-4Stop Key . . . . . . . . . . . . . . . . . . . 12-4Store-Status Key . . . . . . . . . . . . . . . 12-4System-Reset-Clear Key . . . . . . . . . . 12-5System-Reset-Normal Key . . . . . . . . . 12-5Test Indicator . . . . . . . . . . . . . . . . . 12-5TOD-Clock Control . . . . . . . . . . . . . . 12-5Wait Indicator . . . . . . . . . . . . . . . . . 12-5

Multiprocessing Configurations . . . . . . . . 12-6

Chapter 13. I/O Overview . . . . . . . . . . 13-1Input/Output (I/O) . . . . . . . . . . . . . . . . 13-1The Channel Subsystem . . . . . . . . . . . . 13-1

Subchannels . . . . . . . . . . . . . . . . . 13-2Attachment of Input/Output Devices . . . . . 13-2

Channel Paths . . . . . . . . . . . . . . . . 13-2Control Units . . . . . . . . . . . . . . . . . 13-4I/O Devices . . . . . . . . . . . . . . . . . . 13-4

I/O Addressing . . . . . . . . . . . . . . . . . . 13-5Channel-Path Identifier . . . . . . . . . . . 13-5Subchannel Number . . . . . . . . . . . . . 13-5Device Number . . . . . . . . . . . . . . . . 13-5Device Identifier . . . . . . . . . . . . . . . 13-5

Performance of I/O Operations . . . . . . . . 13-6Start-Function Initiation . . . . . . . . . . . 13-6Path Management . . . . . . . . . . . . . . 13-7Channel-Program Execution . . . . . . . . 13-7Conclusion of I/O Operations . . . . . . . . 13-8I/O Interruptions . . . . . . . . . . . . . . . 13-9

Chapter 14. I/O Instructions . . . . . . . . . 14-1I/O-Instruction Formats . . . . . . . . . . . . . 14-1I/O-Instruction Execution . . . . . . . . . . . . 14-1

Serialization . . . . . . . . . . . . . . . . . . 14-1Operand Access . . . . . . . . . . . . . . . 14-1Condition Code . . . . . . . . . . . . . . . . 14-2Program Exceptions . . . . . . . . . . . . . 14-2

Instructions . . . . . . . . . . . . . . . . . . . . 14-2

x ESA/390 Principles of Operation

| CANCEL SUBCHANNEL . . . . . . . . . . 14-4CLEAR SUBCHANNEL . . . . . . . . . . . 14-5HALT SUBCHANNEL . . . . . . . . . . . . 14-6MODIFY SUBCHANNEL . . . . . . . . . . 14-7RESET CHANNEL PATH . . . . . . . . . . 14-8RESUME SUBCHANNEL . . . . . . . . . 14-10SET ADDRESS LIMIT . . . . . . . . . . . 14-11SET CHANNEL MONITOR . . . . . . . . 14-12START SUBCHANNEL . . . . . . . . . . 14-14STORE CHANNEL PATH STATUS . . . 14-15STORE CHANNEL REPORT WORD . . 14-16STORE SUBCHANNEL . . . . . . . . . . 14-17TEST PENDING INTERRUPTION . . . . 14-18TEST SUBCHANNEL . . . . . . . . . . . 14-19

Chapter 15. Basic I/O Functions . . . . . . 15-1Control of Basic I/O Functions . . . . . . . . . 15-1

Subchannel-Information Block . . . . . . . 15-1Path-Management-Control Word . . . . 15-2Subchannel-Status Word . . . . . . . . . 15-7Model-Dependent Area . . . . . . . . . . 15-7Summary of Modifiable Fields . . . . . . 15-8

Channel-Path Allegiance . . . . . . . . . . . 15-10Working Allegiance . . . . . . . . . . . . . 15-11Active Allegiance . . . . . . . . . . . . . . 15-11Dedicated Allegiance . . . . . . . . . . . 15-11Channel-Path Availability . . . . . . . . . 15-12Control-Unit Type . . . . . . . . . . . . . 15-12

Clear Function . . . . . . . . . . . . . . . . . 15-13Clear-Function Path Management . . . . 15-13Clear-Function Subchannel Modification . 15-13Clear-Function Signaling and

Completion . . . . . . . . . . . . . . . 15-14Halt Function . . . . . . . . . . . . . . . . . . 15-14

Halt-Function Path Management . . . . . 15-15Halt-Function Signaling and Completion . 15-15

Start Function and Resume Function . . . . 15-17Start-Function and Resume-Function

Path Management . . . . . . . . . . . 15-18Performance of I/O Operations . . . . . . . 15-20

Blocking of Data . . . . . . . . . . . . . . 15-21Operation-Request Block . . . . . . . . . 15-21Channel-Command Word . . . . . . . . . 15-26Command Code . . . . . . . . . . . . . . 15-28Designation of Storage Area . . . . . . . 15-29Chaining . . . . . . . . . . . . . . . . . . . 15-30

Data Chaining . . . . . . . . . . . . . . 15-32Command Chaining . . . . . . . . . . . 15-33

Skipping . . . . . . . . . . . . . . . . . . . 15-34Program-Controlled Interruption . . . . . 15-34CCW Indirect Data Addressing . . . . . . 15-35Suspension of Channel-Program

Execution . . . . . . . . . . . . . . . . 15-37Commands and Flags . . . . . . . . . . . 15-39

Branching in Channel Programs . . . . . 15-40Transfer in Channel . . . . . . . . . . . 15-40

Command Retry . . . . . . . . . . . . . . 15-41| Concluding I/O Operations before Initiation . 15-41

Concluding I/O Operations during Initiation . 15-41Immediate Conclusion of I/O Operations . . 15-42Concluding I/O Operations during Data

Transfer . . . . . . . . . . . . . . . . . . 15-42Channel-Path-Reset Function . . . . . . . . 15-44

Channel-Path-Reset-Function Signaling . 15-44Channel-Path-Reset-Function-

Completion Signaling . . . . . . . . . 15-44

Chapter 16. I/O Interruptions . . . . . . . . 16-1Interruption Conditions . . . . . . . . . . . . . 16-2

Intermediate Interruption Condition . . . . 16-4Primary Interruption Condition . . . . . . . 16-4Secondary Interruption Condition . . . . . 16-4Alert Interruption Condition . . . . . . . . . 16-4

Priority of Interruptions . . . . . . . . . . . . . 16-4Interruption Action . . . . . . . . . . . . . . . . 16-5Interruption-Response Block . . . . . . . . . . 16-6Subchannel-Status Word . . . . . . . . . . . . 16-6

Subchannel Key . . . . . . . . . . . . . . 16-8Suspend Control (S) . . . . . . . . . . . 16-8Extended-Status-Word Format (L) . . . 16-8Deferred Condition Code (CC) . . . . . 16-8Format (F) . . . . . . . . . . . . . . . . 16-10Prefetch (P) . . . . . . . . . . . . . . . 16-10Initial-Status-Interruption Control (I) . . 16-11Address-Limit-Checking Control (A) . 16-11Suppress-Suspended Interruption (U) . 16-11

Subchannel-Control Field . . . . . . . . . 16-11Zero Condition Code (Z) . . . . . . . . 16-11Extended Control (E) . . . . . . . . . . 16-11Path Not Operational (N) . . . . . . . . 16-12Function Control (FC) . . . . . . . . . 16-12Activity Control (AC) . . . . . . . . . . 16-13Status Control (SC) . . . . . . . . . . . 16-16

CCW-Address Field . . . . . . . . . . . . 16-18Device-Status Field . . . . . . . . . . . . 16-23Subchannel-Status Field . . . . . . . . . 16-23

Program-Controlled Interruption . . . . 16-23Incorrect Length . . . . . . . . . . . . . 16-23Program Check . . . . . . . . . . . . . 16-24Protection Check . . . . . . . . . . . . 16-26Channel-Data Check . . . . . . . . . . 16-26Channel-Control Check . . . . . . . . 16-27Interface-Control Check . . . . . . . . 16-28Chaining Check . . . . . . . . . . . . . 16-29

Count Field . . . . . . . . . . . . . . . . . 16-29Extended-Status Word . . . . . . . . . . . . 16-32

Extended-Status Format 0 . . . . . . . . 16-32Subchannel Logout . . . . . . . . . . . 16-32

Contents xi

Extended-Report Word . . . . . . . . . 16-36Failing-Storage Address . . . . . . . . 16-37

| Secondary-CCW Address . . . . . . . 16-38Extended-Status Format 1 . . . . . . . . 16-38Extended-Status Format 2 . . . . . . . . 16-38Extended-Status Format 3 . . . . . . . . 16-39

Extended-Control Word . . . . . . . . . . . . 16-40

Chapter 17. I/O Support Functions . . . . 17-1Channel-Subsystem Monitoring . . . . . . . . 17-1

Channel-Subsystem Timing . . . . . . . . . 17-2Channel-Subsystem Timer . . . . . . . . 17-2

Measurement-Block Update . . . . . . . . 17-2Measurement Block . . . . . . . . . . . . 17-3Measurement-Block Origin . . . . . . . . 17-6Measurement-Block Key . . . . . . . . . 17-6Measurement-Block Index . . . . . . . . 17-6Measurement-Block-Update Mode . . . 17-6Measurement-Block-Update Enable . . 17-7Control-Unit-Queuing Measurement . . 17-7

| Control-Unit-Defer Time . . . . . . . . . 17-7| Device-Active-Only Measurement . . . . 17-7

Time-Interval-Measurement Accuracy . 17-7Device-Connect-Time Measurement . . . . 17-8

Device-Connect-Time-MeasurementMode . . . . . . . . . . . . . . . . . . 17-8

Device-Connect-Time-MeasurementEnable . . . . . . . . . . . . . . . . . 17-8

Signals and Resets . . . . . . . . . . . . . . . 17-9Signals . . . . . . . . . . . . . . . . . . . . . 17-9

Halt Signal . . . . . . . . . . . . . . . . . 17-9Clear Signal . . . . . . . . . . . . . . . . 17-9Reset Signal . . . . . . . . . . . . . . . 17-10

Resets . . . . . . . . . . . . . . . . . . . . 17-10Channel-Path Reset . . . . . . . . . . 17-10I/O-System Reset . . . . . . . . . . . . 17-11

Externally Initiated Functions . . . . . . . . 17-14Initial Program Loading . . . . . . . . . . 17-14Reconfiguration of the I/O System . . . . 17-17

Status Verification . . . . . . . . . . . . . . . 17-17Address-Limit Checking . . . . . . . . . . . 17-17Configuration Alert . . . . . . . . . . . . . . 17-18Incorrect-Length-Indication Suppression . . 17-18Concurrent Sense . . . . . . . . . . . . . . . 17-18Channel-Subsystem Recovery . . . . . . . . 17-18

Channel Report . . . . . . . . . . . . . . . 17-19Channel-Report Word . . . . . . . . . . . 17-20

| Channel-Subsystem-I/O-Priority Facility . . 17-22| Number of| Channel-Subsystem-Priority Levels 17-23

Chapter 18. Hexadecimal-Floating-PointInstructions . . . . . . . . . . . . . . . . . 18-1

HFP Arithmetic . . . . . . . . . . . . . . . . . . 18-1

HFP Number Representation . . . . . . . . 18-1Normalization . . . . . . . . . . . . . . . . . 18-3HFP Data Format . . . . . . . . . . . . . . 18-3

Instructions . . . . . . . . . . . . . . . . . . . . 18-4ADD NORMALIZED . . . . . . . . . . . . . 18-8ADD UNNORMALIZED . . . . . . . . . . . 18-9COMPARE . . . . . . . . . . . . . . . . . 18-10CONVERT FROM FIXED . . . . . . . . . 18-11CONVERT TO FIXED . . . . . . . . . . . 18-11DIVIDE . . . . . . . . . . . . . . . . . . . 18-12HALVE . . . . . . . . . . . . . . . . . . . . 18-13LOAD AND TEST . . . . . . . . . . . . . 18-14LOAD COMPLEMENT . . . . . . . . . . . 18-14LOAD FP INTEGER . . . . . . . . . . . . 18-15LOAD LENGTHENED . . . . . . . . . . . 18-16LOAD NEGATIVE . . . . . . . . . . . . . 18-16LOAD POSITIVE . . . . . . . . . . . . . . 18-17LOAD ROUNDED . . . . . . . . . . . . . 18-17MULTIPLY . . . . . . . . . . . . . . . . . 18-18SQUARE ROOT . . . . . . . . . . . . . . 18-20SUBTRACT NORMALIZED . . . . . . . . 18-21SUBTRACT UNNORMALIZED . . . . . . 18-22

Chapter 19. Binary-Floating-PointInstructions . . . . . . . . . . . . . . . . . 19-1

Binary-Floating-Point Facility . . . . . . . . . . 19-1Floating-Point-Control (FPC) Register . . . 19-2

IEEE Masks and Flags . . . . . . . . . . 19-3FPC DXC Byte . . . . . . . . . . . . . . 19-3Operations on the FPC Register . . . . 19-3

BFP Arithmetic . . . . . . . . . . . . . . . . . . 19-4BFP Data Formats . . . . . . . . . . . . . . 19-4

BFP Short Format . . . . . . . . . . . . . 19-4BFP Long Format . . . . . . . . . . . . . 19-4BFP Extended Format . . . . . . . . . . 19-4Biased Exponent . . . . . . . . . . . . . 19-4Significand . . . . . . . . . . . . . . . . . 19-4Values of Nonzero Numbers . . . . . . 19-4

Classes of BFP Data . . . . . . . . . . . . 19-5Zeros . . . . . . . . . . . . . . . . . . . . 19-6Denormalized Numbers . . . . . . . . . 19-6Normalized Numbers . . . . . . . . . . . 19-6Infinities . . . . . . . . . . . . . . . . . . 19-6Signaling and Quiet NaNs . . . . . . . . 19-6

BFP-Format Conversion . . . . . . . . . . . 19-7BFP Rounding . . . . . . . . . . . . . . . . 19-7

Rounding Mode . . . . . . . . . . . . . . 19-7Normalization and Denormalization . . . . 19-8BFP Comparison . . . . . . . . . . . . . . . 19-8Condition Codes for BFP Instructions . . . 19-9Remainder . . . . . . . . . . . . . . . . . . 19-9IEEE Exception Conditions . . . . . . . . 19-10

IEEE Invalid Operation . . . . . . . . . 19-10IEEE Division-By-Zero . . . . . . . . . 19-11

xii ESA/390 Principles of Operation

IEEE Overflow . . . . . . . . . . . . . . 19-11IEEE Underflow . . . . . . . . . . . . . 19-12IEEE Inexact . . . . . . . . . . . . . . . 19-12

Result Figures . . . . . . . . . . . . . . . . . 19-13Data-Exception Codes (DXC) and

Abbreviations . . . . . . . . . . . . . . 19-14Instructions . . . . . . . . . . . . . . . . . . . 19-15

ADD . . . . . . . . . . . . . . . . . . . . . 19-18COMPARE . . . . . . . . . . . . . . . . . 19-23COMPARE AND SIGNAL . . . . . . . . . 19-24CONVERT FROM FIXED . . . . . . . . . 19-26CONVERT TO FIXED . . . . . . . . . . . 19-27DIVIDE . . . . . . . . . . . . . . . . . . . 19-29DIVIDE TO INTEGER . . . . . . . . . . . 19-30EXTRACT FPC . . . . . . . . . . . . . . . 19-35LOAD AND TEST . . . . . . . . . . . . . 19-36LOAD COMPLEMENT . . . . . . . . . . . 19-36LOAD FP INTEGER . . . . . . . . . . . . 19-37LOAD FPC . . . . . . . . . . . . . . . . . 19-38LOAD LENGTHENED . . . . . . . . . . . 19-39LOAD NEGATIVE . . . . . . . . . . . . . 19-39LOAD POSITIVE . . . . . . . . . . . . . . 19-40LOAD ROUNDED . . . . . . . . . . . . . 19-40MULTIPLY . . . . . . . . . . . . . . . . . 19-41MULTIPLY AND ADD . . . . . . . . . . . 19-43MULTIPLY AND SUBTRACT . . . . . . . 19-43SET FPC . . . . . . . . . . . . . . . . . . 19-45SET ROUNDING MODE . . . . . . . . . 19-45SQUARE ROOT . . . . . . . . . . . . . . 19-46STORE FPC . . . . . . . . . . . . . . . . 19-46SUBTRACT . . . . . . . . . . . . . . . . . 19-47TEST DATA CLASS . . . . . . . . . . . . 19-47

Appendix A. Number Representation andInstruction-Use Examples . . . . . . . . . A-1

Number Representation . . . . . . . . . . . . A-2Binary Integers . . . . . . . . . . . . . . . . A-2

Signed Binary Integers . . . . . . . . . . A-2Unsigned Binary Integers . . . . . . . . A-3

Decimal Integers . . . . . . . . . . . . . . . A-4Hexadecimal-Floating-Point Numbers . . . A-5Conversion Example . . . . . . . . . . . . . A-6

Instruction-Use Examples . . . . . . . . . . . A-6Machine Format . . . . . . . . . . . . . . . A-6Assembler-Language Format . . . . . . . . A-7

Addressing Mode in Examples . . . . . A-7General Instructions . . . . . . . . . . . . . . . A-7

ADD HALFWORD (AH) . . . . . . . . . . . A-7AND (N, NC, NI, NR) . . . . . . . . . . . . A-7

NI Example . . . . . . . . . . . . . . . . A-8Linkage Instructions (BAL, BALR, BAS,

BASR, BASSM, BSM) . . . . . . . . . . . A-8Other BALR and BASR Examples . . . A-9

BRANCH AND STACK (BAKR) . . . . . . A-9

BAKR Example 1 . . . . . . . . . . . . A-10BAKR Example 2 . . . . . . . . . . . . A-10BAKR Example 3 . . . . . . . . . . . . A-11

BRANCH ON CONDITION (BC, BCR) . A-11BRANCH ON COUNT (BCT, BCTR) . . A-12BRANCH ON INDEX HIGH (BXH) . . . . A-12

BXH Example 1 . . . . . . . . . . . . . A-12BXH Example 2 . . . . . . . . . . . . . A-12

BRANCH ON INDEX LOW OR EQUAL(BXLE) . . . . . . . . . . . . . . . . . . A-13

BXLE Example 1 . . . . . . . . . . . . A-13BXLE Example 2 . . . . . . . . . . . . A-14

COMPARE AND FORM CODEWORD(CFC) . . . . . . . . . . . . . . . . . . . A-14

COMPARE HALFWORD (CH) . . . . . . A-14COMPARE LOGICAL (CL, CLC, CLI,

CLR) . . . . . . . . . . . . . . . . . . . . A-14CLC Example . . . . . . . . . . . . . . A-14CLI Example . . . . . . . . . . . . . . . A-15CLR Example . . . . . . . . . . . . . . A-15

COMPARE LOGICAL CHARACTERSUNDER MASK (CLM) . . . . . . . . . . A-15

COMPARE LOGICAL LONG (CLCL) . . A-16COMPARE LOGICAL STRING (CLST) . A-17CONVERT TO BINARY (CVB) . . . . . . A-18CONVERT TO DECIMAL (CVD) . . . . . A-18DIVIDE (D, DR) . . . . . . . . . . . . . . . A-19EXCLUSIVE OR (X, XC, XI, XR) . . . . A-19

XC Example . . . . . . . . . . . . . . . A-19XI Example . . . . . . . . . . . . . . . A-20

EXECUTE (EX) . . . . . . . . . . . . . . . A-21INSERT CHARACTERS UNDER MASK

(ICM) . . . . . . . . . . . . . . . . . . . A-21LOAD (L, LR) . . . . . . . . . . . . . . . . A-22LOAD ADDRESS (LA) . . . . . . . . . . . A-22LOAD HALFWORD (LH) . . . . . . . . . A-23MOVE (MVC, MVI) . . . . . . . . . . . . . A-23

MVC Example . . . . . . . . . . . . . . A-23MVI Example . . . . . . . . . . . . . . A-24

MOVE INVERSE (MVCIN) . . . . . . . . A-24MOVE LONG (MVCL) . . . . . . . . . . . A-25MOVE NUMERICS (MVN) . . . . . . . . A-25MOVE STRING (MVST) . . . . . . . . . . A-26MOVE WITH OFFSET (MVO) . . . . . . A-26MOVE ZONES (MVZ) . . . . . . . . . . . A-27MULTIPLY (M, MR) . . . . . . . . . . . . A-27MULTIPLY HALFWORD (MH) . . . . . . A-27OR (O, OC, OI, OR) . . . . . . . . . . . . A-28

OI Example . . . . . . . . . . . . . . . A-28PACK (PACK) . . . . . . . . . . . . . . . A-28SEARCH STRING (SRST) . . . . . . . . A-29

SRST Example 1 . . . . . . . . . . . . A-29SRST Example 2 . . . . . . . . . . . . A-29

SHIFT LEFT DOUBLE (SLDA) . . . . . . A-29

Contents xiii

SHIFT LEFT SINGLE (SLA) . . . . . . . A-30STORE CHARACTERS UNDER MASK

(STCM) . . . . . . . . . . . . . . . . . . A-30STORE MULTIPLE (STM) . . . . . . . . A-30TEST UNDER MASK (TM) . . . . . . . . A-31TRANSLATE (TR) . . . . . . . . . . . . . A-31TRANSLATE AND TEST (TRT) . . . . . A-32UNPACK (UNPK) . . . . . . . . . . . . . A-33UPDATE TREE (UPT) . . . . . . . . . . . A-34

Decimal Instructions . . . . . . . . . . . . . . A-34ADD DECIMAL (AP) . . . . . . . . . . . . A-34COMPARE DECIMAL (CP) . . . . . . . . A-34DIVIDE DECIMAL (DP) . . . . . . . . . . A-34EDIT (ED) . . . . . . . . . . . . . . . . . . A-35EDIT AND MARK (EDMK) . . . . . . . . A-36MULTIPLY DECIMAL (MP) . . . . . . . . A-36SHIFT AND ROUND DECIMAL (SRP) . A-37

Decimal Left Shift . . . . . . . . . . . . A-37Decimal Right Shift . . . . . . . . . . . A-37Decimal Right Shift and Round . . . . A-38Multiplying by a Variable Power of 10 . A-38

ZERO AND ADD (ZAP) . . . . . . . . . . A-38Hexadecimal-Floating-Point Instructions . . A-39

ADD NORMALIZED (AD, ADR, AE, AER,AXR) . . . . . . . . . . . . . . . . . . . . A-39

ADD UNNORMALIZED (AU, AUR, AW,AWR) . . . . . . . . . . . . . . . . . . . A-39

COMPARE (CD, CDR, CE, CER) . . . . A-40DIVIDE (DD, DDR, DE, DER) . . . . . . A-40HALVE (HDR, HER) . . . . . . . . . . . . A-41MULTIPLY (MD, MDR, MDE, MDER,

MXD, MXDR, MXR) . . . . . . . . . . . A-41Hexadecimal-Floating-Point-Number

Conversion . . . . . . . . . . . . . . . . A-42Fixed Point to Hexadecimal Floating

Point . . . . . . . . . . . . . . . . . . A-42Hexadecimal Floating Point to Fixed

Point . . . . . . . . . . . . . . . . . . A-42Multiprogramming and Multiprocessing

Examples . . . . . . . . . . . . . . . . . . A-43Example of a Program Failure Using OR

Immediate . . . . . . . . . . . . . . . . A-43Conditional Swapping Instructions (CS,

CDS) . . . . . . . . . . . . . . . . . . . A-44Setting a Single Bit . . . . . . . . . . . A-44Updating Counters . . . . . . . . . . . A-45

Bypassing Post and Wait . . . . . . . . . A-45Bypass Post Routine . . . . . . . . . . A-45Bypass Wait Routine . . . . . . . . . . A-46

Lock/Unlock . . . . . . . . . . . . . . . . . A-46Lock/Unlock with LIFO Queuing for

Contentions . . . . . . . . . . . . . . A-46Lock/Unlock with FIFO Queuing for

Contentions . . . . . . . . . . . . . . A-47

Free-Pool Manipulation . . . . . . . . . . A-48PERFORM LOCKED OPERATION (PLO) A-50

Sorting Instructions . . . . . . . . . . . . . . A-51Tree Format . . . . . . . . . . . . . . . . . A-51Example of Use of Sort Instructions . . . A-53

Appendix B. Lists of Instructions . . . . . B-1

Appendix C. Condition-Code Settings . . C-1

Appendix D. Comparison betweenESA/370 and ESA/390 . . . . . . . . . . . D-1

New Facilities in ESA/390 . . . . . . . . . . . D-1Access-List-Controlled Protection . . . . . D-1Additional Floating-Point . . . . . . . . . . D-1

| Additional Input/Output . . . . . . . . . . . D-2Branch and Set Authority . . . . . . . . . . D-2Called-Space Identification . . . . . . . . . D-2Checksum . . . . . . . . . . . . . . . . . . . D-2Compare and Move Extended . . . . . . . D-2Concurrent Sense . . . . . . . . . . . . . . D-2Extended TOD Clock . . . . . . . . . . . . D-2

| Extended Translation 1 . . . . . . . . . . . D-3| Extended Translation 2 . . . . . . . . . . . D-3

Immediate and Relative Instruction . . . . D-3Move-Page Facility 2 . . . . . . . . . . . . D-3PER 2 . . . . . . . . . . . . . . . . . . . . . D-4Perform Locked Operation . . . . . . . . . D-4Program Call Fast . . . . . . . . . . . . . . D-4Resume Program . . . . . . . . . . . . . . D-4Set Address Space Control Fast . . . . . . D-5Square Root . . . . . . . . . . . . . . . . . D-5Storage-Protection Override . . . . . . . . D-5Store System Information . . . . . . . . . . D-5String Instruction . . . . . . . . . . . . . . . D-5Subspace Group . . . . . . . . . . . . . . . D-5Suppression on Protection . . . . . . . . . D-6TOD-Clock-Control Override . . . . . . . . D-6Trap . . . . . . . . . . . . . . . . . . . . . . D-6

| z/Architecture . . . . . . . . . . . . . . . . D-6Comparison of Facilities . . . . . . . . . . . . D-7

Appendix E. Comparison between 370-XAand ESA/370 . . . . . . . . . . . . . . . . . E-1

New Facilities in ESA/370 . . . . . . . . . . . E-1Access Registers . . . . . . . . . . . . . . . E-1Compare until Substring Equal . . . . . . . E-1Home Address Space . . . . . . . . . . . . E-1Linkage Stack . . . . . . . . . . . . . . . . . E-2Load and Store Using Real Address . . . E-2Move Page Facility 1 . . . . . . . . . . . . E-2Move with Source or Destination Key . . . E-2Private Space . . . . . . . . . . . . . . . . . E-2

Comparison of Facilities . . . . . . . . . . . . E-2

xiv ESA/390 Principles of Operation

Summary of Changes . . . . . . . . . . . . . . E-2New Instructions Provided . . . . . . . . . E-2Comparison of PSW Formats . . . . . . . E-3New Control-Register Assignments . . . . E-3New Assigned Storage Locations . . . . . E-3New Exceptions . . . . . . . . . . . . . . . E-4Change to Secondary-Space Mode . . . . E-4Changes to ASN-Second-Table Entry and

ASN Translation . . . . . . . . . . . . . . E-4Changes to Entry-Table Entry and

PC-Number Translation . . . . . . . . . . E-5Changes to PROGRAM CALL . . . . . . . E-5Changes to SET ADDRESS SPACE

CONTROL . . . . . . . . . . . . . . . . . E-5Effects in New Translation Modes . . . . . . E-5

Effects on Interlocks for Virtual-StorageReferences . . . . . . . . . . . . . . . . . E-5

Effect on INSERT ADDRESS SPACECONTROL . . . . . . . . . . . . . . . . . E-6

Effect on LOAD REAL ADDRESS . . . . . E-6Effect on TEST PENDING

INTERRUPTION . . . . . . . . . . . . . . E-6Effect on TEST PROTECTION . . . . . . E-6

Appendix F. Comparison betweenSystem/370 and 370-XA . . . . . . . . . . F-1

New Facilities in 370-XA . . . . . . . . . . . . F-1Bimodal Addressing . . . . . . . . . . . . . F-1

31-Bit Logical Addressing . . . . . . . . . . F-131-Bit Real and Absolute Addressing . . . F-1Page Protection . . . . . . . . . . . . . . . F-2Tracing . . . . . . . . . . . . . . . . . . . . F-2Incorrect-Length-Indication Suppression . F-2Status Verification . . . . . . . . . . . . . . F-2

Comparison of Facilities . . . . . . . . . . . . F-2Summary of Changes . . . . . . . . . . . . . . F-3

Changes in Instructions Provided . . . . . F-3Input/Output Comparison . . . . . . . . . . F-5Comparison of PSW Formats . . . . . . . F-5Changes in Control-Register Assignments . F-6Changes in Assigned Storage Locations . F-6Changes to SIGNAL PROCESSOR . . . . F-6Machine-Check Changes . . . . . . . . . . F-7Changes to Addressing Wraparound . . . F-7Changes to LOAD REAL ADDRESS . . . F-7Changes to 31-Bit Real Operand

Addresses . . . . . . . . . . . . . . . . . F-8

Appendix G. Table of Powers of 2 . . . . . G-1

Appendix H. Hexadecimal Tables . . . . . H-1

Appendix I. EBCDIC and Other Codes . . . I-1

Index . . . . . . . . . . . . . . . . . . . . . . . X-1

Contents xv

xvi ESA/390 Principles of Operation

Notices

References in this publication to IBM products,programs or services do not imply that IBMintends to make these available in all countries inwhich IBM operates. Any reference to an IBMproduct, program, or service is not intended tostate or imply that only IBM's product, program, orservice may be used. Any functionally equivalentproduct, program, or service that does not infringeany of IBM's intellectual property rights may beused instead of the IBM product, program, orservice. Evaluation and verification of operation inconjunction with other products, except thoseexpressly designated by IBM, is the user's respon-sibility.

IBM may have patents or pending patent applica-tions covering subject matter in this document.The furnishing of this document does not give youany license to these patents. You can sendlicense inquiries, in writing, to the IBM Director ofLicensing, IBM Corporation, 500 ColumbusAvenue, Thornwood, NY, 10594 USA.

Trademarks

The following terms, denoted by an asterisk (*) atthe first or most prominent occurrence in this pub-lication, are trademarks of the International Busi-ness Machines Corporation in the United States orother countries:

AIX/ESA BookMaster CICS DB2

Enterprise Systems Architecture/370Enterprise Systems Architecture/390Enterprise Systems Connection Architecture

ESA/370 ESA/390 ESCON FICON MVS/ESA OS/390

Processor Resource/Systems Manager PR/SM Sysplex Timer System/370 VM/ESA z/Architecture z/OS

Copyright IBM Corp. 1990-2001 xvii

xviii ESA/390 Principles of Operation

Preface

This publication provides, for reference purposes,a detailed Enterprise Systems Architecture/390*(ESA/390*) description.

The publication applies only to systems operatingas defined by ESA/390. For systems operating inaccordance with the System/370* or System/370extended-architecture (370-XA) definitions, theIBM System/370 Principles of Operation,GA22-7000, or the IBM 370-XA Principles ofOperation, SA22-7085, should be consulted. Forsystems operating in accordance with the Enter-prise Systems Architecture/370* (ESA/370*) defi-nition, the IBM ESA/370 Principles of Operation,

| SA22-7200, should be consulted. For systems| operating in accordance with the z/Architecture*| definition, the z/Architecture Principles of Opera-| tion, SA22-7832, should be consulted.

The publication describes each function at thelevel of detail needed to prepare an assembler-language program that relies on that function. Itdoes not, however, describe the notation and con-ventions that must be employed in preparing sucha program, for which the user must instead referto the appropriate assembler-language publication.

The information in this publication is provided prin-cipally for use by assembler-language program-mers, although anyone concerned with thefunctional details of ESA/390 will find it useful.

This publication is written as a reference andshould not be considered an introduction or a text-book. It assumes the user has a basic knowledgeof data-processing systems.

All facilities discussed in this publication are notnecessarily available on every model. Further-more, in some instances the definitions have beenstructured to allow for some degree ofextendibility, and therefore certain capabilities maybe described or implied that are not offered onany model. Examples of such capabilities are theuse of a 16-bit field in the subsystem-identification

| word to identify the subchannel number, the size

of the CPU address, and the number of CPUssharing main storage. The allowance for this typeof extendibility should not be construed asimplying any intention by IBM to provide suchcapabilities. For information about the character-istics and availability of facilities on a specificmodel, see the functional characteristics publica-tion for that model.

Largely because this publication is arranged forreference, certain words and phrases appear, ofnecessity, earlier in the publication than the prin-cipal discussions explaining them. The readerwho encounters a problem because of thisarrangement should refer to the index, which indi-cates the location of the key description.

The information presented in this publication isgrouped in 19 chapters and several appendixes:

Chapter 1, Introduction, highlights the major facili-ties of the ESA/390 architecture.

Chapter 2, Organization, describes the majorgroupings within the system—main storage,expanded storage, the central processing unit(CPU), the external time reference (ETR), andinput/output—with some attention given to thecomposition and characteristics of thosegroupings.

Chapter 3, Storage, explains the informationformats, the addressing of storage, and the facili-ties for storage protection. It also deals withdynamic address translation (DAT), which,coupled with special programming support, makesthe use of a virtual storage possible.

Chapter 4, Control, describes the facilities for theswitching of system status, for special externallyinitiated operations, for debugging, and for timing.It deals specifically with CPU states, controlmodes, the program-status word (PSW), controlregisters, tracing, program-event recording, timingfacilities, resets, store status, and initial programloading.

Enterprise Systems Architecture/390, ESA/390, System/370, Enterprise Systems Architecture/370, ESA/370, and z/Architectureare trademarks of the International Business Machines Corporation.

Copyright IBM Corp. 1990-2001 xix

Chapter 5, Program Execution, explains the role ofinstructions in program execution, looks in detail atinstruction formats, and describes briefly the useof the program-status word (PSW), of branching,and of interruptions. It contains the principaldescription of the advanced address-space facili-ties that were introduced in ESA/370. It alsodetails the aspects of program execution on oneCPU as observed by other CPUs and by channelprograms.

Chapter 6, Interruptions, details the mechanismthat permits the CPU to change its state as aresult of conditions external to the system, withinthe system, or within the CPU itself. Six classesof interruptions are identified and described:machine-check interruptions, program inter-ruptions, supervisor-call interruptions, externalinterruptions, input/output interruptions, and restartinterruptions.

Chapter 7, General Instructions, contains detaileddescriptions of logical and binary-integer dataformats and of all unprivileged instructions exceptthe decimal and floating-point instructions.

Chapter 8, Decimal Instructions, describes indetail decimal data formats and the decimalinstructions.

Chapter 9, Floating-Point Overview and SupportInstructions, includes an introduction to thefloating-point operations, detailed descriptions ofthose instructions common to both hexadecimal-floating-point and binary-floating-point operations,and summaries of all floating-point instructions.

Chapter 10, Control Instructions, contains detaileddescriptions of all of the semiprivileged and privi-leged instructions except for the I/O instructions.

Chapter 11, Machine-Check Handling, describesthe mechanism for detecting, correcting, andreporting machine malfunctions.

Chapter 12, Operator Facilities, describes thebasic manual functions and controls available foroperating and controlling the system.

Chapters 13-17 of this publication provide adetailed definition of the functions performed bythe channel subsystem and the logical interfacebetween the CPU and the channel subsystem.

Chapter 13, I/O Overview, provides a briefdescription of the basic components and operationof the channel subsystem.

Chapter 14, I/O Instructions, contains thedescription of the I/O instructions.

Chapter 15, Basic I/O Functions, describes thebasic I/O functions performed by the channel sub-system, including the initiation, control, and con-clusion of I/O operations.

Chapter 16, I/O Interruptions, covers I/O inter-ruptions and interruption conditions.

Chapter 17, I/O Support Functions, describes suchfunctions as channel-subsystem usage monitoring,resets, initial-program loading, reconfiguration, andchannel-subsystem recovery.

Chapter 18, Hexadecimal-Floating-PointInstructions, contains detailed descriptions of thehexadecimal-floating-point (HFP) data formats andthe HFP instructions.

Chapter 19, Binary-Floating-Point Instructions,contains detailed descriptions of the binary-floating-point (BFP) data formats and the BFPinstructions.

The Appendixes include:

� Information about number representation � Instruction-use examples� Lists of the instructions arranged in several

sequences� A summary of the condition-code settings� A summary of the differences between

ESA/370 and ESA/390� A summary of the differences between

370-XA and ESA/370� A summary of the differences between

System/370 and 370-XA� A table of the powers of 2� Tabular information helpful in dealing with

hexadecimal numbers� A table of EBCDIC and other codes.

Certain information about commands that is inChapters 15 and 16 of the ESA/370 Principles ofOperation is not in this publication; instead it is inthe publication IBM Enterprise SystemsArchitecture/390 Common I/O-Device Commandsand Self Description, SA22-7204.

xx ESA/390 Principles of Operation

Size and Number Notation

In this publication, the letters K, M, G, and Tdenote the multipliers 2��, 2��, 2��, and 2��,respectively. Although the letters are borrowedfrom the decimal system and stand for kilo (10�),mega (10�), giga (10�), and tera (10��), they donot have the decimal meaning but instead repre-sent the power of 2 closest to the correspondingpower of 10. Their meaning in this publication isas follows:

┌──────────┬─────────────────────────┐│ Symbol │ Value │├──────────┼─────────────────────────┤│ K (kilo) │ 1,�24 = 2�� ││ │ ││ M (mega) │ 1,�48,576 = 2�� ││ │ ││ G (giga) │ 1,�73,741,824 = 2�� ││ │ ││ T (tera) │ 1,�99,511,627,776 = 2�� │└──────────┴─────────────────────────┘

The following are some examples of the use of K,M, G, and T:

2,048 is expressed as 2K.4,096 is expressed as 4K.65,536 is expressed as 64K (not 65K).2�� is expressed as 16M.2�� is expressed as 2G.2�� is expressed as 4T.

When the words “thousand” and “million” areused, no special power-of-2 meaning is assignedto them.

All numbers in this publication are in decimalunless they are explicitly noted as being in binaryor hexadecimal (hex).

Bytes, Characters, and Codes

Although the System/360 architecture was ori-ginally designed to support the Extended Binary-Coded-Decimal Interchange Code (EBCDIC), theinstructions and data formats of the architectureare for the most part independent of the externalcode which is to be processed by the machine.For most instructions, all 256 possible combina-tions of bit patterns for a particular byte can beprocessed, independent of the character which thebit pattern is intended to represent. For

instructions which use the zoned format, and forthose few instructions which are dependent on aparticular external code, the instruction TRANS-LATE may be used to convert data from one codeto another code. Thus, a machine operating inaccordance with ESA/390 can process EBCDIC,ASCII, or any other code which can be repres-ented in eight or fewer bits per character.

In this publication, unless otherwise specified, thevalue given for a byte is the value obtained byconsidering the bits of the byte to represent abinary code. Thus, when a byte is said to containa zero, the value 00000000 binary, or 00 hex, ismeant, and not the value for an EBCDIC character“0,” which would be F0 hex.

Other Publications

The parallel-I/O interface is described in the publi-cation IBM System/360 and System/370 I/O Inter-face Channel to Control Unit Original EquipmentManufacturers' Information, GA22-6974.

The parallel-I/O channel-to-channel adapter isdescribed in the publication IBM EnterpriseSystems Architecture/390 Channel-to-ChannelAdapter for the System/360 and System/370 I/OInterface, SA22-7091.

The Enterprise Systems Connection Architecture*(ESCON*) I/O interface, referred to in this publi-

| cation along with the FICON I/O interface as theserial I/O interface, is described in the publicationIBM Enterprise Systems Architecture/390 ESCONI/O Interface, SA22-7202.

| The FICON I/O interface is described in the ANSI| standards document Fibre Channel - Single-Byte| Command Code Sets-2 (FC-SB-2).

The channel-to-channel adapter for the serial-I/Ointerface is described in the publication IBM Enter-prise Systems Architecture/390 ESCON Channel-to-Channel-Adapter, SA22-7203.

The commands, status, and sense data that arecommon to all I/O devices that comply withESA/390 are described in the publication IBMEnterprise Systems Architecture/390 Common

Enterprise Systems Connection Architecture and ESCON are trademarks of the International Business Machines Corporation.

Preface xxi

I/O-Device Commands and Self Description,SA22-7204.

Vector operations are described in the publicationIBM Enterprise Systems Architecture/390 VectorOperations, SA22-7207.

The compression facility is described in the publi-cation IBM Enterprise Systems Architecture/390Data Compression, SA22-7208.

The interpretive-execution facility is described inthe publication IBM 370-XA Interpretive Execution,SA22-7095.

| Summary of Changes in Eighth| Edition| The current, eighth edition of this publication| differs from the previous edition principally by con-| taining:

| � Definitions of a number of new instructions| introduced in z/Architecture and also added to| ESA/390. These instructions include, but are| not limited to, those of the extended-| translation facility 2.

| � Additional indirect-data-addressing functions| introduced in z/Architecture and also added to| ESA/390. These are a doubleword format-2| IDAW and the ability of all format-2 IDAWs of| a channel program to specify either 2K-byte or| 4K-byte data blocks.

| � Definitions of new input/out facilities placed in| z/Architecture and also added to ESA/390.| These are the FICON-channel facility, the| ORB-extension facility, and the channel-| subsystem-I/O-priority facility.

| The eighth edition contains minor clarifications and| corrections and also the following significant| changes relative to the previous edition:

| � In Chapter 1, “Introduction”:

| – The new z/Architecture instructions are| highlighted.

| – The ability to simulate the instructions of| the extended-translation facility 2 by| means of the MVS CSRUNIC macro| instruction is referenced.

| – The new I/O facilities and functions are| highlighted.

| � In Chapter 3, “Storage”:

| – The description of the translation-| lookaside buffer (TLB) is improved.

| – If z/Architecture is installed, LOAD REAL| ADDRESS may use the TLB whether DAT| is on or off, but TLB entries still are| formed only if DAT is on.

| – Bit 29 of the translation-exception identifi-| cation, real locations 144-147, and the| operand access identification, real location| 162, are described. These are related to| a page-translation exception recognized| by the MOVE PAGE instruction.

| – The store-status and machine-check| architectural-mode identification at real| and absolute locations 163 is added.

| – The I/O-interruption-identification word at| real locations 192-195 is described.

| � In Chapter 4, “Control”:

| – On a model on which z/Architecture is| installed, recognition of a storage-| alteration PER event causes no more than| 4K bytes to be stored beginning with the| byte that caused the event, and this may| result in partial completion of an interrup-| tible instruction.

| – BRANCH RELATIVE AND SAVE LONG| and BRANCH RELATIVE ON CONDITION| LONG are added to those instructions that| cause a successful-branching PER event.

| – Storing of the architectural-mode identifi-| cation during the store-status operation is| described.

| – The set-architecture order of the SIGNAL| PROCESSOR instruction is added. This| can be used to set the architectural mode| of the configuration to z/Architecture.

| � In Chapter 5, “Program Execution”:

| – The RSE, RSL, and RIL instruction| formats are added, and an M� field is| described as an alternative in the RS| format.

| – The description of the ART-lookaside| buffer (ALB) is improved.

| � In Chapter 6, “Interruptions,” the crypto-| operation exception is added.

| � In Chapter 7, “General Instructions”:

xxii ESA/390 Principles of Operation

| word contains an interruption-identification| word that further identifies the source of| the I/O interruption.

| � In Chapter 15, “Basic I/O Functions”:

| – The ORB is extended to eight words and| newly contains a streaming-mode control,| modification control, synchronization| control, format-2-IDAW control, 2K-IDAW| control, ORB-extension control, channel-| subsystem priority, and control-unit pri-| ority.

| – A doubleword format-2 IDAW and 4K-byte| data blocks optionally designated by| format-2 IDAWs are added.

| � In Chapter 16, “I/O Interruptions”:

| – A secondary-CCW-address-validity bit and| failing-storage-address-format bit are| added to the extended-report word.

| – A two-word failing-storage address and a| secondary-CCW address are added to the| format-0 extended-status word.

| � In Chapter 17, “I/O Support Functions”:

| – Control-unit-defer time is added. This has| an effect on the device-connect time and| device-disconnect time in the measure-| ment block.

| – On a model with z/Architecture installed,| references to the measurement block by| the measurement-block-update facility are| single-access references and appear to be| word concurrent as observed by CPUs.

| – Device-active-only time is added to the| measurement block.

| – The channel-subsystem-I/O-priority facility,| providing channel-subsystem priority and| control-unit priority, is added.

| The above changes may affect other chapters| besides the ones listed. All technical changes to| the text or to an illustration are indicated by a ver-| tical line to the left of the change.

Summary of Changes in SeventhEditionThe seventh edition of this publication differs fromthe previous edition principally by containing thedefinitions of the extended-TOD-clock, TOD-clock-control-override, extended-translation, andstore-system-information facilities. The seventhedition contains minor clarifications and cor-rections and also the following significant changesrelative to the previous edition:

� In Chapter 4, “Control”:

– The ETR subclass mask, bit 27 of controlregister 0, and the TOD-clock-control-override control, bit 10 of control register14, are added.

– An extension to the TOD clock, and theTOD programmable register, are added.

| – Leap second 22 is added.

� In Chapter 6, “Interruptions”:

– The ETR external interruption is added.

– The TOD-clock-sync-check external inter-ruption is affected by the extended-TOD-clock facility.

� In Chapter 7, “General Instructions,” theCONVERT UNICODE TO UTF-8, CONVERTUTF-8 TO UNICODE, STORE CLOCKEXTENDED, and TRANSLATE EXTENDEDinstructions are added.

� In Chapter 10, “Control Instructions,” the SETCLOCK PROGRAMMABLE FIELD andSTORE SYSTEM INFORMATION instructionsare added.

The above changes may affect other chaptersbesides the ones listed.

Summary of Changes in SixthEditionThe sixth edition of this publication differs from theprevious edition principally by containing the defi-nitions

Documents

Principles of Operationlars.nocrew.org/computers/processors/ESA390/dz9ar007.pdf · This edition obsoletes and replaces Enterprise Systems Architecture/390 Principles of Operation,