President UniversityErwin SitompulDigital Systems 7/1 Lecture 7 Digital Systems Dr.-Ing. Erwin Sitompul…

President University Erwin Sitompul Digital Systems 7/1

Lecture 7Digital Systems

Dr.-Ing. Erwin SitompulPresident University

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Section 8Multiplexers

Digital Systems


Multiplexer (Mux) A multiplexer (mux) is a digital circuit building block which is used

to select and transmit one of its 2n inputs to its one output, based on n select bit.

A multiplexer allows for conditional data transfer. A 4-input mux needs 2 select bit to indicate which input to route

through. An 8-input mux needs 3 select bits, and so on.

● A railway switch

Lecture Digital Systems


Multiplexer (Mux)Lecture Digital Systems

Four data are possible to be displayed: Air temperature (T), average km/l (A), instantaneous km/l (I), and kilometer remaining (M), each 8-bit wide.

We can chose which to display by using two inputs X and Y. In this case, an 8-bit 4-to-1 multiplexer is used.


2-to-1 MultiplexerLecture Digital Systems

A multiplexer with one select bit is shown below, or 2-to-1 multiplexer.

If S = 0, then Y = I0, if S = 1, then Y = I1.

● Circuit of 2-to-1 multiplexer ● Symbol


2-to-1 Multiplexer

0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1

0 0 1 1 0 1 0 1

S I0 I1 F(S,I0,I1)0 1

I0 I1

S F(S,I0,I1)


● Truth table ● Compact truth table

● Determine the Boolean expression for Y as a function of I0, I1, and S.?

● Y = S’I0 + SI1A


4-to-1 MultiplexersLecture Digital Systems

A 4-to-1 multiplexer is shown below.

● Determine the Boolean expression for Y as a function of Di and Si.

?


I0I1

0 1

I2I3

0 1

F0 1

S0 S1

4-to-1 Multiplexers A 4-to-1 multiplexer can also be made by using two 2-to-1

multiplexers, as shown below:



Quadruple 2-to-1 MultiplexerLecture Digital Systems

A quadruple 2-to-1 multiplexer is shown below.


Design Exercise: MultiplexerLecture Digital Systems

Design a multiplexer with 8 inputs (A1, A2, B1, B2, C1, C2, D1, D2), with 2 outputs and 4 possibilities of transmission: (A1, A2), (B1, B2), (C1, C2), and (D1, D2).Give the logic expression and the logic circuit of the multiplexer.

A2 B2

O2

O1

C2 D2

A1 B1 C1 D1


Exercise: Crossbar SwitchLecture Digital Systems

Find out the truth table of the following circuit? What can the function of this circuit? X1 0

1

X2 0 1

S

Y1

Y2

X1

X2

S

Y1 Y2

This crossbar switch circuit is capable to connect any input to any output. Here X1 and X2 can be set to pass through Y1 or Y2.

0 X1 X2 X1 S X1 X2 Y1

X2 Y2

1 X1 X2 X2 X1 (Straight)(Crossed)


Section 9Binary Adders

Digital Systems


Binary AddersLecture Digital Systems

Addition of binary data is very fundamental in digital systems. The hardware implementation needs to be determined.

The inputs are: single bit values, carry in The outputs are: sum, carry out. After creating a single-bit adder, we can chain multiple adders

together. Overflow must also be considered. Overflow is the situation where

the result of addition exceeds the magnitude which can be represented with the allocated number of bits.


Half Adder A half adder adds two binary numbers. The inputs: A0, B0 (single bit inputs). The outputs: S0 (single bit sum) and C1 (carry out).


0 0 0 1A B S C0 0 0 00 1 1 01 0 1 01 1 0 1

● Truth Table of Half Adder

A0

B0

S0

C1

● Circuit of Half Adder

A0

B0

S0

C1

Half adder

0

0

1 0

AB

C S

00

0 0

01

0 1

10

0 1

11

1 0


Multiple Bit AdditionLecture Digital Systems

Consider the addition of 2 binary numbers, A and B.3 2 1 0A A A A

A 0 1 0 13 2 1 0B B B B

B 0 1 1 1

C 1 1 1A 0 1 0 1B 0 1 1 1

1 1 0 0

i 1 i

i

i

i

C C

ABS

Addition of each bit position Ai and Bi creates a sum Si and a carry Ci+1.


Full Adder

i i i i i 1A B C S C0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1

CiAiBi 00 01

0

1

0 0

10

11 10

1 0

11

CiAiBi 00 01

0

1

0 1

01

11 10

0 1

01


A full adder adds two binary numbers but also include a carry in. The inputs: Ai, Bi, Ci (single bit inputs). The outputs: Si (single bit sum) and Ci+1 (carry out).

● Truth Table of Half Adder

● K-Map for Si

● K-Map for Ci+1


Full AdderLecture Digital Systems

Si = Ai’Bi’Ci + Ai’BiCi’ + AiBi’Ci’ + AiBiCi

Let us now simplify Boolean function for S by using Boolean algebra.

Si = Ci·(Ai Bi )’ + Ci’·(Ai Bi )Si = Ci (Ai Bi )

Hint: A B = A·B’ + A’·B (A·B)’ = A’ + B’ (A+B)’ = A’ · B’

Si = Ci·(Ai’Bi’ + AiBi) + Ci’·(Ai’Bi + AiBi’)

CiAiBi 00 01

0

1

0 1

01

11 10

0 1

01



Ci+1 = AiBi + AiCi +BiCi (previous result)

Let us now simplify Boolean function for Ci+1 by using Boolean algebra.

Hint: A B = A·B’ + A’·B (A·B)’ = A’ + B’ (A+B)’ = A’ · B’

Ci+1 = AiBi + CiAi’Bi +CiAiBi’ (as shown by K-map below)

Ci+1 = AiBi + Ci ·(Ai’Bi + AiBi’)

Ci+1 = AiBi + Ci ·(Ai Bi)

CiAiBi 00 01

0

1

0 0

10

11 10

1 0

11



The logic circuit of the full adder can be shown as:

Si = Ci (Ai Bi )Ci+1 = AiBi + Ci ·(Ai Bi)

Ai

Bi

Ci

Si

Ci+1

A full adder can be made from 2 half adders and an OR Gate. Such structure repetition simplifies circuit design.

Half adder

Half adder



Ai

Bi

Ci

Si

Ci+1

Half adder

Half adder

Full adder

Ai

Bi

Ci Si

Ci+1

= This single bit full adder will be the building block of large adders.


n × Full Adder = n-bit Ripple Carry AdderLecture Digital Systems

Full adder

Ai Bi

Ci

Si

Ci+1

Full adder

A0 B0

C0

S1

C1Full adder

A1 B1

S2

C2Full adder

A2 B2

S3

C3Full adder

A3 B3

S4

C4

C 1 1 1 0A 0 1 0 1B 0 1 1 1

1 1 0 0

● 4-bit ripple-carry adder

MSB position LSB position


Section 10Signed Numbers

Digital Systems


How to Represent Signed Numbers For decimal numbers, it is common to use the sign + and –, as for

+25, –16, +433, –2775. For computers, where operations are done using binary digits, it is

desirable to represent signed numbers also in bits. There are 3 representations of signed binary numbers:

1. Signed magnitude2. 1’s complement3. 2’s complement


In each case, the left-most bit indicates the sign: 0 means positive, 1 means negative.


How to Represent Signed NumbersLecture Digital Systems

bn–1

MagnitudeMSB

● Unsigned number

b1 b0

MagnitudeSign0 denotes1 denotes

+– MSB

● Signed number

bn–1 b1 b0bn–2


Signed Numbers

● Number circle for 4-bit 2’s complement numbers


● 4-bit signed binary number comparison0000

0001

0010

0011

0100

0101

0110

01111000

1001

1010

1011

1100

1101

1110

1111

1 + 1 – 2 +

3 + 4 +

5 + 6 +

7 +

2 – 3 – 4 – 5 –

6 – 7 – 8 –

0


Signed NumbersLecture Digital Systems

● 4-bit signed binary number comparison


As mentioned before, in signed magnitude, the left-most bit is used to indicate the sign. 0 means positive, 1 means negative.

Signed Magnitude RepresentationLecture Digital Systems

By using signed magnitude, n bits can be used to represent integers N in the range of: 2n–1 – 1 ≤ N ≤ 2n–1 – 1

For example, the range of an unsigned 4-bit binary number is from 0 to 15.

The range of a signed 4-bit binary number is –7 to + 7 (or 11112 to 01112)

For signed magnitude, there are two representations for zero. For example, with n = 4, 0000 and 1000.

000011002 = 1210

Sign bit Magnitude

100011002 = –1210

Sign bit Magnitude


1’s Complement RepresentationLecture Digital Systems

The 1’s complement of a binary number involves inverting all bits. 1s become 0s, and 0s become 1s.

As example, 1’s complement of 00110011 is 11001100 1’s complement of 10101010 is 01010101.

Thus, for an n-bit number N, the 1’s complement is 2n – 1 – N. To find the negative of a number, take the 1’s complement of that

number. For 1’s complement, there are two representations for zero. For

example, with n = 4, 0000 and 1111.

000011002 = 1210

Sign bit Magnitude

111100112 = –1210

Sign bit Magnitude


1’s Complement Addition / SubtractionLecture Digital Systems

As Example 1, suppose we wish to add 1210 + 110.

1210 = 11002 = 011002 in 1’s complement 110 = 00012 = 000012 in 1’s complement

Step 1: Add the binary numbers Step 2: Add the carry to lowest-order bit

011002000012

01101200

011012 = 1310




011002111102

01010211

010112

As Example 2, suppose we wish to substract 1210 – 110.

1210 = 11002 = 011002 in 1’s complement –110 = –00012 = 111102 in 1’s complement

= 1110




110102110112

10101211

101102

As Example 3, suppose we wish to substract –510 – 410.

–510 = –01012 = 110102 in 1’s complement –410 = –01002 = 110112 in 1’s complement

= –10012

= –910




110102001002

11110200

111102

As Example 4, suppose we wish to substract –510 + 410.


= –00012

= –110


2’s Complement RepresentationLecture Digital Systems

The 2’s complement of a binary number involves inverting all bits and adding 1.

As example, 2’s complement of 00110011 is 11001101 2’s complement of 10101010 is 01010110.

Thus, for an n-bit number N, the 2’s complement is 2n – 1 – N + 1 = 2n – N.

To find the negative of a number, take the 2’s complement of that number.

For 2’s complement more negative numbers than positive.

000011002 = 1210

Sign bit Magnitude

111101002 = –1210

Sign bit Magnitude



Step 1: Add the binary numbers Step 2: Discard the carry

110112010012

0010021

As Example 5, suppose we wish to add –510 + 910.


= 410




110112101112

1001021

As Example 6, suppose we wish to add –510 – 910.


= –11102

= –1410


1



011012110112

010002


1310 = –11012 = 011012 in 2’s complement –510 = –01012 = 110112 in 2’s complement

= 810




001012101002

1100120


510 = –01012 = 001012 in 2’s complement –1210 = –11002 = 101002 in 2’s complement

= –01112

= –710


Adder-Subtractor CircuitLecture Digital Systems

The following circuit is called an adder-subtractor. This circuit is capable of adding and subtracting binary numbers.

When D = 0, the circuit performs addition, S = A + B. When D = 1, the circuit performs subtraction, S = A – B. The XOR

Gates invert the value of B to its 2’s complement (C0 = 1).

D


Comparing the Signed Numbers Lecture Digital Systems

1.Signed magnitude: Negating is very easy Just change the sign bit Adding or subtracting is difficult If the signs are the same, add the

magnitudes and keep the sign. If the signs are different, subtract the smaller operand from the larger operand. The sign of the result is the same as the sign of the larger operand.

Rather complex circuit is required.

2.1’s complement: Negating is easy Invert the number but keep the sign bit. Adding and subtracting is much easier Include the sign bits, add

directly. If there is carry, add it to the sum Simple but must differentiate cases where carry is 0 or 1.

3.2’s complement: Negating is not easy Invert the number, keep the sign, add 1. Adding and subtracting is easy Include the sign bits, add directly.

Ignore the carry, directly get the result. Simple circuit


Overflow in Binary Addition and SubtractionLecture Digital Systems

When two numbers of the same sign are added, the answer may not fit the number of bits provided.

In this case, the answer exceeds the magnitude which can be represented with the allotted number of bits. This is called overflow.

In 2’s complement, overflow occurs when a transition is made from 2n–1 –1 to –2n–1 when adding or from –2n–1 to 2n–1 –1.

00000001

0010

0011

0100

0101

01100111

10001001

1010

1011

1100

1101

11101111

1 + 1 – 2 +

3 + 4 +

5 + 6 +

7 +

2 – 3 – 4 – 5 –

6 – 7 – 8 –

0


Overflow in 4-bit 2 Complement NumberLecture Digital Systems

00 0010 0011

0101

235

01 0011 0110

1001

Overflow

3 6–7

11 1110 1101

1011

–2–3–5

10 1101 1010

0111

Overflow

–3–6 7

00 0010 1100

1110

2–4–2

11 1110 0100

0010

–2 4 2


Homework 71.Create a full adder by using NOR Gates only.2.Convert 1 0111 01102 to decimal from

i. signed magnitude ii. 1’s complementiii. 2’s complement

3.Calculate the following equations using signed magnitude:–810 – 1010 =2310 – 1710 =

4.Calculate each of the following equations using 1’s and 2’s complement:

–310 – 1010 =2210 – 3010 =


Deadline: 11 November 2015.

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President UniversityErwin SitompulDigital Systems 7/1 Lecture 7 Digital Systems Dr.-Ing. Erwin Sitompul…