rev 2018050

MPQ6531-AEC1(5V-60V, Three-Phase, Brushless

DC Motor Pre-Driver)

A gate driver IC designed for three-phase brushless DC motor

driver applications

April 2019

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V.5/19

Confidential and Proprietary – INTERNAL USE ONLY

• Permanent magnet sync motors

• Automotive actuators

• Automotive fans and blowers

• Automotive fuel and water pumps

MPQ6531-AEC1 Target Applications

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• Wide 5V to 60V operating input voltage range

• Supports 100% duty cycle operation

• Robust protections include programmable SCP, OCP, adjustable

dead-time control, thermal shutdown, and UVLO protection

• Small package size

Why Use This Part?

It’s Simple and Easy!

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• Wide 5V to 60V Input Voltage Range

• 0.8A Max Source and 1A Max Sink Current

• Charge Pump Gate Drive Supply

• Bootstrap High-Side Driver with Trickle-Charge

Circuit Supports 100% Duty Cycle Operation

• Low-Power Sleep Mode

• Adjustable Dead-Time Control to Prevent Shoot-

Through

• Thermal Shutdown and UVLO Protection

• Thermally Enhanced Surface-Mount Package

MPQ6531-AEC1 (5V-60V Operating VIN)

FEATURES

QFN-28 (4mmx5mm)

1

CPB

EXPOSED PAD ON

BACKSIDE

CONNECTED TO GND

MPQ6531

2

3

4

5

6

7

28

27

26

25

24

23

22

21

20

19

18

17

16

14

13

12

11

109

BSTA

SHA

GHA

GLA

BS

TB

SH

B

GH

B

GL

B

BS

TC

SH

C

GHC

GLC

LSS

LA

LB

DT

HA

HB

HC

VREG

CPA LC

OC

RE

F

nS

LE

EP

nF

AU

LT

VIN

8 15

GN

D

HA

HB

HC

OCREF

nFAULT

DT

MPQ6531

RDEAD

LA

LB

LC

nSLEEP

CPA

CPB

VREG

VIN

LSS

VIN

0.47uF

10uF

CIN

GLA

GHA

SHA

Phase A

(repeat for B and C)

To

Phase

B

To

Phase

C

GND

BSTA

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Block Diagram

HB

HA

nSLEEP

LA

HC

LC

LB

Charge

Pump

VIN

RSENSE

SHA

GND

Fault

Handling

SC

Comparator

Timing and

Control

Logic

DT

CPA CPB

VIN

VREG

GHA

GLA

HS Gate

Drive

LS Gate

Drive

Trickle

Charge

Phase A,

repeat for

B&C

LSS

nFAULT

RDT

BSTA

VREG

OCREF

VDS

Monitor

0.5VOCP

Comparator

VIN

TSD UVLO VIN

VREG

Hx Lx SHx

L L High impedance

H L VIN

L H GND

H H High impedance

Input Logic Truth Table

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MPQ6531-AEC1 – Steady State

Duty = 10% Duty = 50% Duty = 90%

VGLA

VSHA

IOUTA

VGHA

Test conditions: VIN = 24V, OCREF = 0.5V, RDT = 20kΩ, FPWMA = 20kHz, TA = 25°C,

resistor + inductor load = 5Ω + 1mH/phase with star connection

The MPQ6531-AEC1 follows the Input Logic Truth Table, and operates steadily under

different duty percentages.

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MPQ6531-AEC1 – Power Ramp Up

Duty = 10% Duty = 50% Duty = 90%

VGHA

VSHA

IOUTA

VIN

Test conditions: VIN = 24V, OCREF = 0.5V, RDT = 20kΩ, FPWMA = 20kHz, TA = 25°C,

resistor + inductor load: 5Ω + 1mH/phase with star connection

The power-up process takes between 1ms and 2ms, after which the MPQ6531-

AEC1 responds to logic inputs and drives the outputs.

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MPQ6531-AEC1 – Sleep Recovery

Duty = 10% Duty = 50% Duty = 90%

VGHA

VSHA

IOUTA

VnSLEEP

When exiting sleep mode, the power-up sequence repeats.

Test conditions: VIN = 24V, OCREF = 0.5V, RDT = 20kΩ, FPWMA = 20kHz, TA = 25°C,

resistor + inductor load: 5Ω + 1mH/phase with star connection

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MPQ6531-AEC1 – Sleep Entry

Duty = 10% Duty = 50% Duty = 90%

VGHA

VSHA

IOUTA

VnSLEEP

The MPQ6531-AEC1 features a low-power sleep mode, which disables

the device and draws a very low supply current.

Test conditions: VIN = 24V, OCREF = 0.5V, RDT = 20kΩ, FPWMA = 20kHz, TA = 25°C,

resistor + inductor load: 5Ω + 1mH/phase with star connection

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