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PID NICKEL PALLADIUM GOLD PCB -NON CONFIDENTIAL-
Copyright/ Schutzvermerk DIN ISO 16016DIN ISO 16016
Copying of this document, and giving it to others and the use or
communication of the contents thereof, are forbidden without express
authority. Offenders are liable to the payment of damages. All rights are
reserved in the event of the grant of a patent or the registration of a
utility model or design.
Weitergabe sowie Vervielfältigung dieser Unterlage, Verwertung und
Mitteilung ihres Inhalts ist nicht gestattet, soweit nicht ausdrücklich
zugestanden. Zuwiderhandlungen verpflichten zu Schadensersatz. Alle
Rechte für den Fall der Patenterteilung oder Gebrauchsmuster-Erteilung
vorbehalten.
Document-Number Issue Project Date Class Page
63.1500.570.87PID_NiPdAu PCB A All 2017-03-24 O-K1 1/22
PROPRIETARY & CONFIDENTIAL All rights reserved according on clause on cover sheet. Tesat-Spac3ecom GmbH & Co. KG, 2010
PID Nickel Palladium Gold PCB -non confidential-
Approved in SAP by Workflow
Prepared by QS department
D. Fuggmann
Engineering
T. Maihoefer
PCB & Hybrid
M. Jonek
Quality
D. Fuggmann
Configuration Management
I. Rock
CM Release
DVS-No. TD01235242
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Document-Number Issue Project Date Class Page
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PROPRIETARY & CONFIDENTIAL All rights reserved according on clause on cover sheet. Tesat-Spacecom GmbH & Co. KG, 2010
CHANGE RECORD
Issue Details of Change Date
A Initial issue 2017-03-24
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Document-Number Issue Project Date Class Page
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PROPRIETARY & CONFIDENTIAL All rights reserved according on clause on cover sheet. Tesat-Spacecom GmbH & Co. KG, 2010
INDEX
1 Introduction ............................................................................................................... 4
1.1 Purpose ............................................................................................................................................... 4
1.2 Scope .................................................................................................................................................. 4
1.3 Abbreviations ...................................................................................................................................... 4
1.4 Applicable Documents ........................................................................................................................ 4
2 Organization ............................................................................................................... 5
3 Processes ................................................................................................................... 9
4 Manufacturing flow .................................................................................................. 11
5 Qualified domain ..................................................................................................... 14
6 Manufacturing Area ................................................................................................. 15
7 Manufacturing Documentation ................................................................................ 17
8 Manufacturing Quality Control ................................................................................. 17
9 List of Materials........................................................................................................ 18
10 List of Equipment ..................................................................................................... 19
11 List of Test Equipment .............................................................................................. 20
12 List of Manufacturing Instructions ............................................................................ 21
13 List of Inspection Requirements................................................................................ 22
PID NICKEL PALLADIUM GOLD PCB -NON CONIFDENTIAL-
Document-Number Issue Project Date Class Page
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PROPRIETARY & CONFIDENTIAL All rights reserved according on clause on cover sheet. Tesat-Spacecom GmbH & Co. KG, 2010
1 Introduction
1.1 Purpose
This document shows the processes for manufacturing PCB’s with ENIPIG (NiPdAu) surface.
1.2 Scope
The listed processes and techniques are qualified in different qualification programs. This docu-
ment describes PCB’s with NiPdAu surface.
1.3 Abbreviations
Abbreviation Description
ECSS European Cooperation for Space Standardization
ESA European Space Agency
FM
NiPdAu
Flight Model
Nickel Palladium Gold
PCB Printed Circuit Board
PID Process Identification Document
1.4 Applicable Documents
AD 1 HB-TESAT Managementhandbuch Management Manual, Iss. G
AD 2 BIC_Prozessportal Modelname:”Prüfbefundmanagement”
Non-conformance Management, Reporting and
Documentation
AD 3 BIC_Prozessportal Evaluation and Qualification
AD 4 BIC_Prozessportal PCB manufacturing
AD 5 63.3000.002.00FRL Design rules for FM PCB, Iss. F
AD 6 63.1013.001.00FNO Cleanliness- and Room Classes, Iss. E
AD 7 63.0125.200.28QPR Qualification report NiAu, Iss. A
AD 8 63.0125.200.69QPR Qualification report NiPdAu, Iss. A
AD 9 63.0125.200.73QPR NiPdAu Line 3_Engl version
AD 10 ECSS-Q-ST-70-10 Qualification of printed circuit boards, Iss. C
AD 11 ECSS-Q-ST-70-11 Procurement of printed circuit boards, Iss. C
AD 12 63.1500.570.52TD Cleanliness Control Plan _CCP
AD 13 63.0125.200.74QPR Delta qualification of laser drilled Via on signal layer
(LV board with PbSn surface and molybdenum core)
AD 14 63.1500.570.84 QPR Delta Qualification Copper Foil
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2 Organization
Tesat-Spacecom’s organizational structure is shown in Figure 1 to Figure 5. They represent the sta-
tus at the time of publishing this issue and include the short names of the organizational units.
Figure 1 provides the top level organization. The units shown are further subdivided as described
in Figure 2 to Figure 5.
Figure 1: Tesat Spacecom Organization
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Figure 2: Operations Organization
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Figure 3: Manufacturing & Test Organization
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Figure 4: PCB & Hybrid
Figure 5: PCB
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3 Processes
Processes Specifications
Preproduction and planning 63.1503.000.00VAR
Incoming inspection of laminates 63.2721.031.00BVS 63.2721.032.00BVS 63.2721.041.00BVS 63.2721.044.00BVS
Incoming inspection of prepregs 63.2711.005.00BVS
Inspection of artwork -touch up -control
63.1950.060.00FVS
Chemical cleaning 63.1950.054.00FVS 63.4451.008.00IPV
Mechanical cleaning 63.1950.013.00FVS
Photoresist -application -exposure
63.1950.031.00FVS 63.1950.032.00FVS 63.4451.008.00IPV
Photoresist development
Inspection photoresist
63.1950.033.00FVS
Acidic etching process (tenting technology) 63.1950.005.00FVS 63.4451.008.00IPV
Resist stripping process 63.1950.004.00FVS 63.4451.008.00IPV
Inspection etching 63.1892.003.00IPV
Treatment of multilayers 63.1950.055.00FVS 63.4451.008.00IPV
Storage of prepregs and laminates 63.1950.026.00FVS
Laminate process 63.1950.026.00FVS
Drilling and milling 63.1950.064.00FVS
Laserdrilling 63.1950.056.00FVS
X-Ray drilling 63.1950.057.00FVS
Deburring 63.1950.001.00FVS
Etchback 63.1950.009.00FVS
Inspection after drilling and etchback 63.1892.005.00IPV
Panel (through hole) plating and bath control 63.1950.002.00FVS 63.4451.008.00IPV
Pattern plating (tin/lead) and bathcontrol
63.1950.003.00FVS 63.4451.008.00IPV
Electroless Ni PD Au line and bath control 63.1950.066.00FVS 63.4451.008.00IPV
Drying NiPDAu
Microsection and controls 63.1892.006.00IPV
Inspection 63.1892.004.00IPV 63.1892.005.00IPV
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Ultrasonic cleaning 63.1950.061.00FVS
Packaging 63.1950.038.00FVS
Vaccum drying
Other comments 63.4451.008.00IPV
Tin/Lead stripping process before NiPdAu electroless plating
63.1950.042.00FVS
Alkaline etching process (metal resist technology)
63.1950.046.00FVS 63.4451.008.00IPV
PID NICKEL PALLADIUM GOLD PCB -NON CONIFDENTIAL-
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PROPRIETARY & CONFIDENTIAL All rights reserved according on clause on cover sheet. Tesat-Spacecom GmbH & Co. KG, 2010
4 Manufacturing flow
The flow is an example of NiPdAu – PCB’s.
The different set-ups defined in the design rules will be documented in the respective traveller.
Layer 53 (Cu/Invar/Cu) Layer 54 / 55 Layer 56 (Cu/Invar/Cu)
Layer 52 / 57
Preproduction and planning
A
Drilling and milling)
Preproduction and planning)
Cleaning
Photoresist exposure
Preproduction and planning
Drilling and milling
Photoresist development
Acidic etching
Resist stripping
Cleaning
Photoresist exposure
Photoresist development
Acidic etching
Resist stripping
Photoresist exposure
Photoresist development
Acidic etching
Resist stripping
Drilling and milling
Cleaning
Cleaning
Inspection etching
Treatment of multilayers
Preproduction and planning
Laminate process
X-Ray drilling
Drilling and milling
Deburring
Cleaning
Etchback
Pattern plating
Photoresist exposure
Photoresist development
Acidic etching
Resist stripping
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B1 = Complete multilayer standard process
Treatment of multilayers
Drilling and milling
Cleaning
Laserdrilling
Etchback
Panel (PTH) plating
Cleaning
Photoresist exposure
Photoresist development
Acidic etching
A
Inspection
Microsection and controls
Cleaning
Laminate process
X-Ray drilling
Drilling and milling
Deburring
Deburring
Inspection
Cleaning
Inspection
Resist stripping
Cleaning
Cleaning
Inspection etching
Treatment of multilayers
Preproduction and planning
Laminate process
X-Ray drilling
Drilling and milling
Deburring
Drilling and milling
Laserdrilling
Cleaning
Etchback
Panel (PTH) plating
Deburring
Inspection
Cleaning
Inspection
Cleaning
Photoresist exposure
Photoresist development
Acidic etching
Resist stripping
Cleaning
Inspection etching
Cleaning
Cleaning
Chemical NiPDAu
Drilling and milling
Laserdrilling
Cleaning
Vaccum drying
Packaging
B1 B2
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B2 = Complete multilayer selective plated outline contour
Inspection
Microsection and controls
Preproduction and planning
Laminate process
X-Ray drilling
Drilling and milling
Deburring
Drilling and milling
Laserdrilling
Cleaning
Etchback
Panel (PTH) plating
Deburring
Inspection
Cleaning
Inspection
Cleaning
Photoresist exposure
Photoresist development
Pattern plating (tin/lead)
Resist stripping
Drilling and milling
Inspection etching
Cleaning
Cleaning
Chemical NiPDAu
Drilling and milling
Laserdrilling
Cleaning
Vaccum drying
Packaging
B2
Cleaning
Alcaline etching process
Tin/lead stripping
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5 Qualified domain
Objects ESA requirements TESAT – parameters at time Possible parameters
Base material In Conformance with ECSS-Q-ST-70
Isola FR4 HTg IS420 Isola FR4 HTg IS420
Prepreg types In Conformance with ECSS-Q-ST-70
Isola 1080, 2116 Isola 1080, 2116, 106
External dimension toler-ance
± 0,2 mm +0; -0,15 mm +0; -0,15 mm
Thickness tolerance ± 10% ± 10% ± 10%
Maximum board thickness 3,2 mm 3,2 mm 3,6 mm
Conductor width minimum Internal: 120µm External: 200 µm (for fine pitch 120 µm)
Internal: 120µm (17 µm copper thickness) External: 200 µm (for fine pitch 120 µm)
Internal: 100 µm (17 µm copper thickness) External: 150 µm (for fine pitch 120 µm)
Conductor spacing mini-mum
Internal: 150µm External: 300 µm (for fine pitch 150 µm)
Internal: 150µm External: 300 µm (for fine pitch 150 µm)
Internal: 100 µm (17 µm copper thickness) External: 150 µm (for fine pitch 150 µm)
PTH Via hole minimum 0,25 mm Aspect Ratio: 6
0,3 mm Aspect Ratio: 6
0,2 mm Aspect Ratio: 7
Mechanical depth drilled blind via hole minimum
None 0,6 mm Aspect Ratio: 1,0
0,4 mm Aspect Ratio: 1,0
µVia hole laser drilled minimum for CIC connec-tion
None 0,3 mm Aspect Ratio: 0,5
0,2 mm Aspect Ratio: 0,7
Blind via laser drilled layer 1 to 2 (2 to 3) for signal routing
None 0.3 mm Aspect Ratio: 0,5
0.2 mm Aspect Ratio: 0,7
Blind via laser drilled layer 1 to 3 for signal rout-ing
None 0.6 mm Aspect Ratio: 0,5
0.4 mm Aspect Ratio: 0,7
Relative misregistration pad/hole
≤ 0,15 mm ≤ 0,15 mm ≤ 0,15 mm
Misalignment External layer solder side
0,2 mm 0,2 mm 0,2 mm
Misalignment External layer Non soldering hole
0,1 mm 0,1 mm 0,1 mm
Misalignment External layer solder side
0,1 mm 0,1 mm 0,1 mm
Misalignment Internal layer 0,05 mm 0,05 mm 0,05 mm
Layer to layer registration ± 0,1 mm ± 0,1 mm ± 0,1 mm
Number of layers maxi-mum
18 10 30
Electronic copper plating Minimum purity
95% 95% 95%
Copper thickness of sur-face pattern
≥ 25 µm ≥ 25 µm ≥ 25 µm
Copper thickness of plat-ed-through holes
≥ 25 µm ≥ 25 µm ≥ 25 µm
Copper thickness of via holes (blind via)
≥ 18 µm ≥ 18 µm ≥ 18 µm
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Copper thickness of via holes (µvia) core connection
No requirements ≥ 10 µm ≥ 10 µm
Copper thickness innerlayer minimum
11 µm 11 µm 11 µm
Copper thickness innerlayer maximum
No requirements No requirements No requirements
Galvanic copper thickness outerlayer minimum
25 µm 25 µm 25 µm
Galvanic copper thickness outerlayer maximum
No requirements No requirements No requirements
Nickel thickness on sur-face
3 – 7 µm 3 – 7 µm 3 – 7 µm
Gold thickness on surface 0,05 – 0,08 µm 0,05 – 0,08 µm 0,05 – 0,08 µm
Palladium thickness on surface
0,01 – 0,045 µm 0,01 – 0,045 µm 0,01 – 0,045 µm
Insulation between layers minimum
70 µm 70 µm 40 µm (17µm copper)
Prepreg minimum 2 1 1
Prepreg maximum Not required 5 8
Used core thickness Not required 0,1 up to 1,55 mm 0,1 up to 1,55 mm
Warp and twist ≤ 1,1% for board thickness ≥ 1,6 mm ≤ 1,5% for board thickness < 1,6 mm
≤ 1,1% for board thickness ≥ 1,6 mm ≤ 1,5% for board thickness < 1,6 mm
≤ 1,1% for board thickness ≥ 1,6 mm ≤ 1,5% for board thickness < 1,6 mm
Thickness CIC core Not required 0,15 mm 0,15 mm
Thickness of photorresist Not required 50 and 75 µm 50 and 75 µm
6 Manufacturing Area
The manufacturing of PCBs is performed in rooms with a cleanliness level according to the ge-
neric specification 63.1013.001.00FNO.
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Figure 6: The manufacturing area of PCB’s has been located in building No 099
Figure 7: Manufacturing area TSPCGM91, building 099/ground floor
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Figure 8: Manufacturing area TSPCGM91, building 099/first floor
7 Manufacturing Documentation
For each PCB lot a job traveller is maintained. This job traveller contains all information neces-
sary for each subsequent working step. Additional electronic job tracking is used. This job travel-
ler will be kept in a manufacturing folder which contains also all relevant manufacturing draw-
ings.
8 Manufacturing Quality Control
Quality acceptance of the production of FM PCB’s is carried out by production lot control. The
control contains 100% electrical and visual inspection. Micro sectioning will be carried out on
each panel and on one PCB per lot. Automated optical equipment is used additionally for
inspection.
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9 List of Materials
Material Type
Film Idealine PRF
Base material FR4 IS 420 (HTg) Prepreg types: 106; 1080; 2116
Base material Epoxy 47 N No Flow Prepreg type: 1080
Base material Epoxy 49 N (HTg) No Flow Prepreg type: 1080
Base material Polyimide (Flex) Pyralux Types: AP, LF
Copper foil CAC-foil; Cu-foil;
12 µm; 17 µm; 35 µm; 70 µm
Metal core Copper-Invar-Copper
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10 List of Equipment
Process Equipment Supplier
Artwork Laserplotter Silverwriter
Developper Agfaline 86 HT
Barco
Agfa
Film registration Punching Machine Digiraster
Microetching layer Microetching machine 930 Pill
Pumice scrubbing Pumiflex IS
Hot – Roll Laminator HRL - 24 Du Pont
Auto. Laminator CSL 2000 Yield Master Du Pont
Resist exposure system PC printer 130 Du Pont
Resist Developer Premium Line Schmid
Etching Innerlayer Premium Line Schmid
Resist stripping Premium Line Schmid
Brown oxidation Innerlayer Horizontal plating line
Export 650
Pill
Lamination Multilayer Hydraulic Vacuum Press Bürkle
Drilling and Milling MX1 Schmoll
Etchback Plasma Etching machine March
Deburring Universal 601 Wesero
Pinning Machine Posafor Posalux
Electroless Copper and Panel plat-ing
Autom.Plating Line Galvabau
Pattern Plating (Tin/ Lead) Autom.Plating Line Galvabau
Electroless Nickel/ Palladium/ Gold Autom.Plating Line Galvabau
Etching and / or stripping external layer
Horizontal plating line Mac Dermid
SnPb-fusing Heated Oil Tank Opelka
Dryer Export 450 Pill
Dryer Un 750 Plus Memmert
Ultrasonic washing
machine
Export 600 Pill
Automatical exposure FAPS 600 Bacher
Drilling of tooling holes
Via x-ray
XRX Schmoll
Registration and bonding of innerlayers
Bonding machine Wicke
Punching of innerlayers Punching machine Piergiacomi
Laserdrilling GS 600 Lumonics
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11 List of Test Equipment
Test Test Equipment Supplier
Microscope with measuring equip-ment
Axioplan
Axioskop
Axio Imager (A1)
Zeiss
Zeiss
Zeiss
Stereo-Microscope Stemi SV8
Stemi SV11
Zeiss
Zeiss
Solderability Rotary Solderability Test Station CEMCO
Fluidizes Sand Bath SBL-1 Techne
Lamination and Prepreg Test Polystat 200 T Schwabenthan
Cations Atomic Spectrometer ASZ5000 Hitachi
Microsectioning Microsection Equipment Struers
Metall Coating Thickness, NiPdAu Fischerscope X-Ray XDLH Fischer
P-Content in Ni-layer Fischerscope X-Ray XDLH Fischer
Copper Coating Thickness Fischerscope MMS Multimeasuringsystem
Fischer
Conductor Width/ Spacing Measuring Microsope Leitz
Glas Transition Temperature DSC-Equipment Netzsch
CVS QL 10EX ECI Technology
Titration analysis Titrando 808
Titrando 888
Metrohm
Metrohm
MLB Over all Thickness Overarm Micrometer Ceco
Volume resistivity µVia 6290-7BV5 Almemo
Scanning electron microscope Hitachi TM 1000 Hitachi
Inspection innerlayer Argos Mania Barco
Electrical testing Flying probe tester A5 ATG
Stereo-Microscope LYNX / VS8 Vision Engineering
IST IST HC PWB
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12 List of Manufacturing Instructions
Mechanics Specification no.
Plasmaätzen 63.1950.009.00FVS
Bohren und Fräsen Schmoll - Einrichtungen 63.1950.064.00FVS
Verpressen von Leiterplatten 63.1950.026.00FVS
Laserbohren 63.1950.056.00FVS
Röntgenbohren 63.1950.057.00FVS
Registrieren und Verschweißen von Lagen 63.1950.059.00FVS
Endreinigen von Leiterplatten (Ultraschallreinigen) 63.1950.061.00FVS
Structuring Specification no.
Entschichten von Fotoresist (Strippen) 63.1950.004.00FVS
Ätzen von Leiterplatten 63.1950.005.00FVS
Reinigen von unbestückten Leiterplatten 63.1950.013.00FVS
Laminieren und Beschneiden von Fotoresist auf LP 63.1950.031.00FVS
Belichten des Fotoresists auf Leiterplatten 63.1950.032.00FVS
Entwickeln des Fotoresists auf Leiterplatten 63.1950.033.00FVS
Reinigen und Entfernen von Oxidschichten auf Cu-Oberflächen
63.1950.054.00FVS
Oxidieren von Innenlagen 63.1950.055.00FVS
Stanzen von Referenzlöchern 63.1950.058.00FVS
Filme für Strukturierung von Leiterplatten erstellen 63.1950.060.00FVS
Plating Specification no.
Reinigen und Entgraten von unbestückten Leiterplatten 63.1950.001.00FVS
Vormetallisieren von Leiterplatten 63.1950.002.00FVS
Aufmetallisieren von Leiterplatten 63.1950.003.00FVS
Zinnstrippen von Leiterplatten 63.1950.042.00FVS
Ätzen von Leiterplatten in Metallresisttechnik 63.1950.046.00FVS
Chemisch NiPdAu von Leiterplatten 63.1950.066.00FVS
Aufschmelzen von Leiterplatten 63.1950.917.00FVS
General Specification no.
Rahmenbedingungen für das Fertigen und Prüfen von LP‘n 63.1950.201.00FVS
Verpacken von Leiterplatten 63.1950.038.00FVS
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13 List of Inspection Requirements
Inspection Specification no.
Automatische Optische Inspektion von LP 63.1892.003.00IPV
Visuelle Kontrolle von LP 63.1892.005.00IPV
Schliffprüfung von LP 63.1892.006.00IPV
Elektrische Endprüfung von LP 63.1892.004.00IPV
Analytik Leiterplatten-Galvanik 63.4451.008.00IPV