Phd Dissertation Themes

7/22/2019 Phd Dissertation Themes

1/4

1) Development of Automated Optimization Methods of Low Noise VLSI Circuits

2) Development of Low Noise Means of Automated Design of Sigma-Delta

Modulators

3) Development of High-Speed and Low Noise Design Automation Tools for 6

Pipeline Analog to Digital Converters

4) An Efficient Methodology for Analysis of Stochastic Computer Simulation

Experiments

5) A Power/Area Optimal Approach to VLSI Signal Processing

6) Physical Design Automation for Large Scale Field Programmable Analog Arrays

7) Analog Signal Processing Using Floating-Gate Based Large-Scale Field-

Programmable Analog Arrays

8) Design automation of RF CMOS low noise amplifiers

9) Fundamental Algorithms for System Modeling, Analysis, and Optimization

10)Numerical simulation and computational modelling are technologies that

pervade science and engineering, from electronics (e.g., analog/RF/mixed-signal

circuits, high-speed digital circuits, interconnect, etc.) to optics, nanotechnology,

chemistry, biology and mechanics. This course provides a detailed introduction to

the fundamental principles of these technologies.


2/4

1. Continuous-Time Modelling and Simulationo Modelling continuous-time systems (circuits, simple mechanical

systems, reaction rate equations) as differential-algebraic equations.Quiescent steady-state analysis; the Newton-Raphson algorithm. Solvingsparse systems of linear equations: Gaussian Elimination and LUfactorization. Numerical solution of differential equations:existence/uniqueness, Picard-Lindelof theorem, Lipschitz condition;ODE solution fundamentals; Forward Euler, Backward Euler,Trapezoidal methods; LMS methods; use of ODE techniques for DAEs;

stability of LMS methods; accuracy, truncation error of LMS methods.Sinusoidal steady state analysis of linear time-invariant systems: DAElinearization, frequency-domain computation of sinusoidal steady stateresponses, connection with Laplace transforms. Stationary noise analysisof linear time invariant systems: propagation of stationary noise throughLTI systems, transfer functions from DAEs, direct and adjointcomputation of noise power spectral densities.

o Suggested reading: A. Sangiovanni-Vincentelli, "Circuit Simulation", inDesign

Systems for VLSI Synthesis, Martinus Nijhoff Publishers, 1987. J. Roychowdhury,Numerical Simulation and Modelling ofElectronic and Biochemical Systems,Foundations and Trends

in Electronic Design Automation: Vol. 3: No 2-3, pp 97-303,2009. Chaps 2-8.

L.O. Chua and P.-M. Lin,Computer-Aided Analysis of ElectronicCircuits: Algorithms and Computational Techniques,Prentice-Hall, 1975. Chaps. 11-13.
http://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=43&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=43&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://www.amazon.com/Computer-Aided-Analysis-Electronic-Circuits-Computational/dp/0131654152http://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=138&page=CADprelimshttp://potol.eecs.berkeley.edu/classWiki/tiki-download_wiki_attachment.php?attId=43&page=CADprelims


3/4

Design automation of RF CMOS low noise amplifiers

Abstract

With the desire for high integration and low power consumption, the demands on the

performance specifications of each radio-frequency (RF) functional building block are constantly

increasing. Although RF blocks make up a small portion of the whole system, their design time

and cost are relatively high compared to their analog and digital counterparts. In addition, as the

operating frequency gets higher, the effects of parasitics make the design of RF blocks even

more challenging. Low noise amplifiers (LNA) are one of the key performance bottlenecks in an

RF system. They are required to contend with a variety of signals coming from the antenna.

Most of the time the amplitude of the interferers are stronger than the desired signal, thus, low

noise, high linearity and high gain LNAs are required. Computer-aided analysis and synthesis

tools for RF are still in their infancy, and not used in industrial environments yet. Therefore,

optimal solutions involving several design constraints are hard to achieve, and much of the

effort is based on experience. A stand-alone design automation tool developed for the synthesis

of RF complementary metal-oxide-semiconductor (CMOS) LNAs with arbitrary topologies is

presented in this dissertation. To achieve this, LNA design is considered as an optimization

problem with the performance specifications being put into the form of objective functions and

constraints. Rather than relying on a commercially available circuit simulator such

as Spectreor HSpice, the presented synthesis tool is complete with its own built-in modules for

faster optimization. Foundry provided, silicon-verified RF device models are also incorporated

into the synthesis procedure for accurate parasitic modeling. Agreement with simulation results

makes the proposed synthesis tool an independent circuit design environment or an auxiliary

tool that provides an initial design point for a commercial design environment such as Cadence,

for shorter design times. To validate the proposed approach, an inductively source degenerated

LNA circuit is first synthesized and then fabricated in a 0.25m CMOS technology. The chip

occupies a silicon area of 1:2mmx 1:4mm including the pads. Measurement results are

presented which shows that a functional LNA can be obtained by using the proposed synthesis


4/4

tool. It is anticipated that in addition to reducing the design time, this tool will also be helpful in

exploring new LNA topologies that will meet the desired performance specifications.

Documents

Phd Dissertation Themes