Performances and Prototyping for the Fast Multiplicity implementation

4-th February 2003 CERN - SPD/ITS Meeting F.Meddi

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Performances and Prototyping for the Performances and Prototyping for the Fast Multiplicity implementationFast Multiplicity implementation

ALICE-PIXEL-RomeALICE-PIXEL-RomeF. Meddi,S. Di Liberto,M. A. Mazzoni,G. M. Urciuoli.

M. Marini,S. Sestito.

G. Astone,M. Spaziani.


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Summary:Summary:

[1][1] Minimum value of #PIXEL Minimum value of #PIXEL vs efficiency:comparison of Fast Multiplicity signal obtained by

- single sampling- double sampling - integration

[2] Double Integrator prototype for Fast Multiplicity: - realization and measurements time scale

[3] DAC’s working point study for Fast-Or - laboratory set-up- single chip measurements strategy


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[1][1] Comments on minimum value of #PIXEL Comments on minimum value of #PIXEL vs efficiencyfrom Fast Multiplicity signal:- data sample taken last September 2002 on the pixel-bus prototype, analyzed in order to choose optimized single and double sampling time(s) and integration time window

Pedestal Study:Pedestal Study:By a digital scope[LeCroy9360-600MHz-5GS/S]N = 136 sweepst = 0.4 ns/sample(20 ns/div & 502 sample)


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(PEDESTAL) vs Time(PEDESTAL) vs Time

PEDESTAL > vs TimePEDESTAL > vs Time

238n

s23

8ns

288n

s28

8ns

263n

s26

3ns

N=136t=0.4ns

[mV

][m

V]

[s]

PEDESTAL:PEDESTAL:

It shows a maximumsampling50ns50nsafter 238ns(i.e. at 288ns)

.... It is bettersampling 25ns25ns after 238ns(i.e. at 263ns)

Confirmed also by a Pedestal’s Pedestal’s autocorrelation autocorrelation studystudy.

P.S. P.S. Times are measured respect to T.P.


5

CLKCLK

T.P.T.P.

F.M.F.M.

20ns

30ns

280ns

0 100 200 300 ns

220ns

320ns


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Asking that:1) The Signal (S) could be reduced by 2*(S)

and2) The Pedestal (Ped) could be increased by 2*(Ped)

(i.e. asking :2 [S – 2*(S)] – [Ped + 2*(Ped)] 0)

37 ± 2 Pixel/Bus Single sampling @ 263ns

35 ± 5 “ Integrating in 100ns window

35 ± 3 “ Double sampling @ 263ns & @ 363ns

…But, the integration methodintegration method is more reliable respect to the othersbecause it is more stable respect to real system variability characteristics:In fact,

variing the integration time of 25ns a variation of ~ 15%~ 15%;

moving of 25ns the sampling time a factor of ~ 2 worse~ 2 worse;

Minimum #PIXEL/BUSMinimum #PIXEL/BUS obtainaible with Fast Multiplicity:


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Single-SAMPLING: Single-SAMPLING:

@238ns@238ns((fit/SLOPE) = 4.9 PIXEL/BUSfit/SLOPE) = 4.9 PIXEL/BUS

2 = 0 2 = 0 (73.3 (73.3 ± 5.7) PIXEL/BUS± 5.7) PIXEL/BUS

-80

-60

-40

-20

0

20

40

0 20 40 60 80 100 120

Data_DELTA2_238et263ns

DELTA2_@238ns

#PIXEL / BUS

y = m1 + m2 * M0

ErrorValue

4,3054-91,427m1

0,0762581,2465m2

NA226,36Chisq

NA0,98896R

@263ns@263ns((fit/SLOPE) = 2.8 PIXEL/BUSfit/SLOPE) = 2.8 PIXEL/BUS


-40

-20

0

20

40

60

80

0 20 40 60 80 100 120

Data_DELTA2_238et263ns

DELTA2_@263ns

#PIXEL / BUS

y = m1 + m2 * M0

ErrorValue

2,111-39,971m1

0,0363221,0712m2

NA63,619Chisq

NA0,996R


8

-0,06

-0,04

-0,02

0

0,02

0,04

0 20 40 60 80 100 120

Data_eff_doppio-camp_311002

DELTA2

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

0,0028906-0,060356m1

5,1199e-050,00094807m2

NA0,00010204Chisq

NA0,99136R

““in-time” @238nsin-time” @238ns““out-time” @338nsout-time” @338ns

((fit/SLOPE) = 4.4 PIXEL/BUSfit/SLOPE) = 4.4 PIXEL/BUS


-0,04

-0,02

0

0,02

0,04

0,06

0,08

0 20 40 60 80 100 120

Data_eff_doppio-camp_301002

DELTA2

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

0,0022854-0,037495m1

4,048e-050,0010845m2

NA6,3783e-05Chisq

NA0,99585R

““in-time” @263nsin-time” @263ns““out-time” @363nsout-time” @363ns



DOUBLE-SAMPLING:DOUBLE-SAMPLING:


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INTEGRATION IN FIXED TIME WINDOW:INTEGRATION IN FIXED TIME WINDOW:

-1 10-9

-5 10-10

0

5 10-10

1 10-9

1,5 10-9

0 20 40 60 80 100 120

Data_19et201002

DELTA2_@75ns

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

2,4544e-10-2,6051e-09m1

5,2933e-126,3551e-11m2

NA2,8019e-20Chisq

NA0,99313R

Integration in a Time Window of 75nsIntegration in a Time Window of 75ns((fit/SLOPE) = 1.9 PIXEL/BUSfit/SLOPE) = 1.9 PIXEL/BUS


-1,5 10-9

-1 10-9

-5 10-10

0

5 10-10

1 10-9

1,5 10-9

0 20 40 60 80 100 120

Data_191002

DELTA2_@50ns

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

1,655e-10-2,1701e-09m1

2,5639e-123,6897e-11m2

NA8,94e-20Chisq

NA0,99048R




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INTEGRATION IN FIXED TIME WINDOW:INTEGRATION IN FIXED TIME WINDOW:

-2 10-9

0

2 10-9

4 10-9

6 10-9

8 10-9

0 20 40 60 80 100 120

Data_191002

DELTA2_@150ns

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

2,3661e-10-2,7236e-09m1

4,1909e-128,9551e-11m2

NA6,8366e-19Chisq

NA0,99349R

Integration in a Time Window of Integration in a Time Window of 150ns150ns



-2 10-9

-1 10-9

0

1 10-9

2 10-9

3 10-9

4 10-9

5 10-9

6 10-9

0 20 40 60 80 100 120

Data_DELTA2-vs-PIXsulBUS

DELTA_2*SIGMA

#PIXEL/BUS

y = m1 + m2 * M0

ErrorValue

3,2663e-10-2,8382e-09m1

5,7854e-128,2282e-11m2

NA1,3029e-18Chisq

NA0,98549R




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# Fired Pixels nSignal S & (S)Pedestal P & (P)

k [S – k*(S)] – [P + k*(P)]

k 0

k [(S – P) / ((S) + (P))]

nGauss

k

EFFICIENCY “EFFICIENCY “”” vs. #FIRED PIXELS on a BUS: vs. #FIRED PIXELS on a BUS:

0,8

0,82

0,84

0,86

0,88

0,9

0,92

0,94

0,96

0,98

1

10 20 30 40 50 60

Eff_2samples_263ns&363ns

Eff_integration_100ns

Eff_1sample_263ns

n (#PIXEL/BUS)


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In the case of a PIXEL BUSIn the case of a PIXEL BUSof the inner SPD:of the inner SPD:

a threshold of a threshold of 35 pixels35 pixelscorresponds to corresponds to 22 tracks22 tracks

(using a mean C.L. of 1.56)(using a mean C.L. of 1.56)(*)(*)

...tacking into account ...tacking into account fluctuations in “fluctuations in “””

@ @ 2*2*

(dn / d(dn / d

dn / ddn / d

< (

#PIX

EL

/ H

alf-

Sta

ve)

><

(#P

IXE

L /

Hal

f-S

tave

) >

0

10

20

30

40

50

60

0 100 200 300 400 500 600 700 800

Data_summary-stat-HS-layer1

mean_HSmean_HS - 2*rms_HSmean_HS + 2*rms_HS

-2*-2*

+2*+2*

Minimum (Minimum (dn / ddn / d obtainaible with Fast Multiplicity:

(*) Thanks to T.Virgili


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[2] Double Integrator prototype for Fast Multiplicity:- Functional blocks

Control Logic

Double Integrator A/D

C

(DSP)

PC

F.M.F.M.

CLKCLK

T.P.T.P.

FIFO

discussed with G. Anelli


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- Double integrator:- Double integrator:

ADCADC FIFOFIFOMicrocontrollerMicrocontroller

(DSP)(DSP)

BoardBoard

IIFM-ChipFM-Chip IIFM-ChipFM-Chip

ControlControlLogicLogic

CLKCLK

T.P.T.P.

SW1SW1

SW2SW2

SW4SW4

SW3SW3

SW5SW5

SW1SW1


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- Control Logic:- Control Logic:

FPGAFPGA

HOLD

HOLD

SELECTCH1

CLKCLK

T.P.T.P.

SW1SW1

SW2SW2

SW3SW3

SW4SW4

SW5SW5

SELECTCH2


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[3] Working point study for Fast-Or:

- Measurements done on a single chip(.... tests repeated on several chips required)

- Simple h/w added to the Standard Pixel System Test Set-up to count the Fast-Or signals

GTL/TTL

COUNTER

F.O.F.O.

T.P.T.P.

RSTRST

DISPLAY


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For DAC[20] = 0 ~ 100For DAC[20] = 0 ~ 100

Fast-Or error Fast-Or error probability:probability:

Few spurious hitsFew spurious hits(< 2 10(< 2 10-3 -3 ))

@@ Pre_VTH = 220Pre_VTH = 220(~1200e)(~1200e)

““No” spurious hit No” spurious hit (i.e. < 10(i.e. < 10-6 -6 ))

@@ Pre_VTH = 215Pre_VTH = 215(~1600e)(~1600e)

0,0001

0,001

0,01

0,1

0 20 40 60 80 100

Data_FO-Ped_230103

FO_ERROR-PROBABILITY + SIGMAFO_ERROR-PROBABILITYFO_ERROR-PROBABILITY - SIGMA

DAC[20]

(@ PreVTH=220)(@ PreVTH=220)

Fast-Or ERROR Probability:Fast-Or ERROR Probability:


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In the range:In the range:DAC[20]=30 ~ 90DAC[20]=30 ~ 90

Fast-Or Fast-Or for 1Fired Pixelfor 1Fired Pixel

(r#2, r#252;(r#2, r#252;c#7, c#15, c#22) c#7, c#15, c#22)

Efficiency = 100%Efficiency = 100%

Without any Without any spurious hitspurious hit( ( < 4 < 4 **1010-4 -4 ))

Fast-Or pulse efficiencyFast-Or pulse efficiency [#FO /#TRG][#FO /#TRG]@ Pre_VTH=215@ Pre_VTH=215 vs DAC[20] valuevs DAC[20] value

with with only 1 fired pixelonly 1 fired pixel far or close the chip “pad area”far or close the chip “pad area”

0

0,5

1

1,5

2

0 20 40 60 80 100 120

DAC[20]

L C R

C

R L


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0

0,5

1

1,5

2

0 20 40 60 80 100 120

(#FO / #TRG)_r252&253c22_a(#FO / #TRG)_r252&253c22_b(#FO / #TRG)_r252&253c22_c(#FO / #TRG)_r2&3c22_a(#FO / #TRG)_r2&3c22_b(#FO / #TRG)_r2&3c22_c(#FO / #TRG)_r252&253c7_a(#FO / #TRG)_r252&253c7_b(#FO / #TRG)_r252&253c7_c(#FO / #TRG)_r2&3c7_a(#FO / #TRG)_r2&3c7_b(#FO / #TRG)_r2&3c7_c(#FO / #TRG)_r252&253c15_a(#FO / #TRG)_r252&253c15_b(#FO / #TRG)_r252&253c15_c(#FO / #TRG)_r2&3c15_a(#FO / #TRG)_r2&3c15_b(#FO / #TRG)_r2&3c15_c

DAC[20]

Fast-Or pulse efficiencyFast-Or pulse efficiency [#FO /#TRG][#FO /#TRG]@ Pre_VTH=215@ Pre_VTH=215 vs DAC[20] valuevs DAC[20] value

with with 2 fired pixel 2 fired pixel along columnalong column in several zones of the chip matrix in several zones of the chip matrix

(r#2-3, r#252-253;(r#2-3, r#252-253;c#7, c#15, c#22)c#7, c#15, c#22)


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Fast-Or pulse duration Fast-Or pulse duration vs DAC[20] value vs DAC[20] value with with only 1 fired pixelonly 1 fired pixel @ Pre_VTH=215 @ Pre_VTH=215

(r#2, r#252;(r#2, r#252;c#7, c#15, c#22)c#7, c#15, c#22)

0

10

20

30

40

50

60

70

0 20 40 60 80 100 120

FO_FWHM_r2c22_a_preVTH215FO_FWHM_r2c22_b_preVTH215FO_FWHM_r2c22_c_preVTH215FO_FWHM_r252c22_a_preVTH215FO_FWHM_r252c22_b_preVTH215FO_FWHM_r252c22_c_preVTH215FO_FWHM_r252c7_a_preVTH215FO_FWHM_r252c7_b_preVTH215FO_FWHM_r252c7_c_preVTH215FO_FWHM_r2c7_a_preVTH215FO_FWHM_r2c7_b_preVTH215FO_FWHM_r2c7_c_preVTH215FO_FWHM_r252c15_a_preVTH215FO_FWHM_r252c15_b_preVTH215FO_FWHM_r252c15_c_preVTH215FO_FWHM_r2c15_a_preVTH215FO_FWHM_r2c15_b_preVTH215FO_FWHM_r2c15_c_preVTH215

DAC[20]


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Fast-Or pulse duration Fast-Or pulse duration withwith only 1 fired pixelonly 1 fired pixel@ (DAC[20] = 60 & Pre_VTH = 215)@ (DAC[20] = 60 & Pre_VTH = 215)

Time

220ns 230ns 240ns 250ns 260ns 270ns 280ns 290ns 300nsV(c22r252) V(c22r2) V(c15r252) V(c15r2) V(c7r252) V(c7r2)

0V

0.5V

1.0V

1.5V

2 4 6

1 3 5

On the whole chip:FWHM 17~40 ns17~40 ns jitter 18ns max18ns max

10ns

11

223344

55 66


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Conclusion:Conclusion:

[1][1] Minimum value of #PIXEL Minimum value of #PIXEL vs efficiencyobtainable from Fast Multiplicity signal from a singlehalf-stavehalf-stave by integration in 100ns time window: 35 35 55

[2] Double Integrator prototype for Fast Multiplicityneeds to be ready before the submission of FADC chipfor functionality feedback check:- prototype realization and measurements: end of Marchend of March

[3] DAC’s working point study for Fast-Or:- full efficiency with 1 fired pixel:

DAC[20] = 30 ~ 90 @ Pre_VTH=215

- more systematic study: end of Aprilend of April

Documents

Performances and Prototyping for the Fast Multiplicity implementation